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NJU6368 Series PRELIMINARY High Drive Fundamental Quartz Crystal Oscillator sGENERAL DESCRIPTION The NJU6368 series is a C-MOS fundamental quartz crystal oscillator that consists of an oscillation amplifier, 3-stage divider and 3-state output buffer. The 3-stage divider generates only one frequency selected of f 0,f0/2,f 0/4 and f 0/8 by internal circuits is output. The oscillation amplifier is realized very low stand-by current using NAND circuit. The 3-state output buffer is C-MOS compatible and can drive 50pF(@5V) C-MOS load. Furthermore, the package is small-sized MTP-6. sFEATURES qOperating Voltage 2.7 to 5.5V qMaximum Oscillation Frequency 50MHz qLow Operating Current qHigh Fan-out IOH/IOL=8mA@3.3V IOH/IOL=16mA@5.0V q3-Stage Divider Maximum Divider f 0/8 qOscillation Stop and Output Stand-by Function q3-State Output Buffer qOscillation Capacitors Cg and Cg on-chip qPackage Outline Thin-Chip/MTP-6 qC-MOS Technology sPACKAGE OUTLINE NJU6368XC-C NJU6368XF1 sPAD LOCATION Thin-Chip FOUT VSS XT MTP-6 FOUT VDD XT 1 2 3 6 5 4 XT VDD CONT VSS XT CONT sLINE-UP TABLE Type No. A B C D P FOUT f0 f 0/2 f 0/4 f 0/8 f0 Internal Connect Connected A Line Connected B Line Connected C Line Connected D Line Connected A Line Cg/Cd 15/15pF 15/15pF 15/15pF 15/15pF Non sCOORDINATES No 1 2 3 4 5 8 Pad Name FOUT VSS XT CONT NJU6368 X -207 -207 33 207 207 207 Y 247 -247 -247 -247 -17 172 VDD XT Starting Point:Chip Center Unit[um] Chip Size:0.67x0.75mm Thin-Chip Thickness:26020um Pad Size:90x90um sBLOCK DIAGRAM XT VDD Rf VSS XT 1/ 2 Cg 1/ 2 1/ 2 Cd 3 - STATE BUFFER FOUT A B C D CONT 2002/12/18 ( 1 / 5 ) NJU6368 Series sTREMINAL DESCRIPTION SYMBOL FUNCTION Oscillation and 3-state Output Buffer Control FOUT CONT Output either one frequency selected of f 0, H or OPEN Note1) f 0/2,f 0/4 and f 0/8 L Oscillation Stop and High impedance Output CONT Quartz Crystal Connecting Terminals XT VSS VSS=0V FOUT Frequency Output VDD VDD=3.3V/5.0V Note1) Refer to the line-up table. sABSOLUTE MAXIMUM RATINGS (Ta=25C) PARAMETER SYMBOL RATING UNIT Supply Voltage VDD -0.5 to +7.0 V Input Voltage VIN VSS-0.5 to VDD+0.5 V Output Voltage VO -0.5 to VDD+0.5 V Input Current IIN mA 10 Output Current IO mA 25 Power Dissipation Note 4) PD 200(MTP-6) mW Operating Temperature Range Topr -40 to +85 C Storage Temperature Range Tstg -55 to +125 C Note2) If the supply voltage(VDD) is less than 7.0V, the input voltage must not over the VDD level though 7.0V is limit specified. Note3) Decupling capacitor should be connected between VDD and VSS due to the stabilized operation for the circuit. Note4) Power Dissipation is the maximum value of a package simple substance. XT 2002/12/18 ( 2 / 5 ) NJU6368 Series sELECTRICAL CHARACTERISTICS PARAMETER Operating Voltage SYMBOL VDD CONDITIONS MIN 2.7 TYP MAX 5.5 (Ta=25C) UNIT V PARAMETER SYMBOL Operating Current IDD CONDITIONS A version,fosc=16MHz,CL=30pF B version,fosc=16MHz,CL=30pF C version,fosc=16MHz,CL=30pF D version,fosc=16MHz,CL=30pF P version,fosc=16MHz,CL=30pF Note5) CONT =VSS, No load CONT =XT=VSS, No load Note6) MIN TYP (VDD=3.3V,Ta=25C) MAX UNIT 8 6 4 mA 3 8 Oscillation Stopping Current Stand-by Current Input Voltage Output Current Input Current 3-state Off Leakage Current Feedback Resistance Internal Capacitor ISTB Ist VIH VIL IOH IOL IIN IOZ Rf Cg/Cd 2 5 1 3.3 0.99 uA uA V V mA mA uA uA uA K pF MHz VOH=2.97V VOL=0.33V CONT =0.8VDD CONT =0.2VDD CONT =VSS, FOUT= VDD or VSS 2.31 0 8 8 10.0 1.8 15.0 3.0 0.1 fosc=16MHz, A/B/C/D version P version 255 15/15 - Maximum Oscillation 50 FMAX Frequency Output Signal CL=15pF, @VDD/2 45 50 SYM Symmetry 45 50 CL=30pF, @VDD/2 Output Signal Rise CL=15pF,10% to 90% 2 tr Time 4 CL=30pF,10% to 90% Output Signal Fall CL=15pF,90% to 10% 2 tf Time 4 CL=30pF,90% to 10% TPLZ Output Disable time CL=15pF,RUP=10k TPZL Output Enable Time CL=15pF,RUP=10k Note5) P version is measured with external capacitors contained 13pF for Cg and 13pF for Cd. Note6) Excluding input current on CONT Terminal. 55 55 4 8 4 8 150 150 % ns ns ns ns 2002/12/18 ( 3 / 5 ) NJU6368 Series PARAMETER SYMBOL CONDITIONS A version,fosc=16MHz,CL=50pF B version,fosc=16MHz,CL=50pF C version,fosc=16MHz,CL=50pF D version,fosc=16MHz,CL=50pF P version,fosc=16MHz,CL=50pF Note5) CONT =VSS, No load CONT =XT=VSS, No load Note6) MIN TYP Operating Current IDD (VDD=5.0V,Ta=25C) MAX UNIT 15 11 9 mA 7 15 Oscillation Stopping Current Stand-by Current Input Voltage Output Current Input Current 3-state Off Leakage Current Feedback Resistance Internal Capacitor ISTB Ist VIH VIL IOH IOL IIN IOZ Rf Cg/Cd 5 10 1 5.0 1.5 uA uA V V mA mA uA uA uA K pF MHz VOH=4.5V VOL=0.5V CONT =0.8VDD CONT =0.2VDD CONT =VSS, FOUT= VDD or VSS 3.5 0 16 16 27.0 5.5 40.0 8.0 0.1 fosc=16MHz, A/B/C/D version P version 255 15/15 - Maximum Oscillation 50 FMAX Frequency Output Signal CL=15pF, @VDD/2 45 50 SYM Symmetry 45 50 CL=50pF, @VDD/2 Output Signal Rise CL=15pF,10% to 90% 2 tr Time 4 CL=50pF,10% to 90% Output Signal Fall CL=15pF,90% to 10% 2 tf Time 4 CL=50pF,90% to 10% TPLZ Output Disable time CL=15pF,RUP=10k TPZL Output Enable Time CL=15pF,RUP=10k Note5) P version is measured with external capacitors contained 13pF for Cg and 13pF for Cd. Note6) Excluding input current on CONT Terminal. 55 55 4 8 4 8 100 100 % ns ns ns ns 2002/12/18 ( 4 / 5 ) NJU6368 Series sMEASURMENT CIRCUITS (1)Output Signal Symmetry(CL=15/30/50pF) 1000pF Pulse Generator 50 XT VDD FOUT CL VSS 1/2VDD H L (2)Output Signal Rise/Fall Time(CL=15/30/50pF) 1000pF Pulse Generator 50 XT VDD FOUT CL VSS tr tf 90% 50% 10% (3)Output Disable/Enable Time(CL=15pF,RUP=10k) VDD XT Pulse Generator 50 CONT VSS FOUT RUP=10k CONT 0.2VDD TPLZ 0.8VDD TPZL VOL VOH CL=15pF FOUT [CAUTION] The specifications on this data book are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. 2002/12/18 ( 5 / 5 ) |
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