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INA102
ABRIDGED DATA SHEET For Complete Data Sheet Call Fax Line 1-800-548-6133 Request Document Number 10523
Low Power INSTRUMENTATION AMPLIFIER
FEATURES
q LOW QUIESCENT CURRENT: 750A max q INTERNAL GAINS: 1, 10, 100, 1000 q LOW GAIN DRIFT: 5ppm/C max q HIGH CMR: 90dB min q LOW OFFSET VOLTAGE DRIFT: 2V/C max q LOW OFFSET VOLTAGE: 100V max q LOW NONLINEARITY: 0.01% max q HIGH INPUT IMPEDANCE: 1010
APPLICATIONS
q AMPLIFICATION OF SIGNALS FROM SOURCES SUCH AS: Strain Gages (Weigh Scale Applications) Thermocouples Bridge Transducers q REMOTE TRANSDUCER AMPLIFIER q LOW-LEVEL SIGNAL AMPLIFIER q MEDICAL INSTRUMENTATION q MULTICHANNEL SYSTEMS q BATTERY POWERED EQUIPMENT
DESCRIPTION
The INA102 is a high-accuracy monolithic instrumentation amplifier designed for signal conditioning applications where low quiescent power is desired. On-chip thin-film resistors provide excellent temperature and stability performance. State-of-the-art lasertrimming technology insures high gain accuracy and common-mode rejection while avoiding expensive external components. These features make the INA102 ideally suited for battery-powered and high-volume applications. The INA102 is also convenient to use. A gain of 1, 10, 100, or 1000 may be selected by simply strapping the appropriate pins together. A gain drift of 5ppm/C in low gains can then be achieved without external adjustment. When higher-than-specified CMR is required, CMR can be trimmed using the pins provided. In addition, balanced filtering can be accomplished in the output stage.
1 14 4.44k 2 404 3 40.04 4 5 5pF 5pF 20k 7 6 15 A2 20k A3 11 20k 20k 20k A1 5pF 16 12 V+ 9 V- 13
20k 10
5pF 8
International Airport Industrial Park * Mailing Address: PO Box 11400 Tel: (520) 746-1111 * Twx: 910-952-1111 * Cable: BBRCORP *
* Tucson, AZ 85734 * Street Address: 6730 S. Tucson Blvd. * Tucson, AZ 85706 Telex: 066-6491 * FAX: (520) 889-1510 * Immediate Product Info: (800) 548-6132
(c) 1985 Burr-Brown Corporation
PDS-523G
Printed in U.S.A. October, 1993
SPECIFICATIONS
ELECTRICAL
At TA = +25C with 15VDC power supply and in circuit of Figure 2, unless otherwise noted. INA102AG PARAMETER GAIN Range of Gain Gain Equation, External, 20% Error, DC: G = 1 G = 10 G = 100 G = 1000 G=1 G = 10 G = 100 G = 1000 Gain Temp. Coefficient G=1 G = 10 G = 100 G = 1000 Nonlinearity, DC G=1 G = 10 G = 100 G = 1000 G=1 G = 10 G = 100 G = 1000 RATED OUTPUT Voltage Current Short Circuit Current(2) Output Impedance, G = 1000 INPUT OFFSET VOLTAGE Initial Offset(3) INA102AU vs Temperature vs Supply vs Time BIAS CURRENT Initial Bias Current (Each Input) vs Temperature vs Supply Initial Offset Current vs Temperature IMPEDANCE Differential Common-Mode VOLTAGE RANGE Range, Linear Response CMR With 1k Source Imbalance G=1 G = 10 G = 10 to 1000 NOISE Input Voltage Noise fB = 0.01Hz to 10Hz Density, G = 1000: fO = 10Hz fO = 100Hz fO = 1kHz Input Current Noise fB = 0.01Hz to 10Hz Density: fO = 10Hz fO = 100Hz fO = 1kHz TA = TMIN to TMAX DC to 60Hz DC to 60Hz DC to 60Hz TA = +25C 300 300/G 5 10/G 40 50/G (20 + 30/G) * 100 200/G 2 5/G 10 20/G * * V V V/C V/V V/mo RL = 10k (|VCC| - 2.5) 1 2 0.1 * * * * * * * * V mA mA CONDITIONS MIN TYP MAX MIN * INA102CG TYP MAX * * 0.05 0.05 0.15 0.5 0.08 0.11 0.21 0.62 5 10 15 20 0.01 0.01 0.02 0.05 0.015 0.015 0.03 0.1 INA102KP/INA102AU MIN * TYP MAX * * 0.15 0.35 0.4 0.9 0.21 0.44 0.52 1.08 * * * * * * * * * * * * UNITS V/V V/V % % % % % % % % ppm/C ppm/C ppm/C ppm/C % % % % % % % % of of of of of of of of FS FS FS FS FS FS FS FS
TA = +25C TA = +25C TA = +25C TA = +25C TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX
1 1000 G = 1 + (40k/RG)(1) 0.1 0.1 0.25 0.75 0.16 0.19 0.37 0.93 10 15 20 30
TA = +25C TA = +25C TA = +25C TA = +25C TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX TA = TMIN to TMAX
0.03 0.03 0.05 0.1 0.045 0.045 0.075 0.15
500 300/G
* *
TA = TMIN to TMAX
TA = TMIN to TMAX
25 0.1 0.1 2.5 0.1 1010 || 2 1010 || 2 (|VCC| - 4.5) 80 80 80 94 100 100
50
15
6 * * 2.5 * * * * 90 90 90 * * *
30
10
* * * * * * * * 75 * * * * *
*
*
nA nA/C nA/V nA nA/C || pF || pF V dB dB dB
1 30 25 25 25 0.3 0.2 0.15
* * * * * * * *
* * * * * * * *
Vp-p nV/Hz nV/Hz nV/Hz pAp-p pA/Hz pA/Hz pA/Hz
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ELECTRICAL (CONT)
INA102AG PARAMETER DYNAMIC RESPONSE Small Signal, 3dB Flatness G=1 G = 10 G = 100 G = 1000 Small Signal, 1% Flatness G=1 G = 10 G = 100 G = 1000 Full Power, G = 1 to 100 Slew Rate, G = 1 to 100 Settling Time 0.1%: G = 1 G = 100 G = 1000 0.01%: G = 1 G = 100 G = 1000 POWER SUPPLY Rated Voltage Voltage Range Quiescent Current TEMPERATURE RANGE Specification INA102AU Operation Storage -25 RL > 50k(2) -25 -65 +85 +85 +150 * * * * * * 0 -25 -25 -55 +70 +85 +85 +125 C C C C 3.5 VO = 0V, TA = TMIN to TMAX 15 * 18 750 * * * * * * * * * V V A VOUT = 0.1Vrms 300 30 3 0.3 VOUT = 0.1Vrms 30 3 0.3 0.03 2.5 0.15 50 360 3300 60 500 4500 * * * * * * * * * * * * * * * * * * * * * * * * kHz kHz kHz kHz kHz V/s s s s s s s * * * * * * * * kHz kHz kHz kHz CONDITIONS MIN TYP MAX MIN INA102CG TYP MAX INA102KP/INA102AU MIN TYP MAX UNITS
VOUT = 10V, RL = 10k VOUT = 10V, RL = 10k RL = 10k, CL = 100pF 10V Step
1.7 0.1
* *
* *
10V Step
500
*Specification same as for INA102AG. NOTES: (1) The internal gain set resistors have an absolute tolerance of 20%; however, their tracking is 50ppm/C. RG will add to the gain error if gains other than 1, 10, 100, or 1000 are set externally. (2) At high temperature, output drive current is limited. An external buffer can be used if required. (3) Adjustable to zero.
PIN CONFIGURATION
Top View DIP/SOIC
ABSOLUTE MAXIMUM RATINGS
Supply ................................................................................................ 18V Input Voltage Range .......................................................................... VCC Operating Temperature Range ......................................... -25C to +85C Storage Temperature Range: Ceramic .......................... -65C to +150C Plastic, SOIC .................. -55C to +125C Lead Temperature (soldering, 10s) ............................................... +300C Output Short Circuit Duration ................................. Continuous to Ground
Offset Adjust
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
Offset Adjust +In -In Filter +VCC Output Common -VCC
x 10 Gain x 100 Gain x 1000 Gain x 1000 Gain Sense
Gain Sense Gain Set CMR Trim
PACKAGE INFORMATION
PRODUCT INA102AG INA102CG INA102KP INA102AU PACKAGE 16-Pin Ceramic DIP 16-Pin Ceramic DIP 16-Pin Plastic DIP 16-Pin SOIC PACKAGE DRAWING NUMBER(1) 109 109 180 211
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
ORDERING INFORMATION
PRODUCT INA102AG INA102CG INA102KP INA102AU PACKAGE 16-Pin Ceramic DIP 16-Pin Ceramic DIP 16-Pin Plastic DIP 16-Pin Plastic SOIC TEMPERATURE RANGE -25C to +85C -25C to +85C 0C to +70C -25C to +85C
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PAD 1 2 3 4 5 6 7 8 9
FUNCTION Offset Adjust X10 Gain X100 Gain X1000 Gain X1000 Gain Sense Gain Sense Gain Set CMR Trim -VCC
PAD 10* 11 12 13 14 15 16 17 18
FUNCTION Common Output +VCC Filter -In +In Offset Adjust (A1 Output) (A2 Output)
* Glass covers upper one-third of this pad. Substrate Bias: Electrically connected to -V supply. NC: No Connection.
MECHANICAL INFORMATION
MILS (0.001") Die Size Die Thickness Min. Pad Size 142 x 104 5 20 3 4x4 MILLIMETERS 3.61 x 2.64 0.13 0.51 0.08 0.10 x 0.10 Gold
INA102 DIE TOPOGRAPHY
Backing
TYPICAL PERFORMANCE CURVES
At +25C and in circuit of Figure 2 unless otherwise noted.
COMMON-MODE REJECTION vs SOURCE IMBALANCE 120 80
G = 1000
GAIN vs FREQUENCY
VOUT = 0.1Vrms
Common-Mode Rejection (dB)
100
G = 10 to 1000
60
Gain (dB)
G=1 80 R IMB 60 20Vp-p 5Hz 10k
40
G = 100
20
G = 10
0
G=1
1% Error
40 100 1k 10k 100k 1M Source Resistance Imbalance ( )
-20 10 100 1k 10k 100k 1M Frequency (Hz)
COMMON-MODE REJECTION vs FREQUENCY 120 50 G = 100 G = 1000 100
WARM-UP DRIFT vs TIME
Change in Input Offset Voltage (mV)
Common-Mode Rejection (dB)
40
30
80
G = 10 G=1
20
60 V IN = 20Vp-p 0 Source Imbalance 1 10 Frequency (Hz) 100 1k
10
40
0 0 1 2 Time (ms) 3 4 5
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TYPICAL PERFORMANCE CURVES (CONT)
At +25C and in circuit of Figure 2 unless otherwise noted.
QUIESCENT CURRENT vs SUPPLY 1000 900
Quiescent Current (A)
STEP RESPONSE 15 RL = 10k CL = 1000pF G = 1000
800 700 600 500 400 300 200 100 0 0 5 10 Supply Voltage (V) VO = 0
VO = 10V (no load)
10
G=1
Output Voltage (V)
15 20
5 0 -5 -10 -15 0 1 2
3
4 Time (ms)
5
6
7
8
SETTLING TIME vs GAIN 10
PEAK-PEAK VOLTAGE NOISE vs GAIN
Total Input Preferred Noise Voltage (Vp-p)
RL = 10k CL = 1000pF
1000
Bandwidth = 1Hz to 1MHz 500k 500k
Settling Time (ms)
1
100 RS = 1M RS = 100k 10 RS RS = 0 See Applications Section 1 1 10 Gain (V/V) 100 1000
0.1
0.01%
1% 0.1% 0.01 1 10 Gain (V/V) 100 1000
INPUT NOISE VOLTAGE vs FREQUENCY 1000
Input Noise Voltage (nVHz)
POWER SUPPLY REJECTION vs FREQUENCY 125
Power Supply Rejection (dB)
100
Gain = 1000 Gain = 100
75
100
G=1 G = 10 G = 100, G = 1000
50 Gain = 10 Gain = 1
25
10 1 10 100 Frequency (Hz) 1k 10k
0 1 10 100 Frequency (Hz) 1k 10k
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DISCUSSION OF PERFORMANCE
INSTRUMENTATION AMPLIFIERS Instrumentation amplifiers are differential-input closed-loop gain blocks whose committed circuit accurately amplifies the voltage applied to their inputs. They respond mainly to the difference between the two input signals and exhibit extremely high input impedance, both differentially and common-mode. The feedback networks of this instrumentation amplifier are included on the monolithic chip. No external resistors are required for gains of 1, 10, 100, and 1000 in the INA102. An operational amplifier, on the other hand, is an open-loop, uncommitted device that requires external networks to close the loop. While op amps can be used to achieve the same basic function as instrumentation amplifiers, it is very difficult to reach the same level of performance. Using op amps often leads to design tradeoffs when it is necessary to amplify low-level signals in the presence of common-mode voltages while maintaining high-input impedances. Figure 1 shows a simplified model of an instrumentation amplifier that eliminates most of the problems associated with op amps.
impedance (1010) desirable in instrumentation amplifier applications. The offset voltage, and offset voltage versus temperature, are low due to the monolithic design, and improved even further by state-of-the-art laser-trimming techniques. The output stage (A3) is connected in a unity-gain differential amplifier configuration. A critical part of this stage is the matching of the four 20k resistors which provide the difference function. These resistors must be initially well matched and the matching must be maintained over temperature and time in order to retain good common-mode rejection. All of the internal resistors are made of thin-film nichrome on the integrated circuit. The critical resistors are lasertrimmed to provide the desired high gain accuracy and common-mode rejection. Nichrome ensures long-term stability and provides excellent TCR and TCR tracking. This provides gain accuracy and common-mode rejection when the INA102 is operated over wide temperature ranges. USING THE INA102 Figure 2 shows the simplest configuration of the INA102. The output voltage is a function of the differential input voltage times the gain. A gain of 1, 10, 100, or 1000 is selected by programming pins 2 through 7 (see Table I). Notice that for the gain of 1000, a special gain sense is provided to preserve accuracy. Although this is not always required, gain errors caused by external resistance in series with the low value 40.04 internal gain set resistor are thus eliminated.
GAIN 1 10 100 1000 CONNECT PINS 6 to 7 2 to 6 and 7 3 to 6 and 7 4 to 7 and separately 5 to 6
eO = eA + eB eA = G (e2 - e1) = GeD eB = G (e2 + e1)/ 2 CMRR = GeCM CMRR
e2 e d /2 e CM
~ ~
e1
Z CM Zd
~
e d /2
~~
ea Z CM eb
Za
e0
TABLE I. Pin-Programmable Gain Connections.
eO = G eD + GeCM CMRR
Gain Set
Gain set is pin-programmable for x1, x10, x100, x1000 in the INA102.
15 7
+In
Gain = 1 Output
FIGURE 1. Model of an Instrumentation Amplifier. THE INA102 A simplified schematic of the INA102 is shown on the first page. A three-amplifier configuration is used to provide the desirable characteristics of a premium performance instrumentation amplifier. In addition, INA102 has features not normally found in integrated circuit instrumentation amplifiers. The input buffers (A1 and A2) incorporate high performance, low-drift amplifier circuitry. The amplifiers are connected in the noninverting configuration to provide the high input
6 14 -In
INA102 12 10 9
11
~
e2
10k +VCC 1F Tantalum
~
-VCC 1F Tantalum
FIGURE 2. Basic Circuit Connection for the INA102.
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Other gains between 1 and 10, 10 and 100, and 100 and 1000 can also be obtained by connecting an external resistor between pin 6 and either pin 2, 3, or 4, respectively (see Figure 6 for application). G = 1 + (40/RG) where RG is the total resistance between the two inverting inputs of the input op amps. At high gains, where the value of RG becomes small, additional resistance (i.e., relays or sockets) in the RG circuit will contribute to a gain error. Care should be taken to minimize this effect. OPTIONAL OFFSET ADJUSTMENT PROCEDURE It is sometimes desirable to null the input and/or output offset to achieve higher accuracy. The quality of the potentiometer will affect the results; therefore, choose one with good temperature and mechanical-resistance stability. The optional offset null capabilities are shown in Figure 3. R4 adjustment affects only the input stage component of the offset voltage. Note that the null condition will be disturbed when the gain is changed. Also, the input drift will be affected by approximately 0.31V/C per 100V of input offset voltage that is trimmed. Therefore, care should be taken when considering use of the control for removal of other sources of offset. Output offset correction can be accomplished with A1, R1, R2, and R3, by applying a voltage to Common (pin 10) through a buffer amplifier. This buffer limits the resistance in series with pin 10 to minimize CMR error. Resistance above 0.1 will cause the common-mode rejection to fall below 100dB. Be certain to keep this resistance low.
-VCC Input Offset Adjust R4 1 100k 16 INA102 Output Offset Adjust +15VDC A1 OPA27 R2 R1 1M R3 100k -15VDC 1k 15mV adjustment at the output.
OPTIONAL FILTERING The INA102 has provisions for accomplishing filtering with one external capacitor between pins 11 and 13. This singlepole filter can be used to reduce noise outside the signal bandwidth, but with some degradation to AC CMR. When it is important to preserve CMR versus frequency (especially at 60Hz), two capacitors should be used. The additional capacitor is connected between pins 8 and 10. This will maintain a balance of impedances in the output stage. Either of these capacitors could also be trimmed slightly, to maximize CMR, if desired. Note that their ratio tracking will affect CMR over temperature. OPTIONAL COMMON-MODE REJECTION TRIM The INA102 is laser-adjusted during manufacturing to assure high CMR. However, if desired, a small resistance can be added in series with pin 10 to trim the CMR to an improved level. Depending upon the nature of the internal imbalances, either positive or negative resistance value could be required. The circuit shown in Figure 4 acts as a bipolar potentiometer and allows easy adjustment of CMR.
15 14 INA102 10 Common OPA177 1k 1k 20 CMR Adjust
~
e CM
1k
1k
Procedure: 1. Connect CMV to both inputs. 2. Adjust potentiometer for near zero at the output.
FIGURE 4. Optional Circuit for Externally Trimming CMR.
10
TYPICAL APPLICATIONS
Many applications of instrumentation amplifiers involve the amplification of low-level differential signals from bridges and transducers such as strain gages, thermocouples, and RTDs. Some of the important parameters include commonmode rejection (differential cancellation of common-mode offset and noise, see Figure 1), input impedance, offset voltage and drift, gain accuracy, linearity, and noise. The INA102 accomplishes all of these with high precision at surprisingly low quiescent current. However, in higher gains (>100), the bias current can cause a large offset error at the output. This can saturate the output unless the source impedance is separated, e.g., two 500k paths instead of one 1M unbalanced input. Figures 5 through 16 show some typical applications circuits.
FIGURE 3. Optional Offset Nulling. It is important to not exceed the input amplifiers' dynamic range. The amplified differential input signal and its associated common-mode voltage should not cause the output of A1 or A2 to exceed approximately 12V with 15V supplies, or nonlinear operation will result. To protect against moisture, especially in high gain, sealing compound may be used. Current injected into the offset pins should be minimized.
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V 15 R e1 R Resistance Bridge R R e2 Shield 4 5 6 e IN 7 +In
+15V 12
+15V Optional Offset Adjust 100k 16
x1000
1
INA102
11
e1
10 14 -In 9 -15V e OUT = 1000 (e 2 - e1 ) INA102 replaces classical three-op-amp instrumentation amplifier.
FIGURE 5. Amplification of a Differential Voltage from a Resistance Bridge.
+15V 15 Noise (60Hz Hum) 12
+In x100
3 Shield RG 7
Transducer or Analog Signal Transformer Noise (60Hz Hum)
eOUT = G (eIN) G = 1 + (40k/[RG + RY]) RG = (40k - RY[G - 1])/(G - 1)
INA102 10
11 e OUT
6
14
-In
9 -15V
Note: Gain drift will be higher than that specified with internal resistors only.
RY 4.4k, 404, or 40 in gains of 10, 100, or 1000 respectively.
FIGURE 6. Amplification of a Transformer-Coupled Analog Signal Using External Gain Set.
K Thermocouple 15
+15VDC 12 G = 100 Span Adjust VFC32/ 320/62 10k 6 10 -15VDC 14 -In 9 +15VDC +15VDC -15VDC 500 OPA27 +V OFFSETTING -15VDC 1M 100k Zero Adjust -15VDC HCPL2731 OptoCoupler Digital +15VDC -15VDC +15VDC
+In x10
ISO Supply
+15VDC
3
100 IN914
7
INA102
11
Cold Junction Compensation
4990 1M Up-Scale Burn-Out Indication
15k -15VDC
FIGURE 7. Isolated Thermocouple Amplifier with Cold Junction Compensation.
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+15VDC LA RA 15 4 5 eIN = 1mVp-p RL 6 7 14 9 -15VDC INA102 11 e OUT = 1Vp-p to isolation amplifier. 10 -In +In x1000 12 G = 1000
FIGURE 8. ECG Amplifier or Recorder Preamp for Biological Signals.
+9V G = 100 12 15 +In 3 x100 7 INA102 6 14 10 -In 9
eIN
100k
11
eOUT
100k
eOUT contains a midscale DC voltage of +4.5V.
FIGURE 9. Single Supply Low Power Instrumentation Amplifier.
eIN
x1
15 2 3 4 7 6 14
Isolation Barrier +In x10 x100 x1000 Isolation Amplifier eOUT
* Does not require external isolation power supply.
INA102 9
11
ISO100 3650 or 3656 *
-In 12
10
Bias Current Return Resistor
1M
-15VDC
+15VDC
Note that x1000 gain sense has not been used to facilitate simple switching.
722 Isolation Power Supply
FIGURE 10. Precision Isolated Instrumentation Amplifier.
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+15VDC Output Common
Input Common
-15VDC
-15VDC
e6
INA102 Channel Select
e5
INA102 IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0 Gain Select CP CE PGA100
Control Logic
e4
INA102
e3
INA102 VREF *
eOUT
e2
INA102
e1
INA102
* As shown channels 0 and 1 may be used for auto offset zeroing, and gain calibration respectively.
FIGURE 11. Multiple Channel Precision Instrumentation Amplifier with Programmable Gain.
+24V +10VREF 15 3 7 6 14 2N3055 12 INA102 10 9 +24V OPA27 +6V 60k G = 100 11 +2V to +10V 15 16 1 12 13 4 XTR110 14 3 5 2 9 40k 10
I O (mA)
20 16 4 -40
300 40mV
GS
0 VIN (mV)
40
D 4mA to 20mA RL VL
FIGURE 12. 4mA to 20mA Bridge Transmitter Using Single Supply Instrumentation Amplifier.
+15V 10k D D e IN 10k +15V -15V D D -15V Input Protection: D = FDH300 (Low Leakage)
+15V 12 15 7 6 14 INA102 10 -In +In G=1
+15V 16 G = 1, 10, 100 6 11 7 8 PGA102 4 3 1 2 13 -15V x10 x100 Gain Select 15 5 e OUT
9 -15V
FIGURE 13. Programmable-Gain Instrumentation Amplifier Using the INA102 and PGA102.
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e IN
15 4 5 V1 6 7 14 10 INA102 x1000
+15V
12 11 e OUT 9
-15V
Ground Resistance
FIGURE 14. Ground Resistance Loop Eliminator (INA102 senses and amplifies V1 accurately).
+15V 15 3 e IN 7 6 14 -In 9 -15V +15V 15 3 7 6 14 -In 9
Overall Gain = eOUT/eIN = 200
12 +In x 100 INA102 10 11
e OUT
12 +In x 100 INA102 10 11
-15V
FIGURE 15. Differential Input/Differential Output Amplifier (twice the gain of one INA).
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+15V
11 16 e IN 3 S1 1/2 DG5043CJ S3 15 13 14 15 1 3 7 6 4 14 -In 9 Reference -15V OPA111 or OPA121 1k 5 12 +In x 100 INA102 10 11 0.1F 9 S2 1/2 DG5043CJ S4 10 +15V 11 DG5040CJ S5 15 13 14 -15V
CONTROL All switches shown in Logic "0" switch state. 1 0 S1 Closed Open S2 Closed Open S3 Open Closed S4 Open Closed S5 Closed Open MODE Signal Amplification Auto-Zeroing
8
6
e OUT
16 200s Control
1
FIGURE 16. Auto-Zeroing Instrumentation Amplifier Circuit.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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