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CS8271 Adjustable Micropower Low Dropout Linear Regulator with ENABLE
The CS8271 is an adjustable micropower voltage regulator with very low quiescent current (60 A typical at 100 A load). The output supplies 100 mA of load current with a maximum dropout voltage of only 600 mV. Control logic includes ENABLE. The combination of low quiescent current, outstanding regulator performance and control logic makes the CS8271 ideal for any battery operated equipment. The logic level ENABLE compatible pin allows the user to put the regulator into a shutdown mode where it draws only 50 A of quiescent current. The regulator is protected against reverse battery, short circuit, over voltage, and over temperature conditions. The device can withstand 60 V load dump transients making it suitable for use in automotive environments. The CS8271 is pin compatible with the National Semiconductor LM2931. Features Low Quiescent Current Adjustable Output: 5.0 V to 12 V ENABLE for Sleep Mode Control 100 mA Output Current Capability Fault Protection - +60 V Load Dump - -15 V Reverse Voltage Short Circuit - Thermal Shutdown * Low Reverse Current (Output to Input)
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SO-8 D SUFFIX CASE 751
8 1
8 1
DIP-8 N SUFFIX CASE 626
PIN CONNECTIONS AND MARKING DIAGRAM
SO-8 VOUT GND NC Adj 1 VOUT CS8271 AWL YYWW GND NC Adj A WL, L YY, Y WW, W DIP-8 8 VIN NC NC ENABLE 1 8271 ALYW 8 VIN NC NC ENABLE
* * * * *
= Assembly Location = Wafer Lot = Year = Work Week
ORDERING INFORMATION*
Device CS8271YD8 CS8271YDR8 CS8271YN8 Package SO-8 SO-8 DIP-8 Shipping 95 Units/Rail 2500 Tape & Reel 50 Units/Rail
*Consult your local sales representative for other package options.
(c) Semiconductor Components Industries, LLC, 2001
1
April, 2001 - Rev. 5
Publication Order Number: CS8271/D
CS8271
VOUT VIN Current Source (Circuit Bias) Over Voltage Shutdown
ENABLE Input Current Limit Sense
Adj + Thermal Shutdown - Error Amplifier
Bandgap Reference
GND
Figure 1. Block Diagram MAXIMUM RATINGS*
Rating Power Dissipation Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) Reverse Battery Output Current ESD Susceptibility (Human Body Model) Junction Temperature Storage Temperature Lead Temperature Soldering: Adj, ENABLE VOUT 1. 10 second maximum. 2. 60 second maximum above 183C. *The maximum package power dissipation must be observed. Wave Solder (through hole styles only) (Note 1) Reflow (SMD styles only) (Note 2) Value Internally Limited -50, 60 -15 Internally Limited 2.0 -40 to +150 -55 to +150 260 peak 230 peak -0.3, 10 -0.3, 20 Unit - V V - kV C C C C V V
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CS8271
ELECTRICAL CHARACTERISTICS (VOUT + 1.0 V VIN 30 V, 5.0 V VOUT 12 V, IOUT = 10 mA, -40C TA 125C, -40C TJ 150C, VENABLE = 0 V; unless otherwise specified.)
Characteristic Output Voltage Dropout Voltage Load Regulation Line Regulation Quiescent Current, (IQ) Active Mode IOUT = 100 A, VDROP = (VIN - VOUT) IOUT = 100 mA, VDROP = (VIN - VOUT) Measure VOUT when IOUT = 100 A, 100 mA. LDREG = ABS (VOUT) IOUT = 1.0 mA. Measure VOUT when VIN = VOUT + 1.0 V, 30 V, LNREG = ABS (VOUT) VIN = 6.0 V, IOUT = 100 A, VOUT setup for 5.0 V, IQ = IVIN - IOUT VIN = 13 V, IOUT = 100 A, VOUT setup for 12 V, IQ = IVIN - 100 A VIN = 30 V, IOUT = 100 A, VOUT setup for 5.0 V. IQ = IVIN - 100 A VIN = 30 V, IOUT = 100 A, VOUT setup for 12 V. IQ = IVIN - 100 A IOUT = 50 mA, IQ = IVIN - 50 mA IOUT = 100 mA, IQ = IVIN - 100 mA VIN = 6.0 V, ENABLE = 2.5 V, IQSLEEP = IVIN VIN = 30 V, ENABLE = 2.5 V, IQSLEEP = IVIN f = 120 Hz, Note 3 VOUT = VOUT - 500 mV, ILIM = IVOUT VOUT = 0 V, ISHRT = IVOUT Note 3 Adjust VIN from 28 V to 40 V until VOUT 1.0 V VIN = 0 V, IREV = IVOUT, VOUT = 13.2 V - - - - - - - - - - - - 60 105 15 150 30 - 100 400 0.1 0.1 55 130 150 20 4.0 12 20 75 75 200 100 180 34 100 150 600 1.0 0.5 120 200 450 500 7.0 21 50 350 - 300 215 210 38 200 mV mV %VOUT %VOUT A A A A mA mA A A dB mA mA C V A Test Conditions Min Typ Max Unit
Quiescent Current, (IQ) Sleep Mode Ripple Rejection Current Limit Short Circuit Output Current Thermal Limit Overvoltage Shutdown Reverse Current ENABLE Enable Threshold Enable Input Current Adjustment Pin Reference Voltage Adjustment Pin Current
- VENABLE = 2.6 V VENABLE = 5.0 V
1.15 - -
2.0 10 35
2.6 20 50
V A A
R1: Feedback resistor between VOUT and Adjust, R2: Adjust resistor to ground. 100 A IOUT 100 mA IADJ = (VREF/R2) - ((VOUT - VREF)/R1) 1.246 - 1.272 20 1.297 500 V nA
3. Guaranteed by design, not 100% tested in production.
PACKAGE LEAD DESCRIPTION
PACKAGE LEAD # SO-8 1 2 3, 6, 7 4 5 8 DIP-8 1 2 3, 6, 7 4 5 8 LEAD SYMBOL VOUT GND NC Adj ENABLE VIN FUNCTION 100 mA output; adjustable from 5.0 V to 12 V. Ground. No connection. Resistor divider from VOUT to Adj, sets output voltage. Logic level switch, when High, regulator is in sleep mode. Input voltage.
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CS8271
CIRCUIT DESCRIPTION
OUTPUT VOLTAGE ADJUSTMENT
The output voltage of the CS8271 is adjustable to any value between 5.0 V and the maximum input voltage minus the dropout voltage. To adjust the output voltage, a pair of external resistors R1 and R2 are connected as shown in Figure 2. The equation for the output voltage is
VOUT + VREF R1 ) R2 ) I Adj R2 R1
Short circuit protection limits the amount of current the output transistor can supply. In the case of a CS8271 under a short circuit condition, the output transistor current is limited to 100 mA. Should the junction temperature of the power device exceed 180C (typ) the power transistor is turned off. Thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the IC.
> 30 V VIN
where VREF is the typical reference voltage and IAdj is the adjust pin bias current. This is usually 500 nA maximum.
VOUT VOUT VOUT
CS8271
R1 IOUT Adj VREF R2 Load Dump Short Circuit Thermal Shutdown
Figure 2. Output Voltage Adjustment OUTPUT STAGE PROTECTION
Figure 3. Typical Circuit Waveforms for Output Stage Protection ENABLE
The output stage is protected against overvoltage, short circuit and thermal runaway conditions (Figure 3). If the input voltage rises above 30 V (e.g. load dump), the output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage transients up to 60 V in magnitude.
The ENABLE function switches the output transistor. When the voltage on the ENABLE pin exceeds 2.0 V typ, the output pass transistor turns off, leaving a high impedance facing the load. The IC will remain in Sleep mode, drawing only 20 A (typ), until the voltage on this input drops below the ENABLE threshold.
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CS8271
APPLICATION NOTES
SELECTING THE RIGHT CAPACITOR VALUE
The output compensation capacitor COUT, determines three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. The selection of a capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25C to -40C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provide this information. The value for the output compensation capacitor COUT shown in Figure 4 should work for most applications, but it is not necessarily the least expensive or the optimal solution.
VIN CIN 0.1 F VOUT CS8271 Adj ENABLE RL RRST
CAdj (optional)
COUT 10 F
Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. (A smaller capacitor will usually cost less and occupy less board space.) If the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real work environment. Vary the ESR to reduce ringing. Step 7: Raise the temperature to the highest specified operating temperature. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Capacitance on the Adjust pin combined with the feedback resistors R1 and R2 can affect loop stability and should also be considered. The CS8271 internal circuitry produces about 5.0 pF to Ground on the Adjust pin. This capacitance, plus any additional external capacitance on the Adjust pin will create a pole when combined with the resistive feedback network. The effect can be significant when using large values for the feedback resistors to minimize quiescent current. A capacitor connected from the Adjust pin to Ground provides additional means to compensate the regulator by creating a pole. Alternately, a capacitor can be connected from the Adjust pin to VOUT to create a zero.
Figure 4. Test and Application Circuit Showing An Output Compensation Capacitor
To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. (Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible). Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions.
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CS8271
CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output regulator (Figure 5) is:
PD(max) + VIN(max) * VOUT(min) IOUT(max) ) VIN(max)IQ
(1)
RJA's less than the calculated value in equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.
IIN VIN IOUT
where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RJA can be calculated:
RQJA + 150C * TA PD
(2)
SMART REGULATOR(R)
Control Features
VOUT
IQ
The value of RJA can then be compared with those in the package section of the data sheet. Those packages with
Figure 5. Single Output Regulator With Key Performance Parameters Labeled
VIN
VOUT
VOUT R1 C2** 10 F
CS8271
C1 * 0.1 F ENABLE GND Adj
VREF
R2
C1* Required if regulator is away from power supply filter. C2** Required for output stability.
VOUT + VREF
R1 ) R2 ) I Adj R2
R1
Figure 6. Application Diagram
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CS8271
PACKAGE DIMENSIONS
SO-8 D SUFFIX CASE 751-07 ISSUE W
-X- A
8 5
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
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CS8271
PACKAGE DIMENSIONS
DIP-8 N SUFFIX CASE 626-05 ISSUE L
NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. AC IN DC + IN DC - IN AC IN GROUND OUTPUT AUXILIARY VCC MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10_ 0.030 0.040
8
5
-B-
1 4
F
NOTE 2
-A- L
C -T-
SEATING PLANE
J N D K
M
M TA
M
H
G 0.13 (0.005) B
M
PACKAGE THERMAL DATA Parameter RJC RJA Typical Typical SO-8 45 165 DIP-8 52 100 Unit C/W C/W
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative.
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CS8271/D

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