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DG243
General Purpose Monolithic Dual SPDT CMOS Analog Switch
Features
D D D D D PLUS-40 Process Make-Before-Break Operation Full Rail-to-Rail Analog Signal Range True TTL Compatibility Low rDS(on): 30 W
Benefits
D Low Power D Reduced Switching Noise D Reduced Need for Buffers
Applications
D D D D D Programmable Gain Amplifiers Analog Multiplexing Servo Control Systems Programmable Filters Audio Switching
Description
The DG243 is a monolithic dual SPDT analog switch designed for general switching applications in communication, instrumentation, and process control systems. Featuring make-before-break action, the DG243 is used in closed loop systems to switch gain or bandwidth networks without opening the loop. The DG243 is designed on the Siliconix PLUS-40 CMOS process to combine low power dissipation with a high breakdown voltage rating of 44 V. An epitaxial layer prevents latchup. Each switch conducts equally well in both directions when on, and blocks up to 30 V peak-to-peak when off.
Functional Block Diagram and Pin Configuration
Dual-In-Line
Truth Table
D1 NC D3 S3 S4 D4 NC D2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 S1 IN1 V- GND VL V+
Logic
0 1
SW1, SW2
OFF ON Logic "0" v 0.8 V Logic "1" w 2.0 V
SW3, SW4
ON OFF
Ordering Information
IN2 S2
Temp Range
0_C to 70_C
Package
16-Pin Plastic DIP
Part Number
DG243CJ
Top View
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70042.
Siliconix S-52880--Rev. B, 28-Apr-97
1
DG243
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V GND to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND - 0.3 V) to 44 V Digital Inputsa VS, VD . . . . . . . . . . . . . . . (V-) -2 V to (V+ plus 2 V) or 30 mA, whichever occurs first Current (Any Terminal) Continuous . . . . . . . . . . . . . . . . . . . . . 30 mA Current, S or D (Pulsed 1 ms 10% duty) . . . . . . . . . . . . . . . . . 100 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 125_C Notes: a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads welded or soldered to PC Board. c. Derate 6 mW/_C above 75_C Power Dissipation (Package)b 16-Pin Plastic DIPc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Specifications
Test Conditions Unless Otherwise Specified Parameter Analog Switch
Analog Signal Ranged Drain-Source On-Resistance VANALOG rDS(on) IS(off) Switch Off Leakage Current ID(off) Channel On Leakage Current ID(on) VD = VS = "14 V VD = "14 V VS = #14 V V, IS = -10 mA, VD = "10 V Full Room Full Room Full Room Full Room Full -1 -100 -1 -100 -2 -200 -15 30 "0.3 "0.3 "0.5 15 50 75 1 100 1 100 2 200 nA V W
C Suffix
0 to 70_C
Symbol
V+ = 15 V, V- = -15 V VL = 5 V, VIN = 2.0 V, 0.8 Ve
Tempa
Minc
Typb
Maxc
Unit
Digital Control
Input Current with VIN Low Input Current with VIN High IIL IIH VIN= 0.8 V VIN= 2.0 V Full Full -1 -1 -0.005 -0.01 1 1 mA
Dynamic Characteristics
Turn-On Time Turn-Off Time Charge Injection Off Isolation Reject Ratio Crosstalk (Channel-to-Channel) Source-Off Capacitance Drain-Off Capacitance Channel-On Capacitance tON tOFF Q OIRR XTALK CS(off) CD(off) CD + S (on) f = 1 MHz, VS = 0 V Room RL = 1 kW , CL = 35 pF See Figure 2 pF, CL = 1000 pF, VGEN = 0 V RGEN = 0 W RL = 75 W , f = 1 MHz Room Room Room Room Room Room Room 250 390 60 75 89 15 17 45 pF 700 1200 ns pC dB
Power Supplies
Positive Supply Current Negative Supply Current Logic Supply Current Ground Current I+ I- IL IGND All Channels On or Off Room Room Room Room -300 -300 180 -150 100 -140 300 300 mA
Notes: a. Room = 25_C, Full = as determined by the operating temperature suffix. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Guaranteed by design, not subject to production test. e. VIN = input voltage to perform proper function.
2
Siliconix S-52880--Rev. B, 28-Apr-97
DG243
Schematic Diagram (Typical Channel)
V+
S VL V- - + V+ GND INX D
V-
Figure 1.
Test Circuits
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform. +5 V +15 V 3V 50% 0V VS 90% Switch Output VO tON tOFF -15 V CL (includes fixture and stray capacitance) RL VO = VS RL + rDS(on) tr < 20 ns tf < 20 ns "10 V
Logic Input Switch Input
VL S1 IN1 GND
V+ D1
VO RL 1 kW CL 35 pF
V-
Figure 2. Switching Time
+5 V +15 V
Rg
VL S IN
V+ D CL 10 nF V-
VO
Vg 3V
GND
-15 V
Figure 3. Charge Injection
Siliconix S-52880--Rev. B, 28-Apr-97
3
DG243
Applications
The make-before-break operation of the DG243 provides simple transient suppression in these two important applications. Figure 3 shows a minimum amount of glitching during changes of gain states. The relatively low impedance of the gain setting resistors (10 kW , 1 kW , and 100 W) shunt the injected charge-to-ground minimizing transient effects occurring at the inverting input of the op amp. Consequently, these transients are not amplified to VOUT. Figure 4 takes advantage of the make-before-break operation of the DG243 by shorting transition current to real ground instead of virtual ground. The best results are obtained by selecting an op amp with the proper offset voltage specification.
VIN1
S1 IN1
D1 - +
Op Amp VOUT
VIN2
S2 IN2
D2
DG243
Figure 4. Minimizing Glitches in Audio Switching
VOUT VIN + - 10 kW S1 D1 1 kW S3 IN1
1/ 2
High Speed Op Amp
VIN
VOUT
D3 IN DG243 100 W Clean transitions no glitches due to op amp open loop.
Figure 5. Make-Before-Break Improves Transient Response in Programmable Gain Amplifiers
4
Siliconix S-52880--Rev. B, 28-Apr-97

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