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| HB56T132D Series 1,048,576-word x 32-bit High Density Dynamic RAM Module ADE-203Rev. 0.0 Dec. 1, 1995 Description The HB56T132D is a 1 M x 32 dynamic RAM Small Outline DIMM (S. O. DIMM), mounted 8 pieces of 4-Mbit DRAM (HM514400CTT/CLTT) sealed in TSOP package. An outline of the HB56T132D is 72pin Zig Zag Dual tabs socket type compact and thin package. Therefore, the HB56T132D makes high density mounting possible without surface mount technology. The HB56T132D provides common data inputs and outputs. Decoupling capacitors are mounted beside the each TSOP of its module board. Features * * * * 72-pin -- Lead pitch: 1.27 mm Single 5 V ( 5%) supply High speed -- Access time: 60 ns/70 ns/80 ns (max) Low power dissipation -- Active mode: 4.62 W/4.20 W/3.73 W (max) -- Standby mode: 84 mW (max) 4.2 mW (max) (L-version) Fast page mode capability 1024 refresh cycle: 16 ms 1024 refresh cycle: 128 ms (L-version) 2 variations of refresh -- RAS-only refresh -- CAS-before-RAS refresh TTL compatible * * * * HB56T132D Series Ordering Information Type No. HB56T132D-6C HB56T132D-7C HB56T132D-8C HB56T132D-6CL HB56T132D-7CL HB56T132D-8CL Access time 60 ns 70 ns 80 ns 60 ns 70 ns 80 ns Package 72-pin Small outline DIMM Contact Pad Gold Pin Arrangement 1 pin 71 pin 2 pin 72 pin 2 HB56T132D Series Pin Arrangement Pin No. 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 Pin name VSS DQ1 DQ3 DQ5 DQ7 PD1 A1 A3 A5 NC DQ9 DQ11 DQ13 DQ15 NC A8 NC DQ16 Pin No. 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 Pin name DQ18 VSS CE2 CE1 NC WE DQ20 DQ22 DQ24 NC DQ28 DQ31 VCC DQ33 NC PD3 PD5 PD7 Pin No. 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 Pin name DQ0 DQ2 DQ4 DQ6 VCC A0 A2 A4 A6 NC DQ10 DQ12 DQ14 A7 VCC A9 RE2 NC Pin No. 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 Pin name DQ19 CE0 CE3 RE0 NC NC DQ21 DQ23 DQ25 DQ27 DQ29 DQ30 DQ32 DQ34 PD2 PD4 PD6 VSS 3 HB56T132D Series Pin Description Pin name A0 - A9 A0 - A9 DQ0 - DQ7 DQ9 - DQ16 DQ18 - DQ25 DQ27 - DQ34 CE0 - CE3 RE0, RE2 WE VCC VSS PD1 - PD7 NC Function Address input Refresh address input Data-in/data-out Column address strobe (CAS) Row address strobe (RAS) Read/write enable Power supply (+5 V) Ground Presence detect pin No connection Presence Detect Pin Arrangement HB56T132D Pin No. Pin name 60 ns 11 66 67 68 69 70 71 PD1 PD2 PD3 PD4 PD5 PD6 PD7 NC VSS VSS NC NC NC NC 70 ns NC VSS VSS NC VSS NC NC 80 ns NC VSS VSS NC NC VSS NC 4 HB56T132D Series Block Diagram RE0 CE0 WE CAS DQ0 ~ DQ3 4 I/O1~I/O4 D0 RAS WE DQ18 ~ DQ21 4 CAS I/O1~I/O4 D4 RAS WE RE2 CE2 OE OE CAS DQ4 ~ DQ7 4 I/O1~I/O4 RAS WE DQ22 ~ DQ25 4 CAS I/O1~I/O4 RAS WE D1 D5 OE OE CE1 CAS DQ9 ~ DQ12 4 I/O1~I/O4 D2 RAS WE DQ27 ~ DQ30 4 CAS I/O1~I/O4 D6 RAS WE CE3 OE OE CAS DQ13 ~ DQ16 4 I/O1~I/O4 RAS WE DQ31 ~ DQ34 4 CAS I/O1~I/O4 RAS WE D3 D7 OE OE PD1 PD2 PD3 PD4 PD5 PD6 PD7 J1 J2 J3 J4 J5 J6 J7 A0-A9 VCC D0-D7 D0-D7 C0-C7 D0-D7 Note : D0-D7 : HM514400 C0-C7 : Chip capacitor J1-J7 : Jumper Chip VSS 5 HB56T132D Series Absolute Maximum Ratings Parameter Voltage on any pin relative to V SS (Input) (Output) Supply voltage relative to VSS Short circuit output current Power dissipation Operating temperature Storage temperature Symbol Vin Vout VCC Iout PT Topr Tstg Value -1.0 to + 7.0 -1.0 to + 7.0 -1.0 to + 7.0 50 8 0 to +70 -55 to +125 Unit V V V mA W C C Recommended DC Operating Conditions (Ta = 0 to +70C) Parameter Supply voltatge Symbol VSS VCC Input high voltage Input low voltage Note: VIH VIL Min 0 4.75 2.4 -1.0 Typ 0 5.0 -- -- Max 0 5.25 6.5 0.8 Unit V V V V 1 1 1 Note 1. All voltage referred to VSS 6 HB56T132D Series DC Characteristics (Ta = 0 to +70C, VCC = 5 V 5%, VSS = 0 V) HB56T132D 60 ns Parameter Operating current Standby current Symbol Min I CC1 I CC2 -- -- Max 880 16 70 ns Min -- -- 80 ns Max Min 800 16 -- -- Max Unit Test conditions 720 16 mA mA t RC = min TTL interface RAS, CAS = VIH Dout = High-Z CMOS interface RAS, CAS V CC-0.2 V Dout = High-Z 4 CMOS interface RAS, CAS = VIH, WE, address, Din = VIH or VIL Dout = High-Z mA mA mA mA mA t RC = min RAS = VIH CAS = VIL Dout = enable t RC = min t PC = min 1, 3 2 1 Notes 1, 2 -- 8 -- 8 -- 8 mA Standby current (L-version) I CC2 -- 0.8 -- 0.8 -- 0.8 RAS-only refresh current Standby current CAS before RAS refresh current First page mode current Battery backup operation current (CBR refresh) (L-version) Input leakage current Output leakage current I CC3 I CC5 I CC6 I CC7 I CC10 -- -- -- -- -- 880 40 880 880 1.6 -- -- -- -- -- 800 40 800 800 1.6 -- -- -- -- -- 720 40 720 720 1.6 t RC = 125 s, tRAS 1 s 4 WE = VIH, CAS = VIL address, Din = VIH or VIL Dout = High-Z 0 V Vin 7.0 V 0 V Vout 7.0 V Dout = disable High Iout = -5.0 mA Low Iout = 4.2 mA I LI I LO -10 -10 2.4 0 10 10 VCC 0.4 -10 -10 2.4 0 10 10 VCC 0.4 -10 -10 VCC 0 10 10 2.4 0.4 A A V V Output high voltage VOH Output low voltage VOL Notes: 1. I CC depends on output load condition when the device is selected ICC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. Address can be changed once or less while CAS = VIH. 4. VCC - 0.2V VIH 6.5V, 0V VIL AO 0.2V 7 HB56T132D Series Capacitance (Ta = 25C, VCC = 5 V 5%) Parameter Input capacitance (Address) Input capacitance (WE) Input capacitance (RAS) Input capacitance (CAS) I/O capacitance (DQ) Symbol CI1 CI2 CI3 CI4 CI/O Typ -- -- -- -- -- Max 68 76 43 29 17 Unit pF pF pF pF pF Notes 1 1 1 1 1, 2 Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. CAS = VIH to disable Dout. AC Characteristics * * Refer to the HM514400C Series data sheet. The HB56T132D Series writes data only in early write cycle (t WCS tWCS (min)). Delayed write cycle is not available (OE pin is fixed to VSS). 8 HB56T132D Series Physical Outline A 59.69 0.13 (5.00) 2 - R2.00 0.13 2 - 1.80 0.08 R2.00 0.13 25.40 0.13 51.66 0.13 3.80 Max Unit: mm 6.35 0.13 1.80 0.13 17.78 0.13 2.54 Min 2.00 0.13 7.62 0.1 1.00 1.27 1.00 0.1 44.45 0.1 8.25 0.1 44.45 0.1 Detail A 60 ns 70 ns 80 ns 9 |
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