View 5003_968287.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
ST19 FAMILY
Smartcard MCU Family of Products
DATA BRIEFING
s s
8 BIT ARCHITECTURE CPU FROM 32 KBytes OF USER ROM, WITH PARTITIONING SYSTEM ROM FOR LIBRARIES UP TO 2 KBytes OF RAM WITH PARTITIONING UP TO 64 KBytes OF EEPROM WITH PARTITIONING - Highly reliable submicron CMOS EEPROM technology - 10 year data retention - 100 000 Erase/Write cycle endurance - Separate Program and Erase cycles for fast "1" programming - 1 to 64 Bytes Erase or Program in 1 ms
s s
- Software selectable operand length (up to 2176 bits) SECURITY FIREWALLS FOR MAP AND MEMORIES VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH PROGRAM AND RAM FLASH CLEAR POSSIBLE ADDITION OF CUSTOM LOGIC BLOCKS 8 BIT TIMER SERIAL ACCESS, ISO 7816-3 COMPATIBLE 3V 10% OR 5V 10% SUPPLY VOLTAGE STANDBY MODE FOR POWER SAVING UP TO 10 MHz INTERNAL OPERATING FREQUENCY CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 ESD PROTECTION GREATER THAN 5000V 2 OPERATING CONFIGURATIONS - ISSUER - USER
s s
s
s
s s s s s
s
MODULAR ARITHMETIC PROCESSOR - Fast modular multiplication and squaring using Montgomery method - Software Crypto Libraries in separate ROM area for efficient algorithm coding using a set of advanced functions
s
s s
Table 1 Features by Product
Feature USER ROM RAM EEPROM MAP and Firmware ST19SF64 32K 960 64K No ST19SF32 32K 960 32K No ST19SF16 32K 960 16K No ST19SF08 32K 960 8K No ST16KF16 32K 1984 16K 1088 bits ST19CF68 23K 960 8K 512 bits
BD.19/9809VP6
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
1/3
1
ST19 FAMILY
DESCRIPTION HARDWARE DESCRIPTION All the products of the ST19 FAMILY are based on a STMicroelectronics 8 bit CPU core including onchip memories: up to 2 KBytes of RAM, from 32 KBytes of USER ROM and up to 64 KBytes of EEPROM. RAM, ROM and EEPROM memories can be configured into partitions. Access rules from any memory partition to any other partition are setup by the user defined Memory Access Control Logic. They are manufactured using the highly reliable ST submicron CMOS EEPROM technology and are fully compatible with the ISO standards for Smartcard applications. MODULAR ARITHMETIC PROCESSOR The internal Modular Arithmetic Processor is designed to speed up cryptographic calculations using Public Key Algorithms. Based on a 512 bit or 1088 architecture, it processes modular multiplication and squaring up to 2176 bit operands. SOFTWARE SUPPORT SOFTWARE DEVELOPMENT Software development and firmware (ROM code/ options) generation are completed by the ST1619HDS development system. CRYPTO LIBRARIES For an easy and efficient use of the Modular Arithmetic Processor (MAP), ST proposes a complete set of firmware subroutines. This library is located in a specific ROM area, leaving 32 KBytes minimum in the User ROM for the application software. This library saves the operating system designer from coding first layer functions and allows the designer to concentrate on algorithms and Public Key Cryptographic (PKC) protocol implementation. This library contains firmware functions for: - loading and unloading parameters and results to or from the MAP - calculating Montgomery constants - basic mathematics including modular squaring and multiplication for various lengths - modular exponentiation or not using the Chinese Remainder Theorem (CRT), - more elaborate functions such as RSA signatures and authentications for any modulo length up to 1024/2048 bits long or DSA signature and verification, elliptic curves. - full internal key generation for signatures/authentications. This guarantees that the secret key will never be known outside the chip and contributes to overall system security. - long random number generation - sha-1
FAST CRYPTOGRAPHIC FUNCTIONS PROCESSING (5V 10%, 5MHz)
Function RSA 512 bits signature with CRT * RSA 512 bits signature without CRT RSA 512 bits verification (e=$10001) RSA 1024 bits signature with CRT RSA 1024 bits signature without CRT RSA 1024 bits verification (e=$10001) RSA 2048 bits signature with CRT RSA 2048 bits verification EC 160 bits signature EC 160 bits verification
Note *
MAP 512 70 ms 200 ms 6 ms 400 ms N/A 150 ms N/A N/A N/A N/A
MAP 1088 20 ms 60 ms 3 ms 110 ms 380 ms 8 ms 800 ms 100 ms 250 ms 500 ms
CRT: Chinese Remainder Theorem
2/3
ST19 FAMILY
Figure 1 Block Diagram
RAM up to 2K Bytes
EEPROM up to 64 K Bytes
USER ROM from 32 K Bytes
SYSTEM ROM AND CRYPTO LIBRARIES
MAP 512 or 1088 BITS
MEMORY ACCESS FIREWALL
SYSTEM ROM AND SYSTEM ROM AND MAP FIREWALL MAP FIREWALL
INTERNAL BUS
CLOCK GENERATOR MODULE
8 BIT TIMER
CUSTOM LOGIC BLOCK
SECURITY ADMINISTRATOR
UNPREDICTABLE NUMBER GENERATOR
8 BIT CPU
SERIAL I/O INTERFACE
CLK
RESET
Vcc
GND
I/O
ON OPTION
SCP 099b/DS
3/3

▲Up To Search▲

Price & Availability of 5003

	To Download 5003 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .