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| 2N6897 December 2001 -12A, -100V, P-Channel Enhancement Mode Power MOS Field Effect Transistor Description The 2N6897 is an P-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This device can be operated directly from an integrated circuit. Features * -12A, -100V * rDS(ON) = 0.3 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device Symbol D Ordering Information PART NUMBER 2N6897 PACKAGE TO-204AA BRAND 2N6897 G NOTE: When ordering, include the entire part number. S Packaging JEDEC TO-204AA (c)2001 Fairchild Semiconductor Corporation 2N6897 Rev. B 2N6897 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified 2N6897 -100 -100 -12 -30 20 100 0.8 -55 to 150 260 UNITS V V A A V W W/oC oC oC Drian to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVDSS Drian to Gate Voltage (RGS = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Above TC = 25oC, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (At distance 1/8 in. (3.17mm) from seating plane for 10s max) CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications PARAMETER Drian to Source Breakdown Voltage Gate to Threshold Voltage Zero-Gate Voltage Drain Current Zero-Gate Voltage Drain Current TC = 125oC Gate to Source Leakage Current TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 1mA, VGS = 0V VGS = VDS, ID = 0.25mA VDS = -80V VDS = -80V IGSS VDS(ON) rDS(ON) VGS = 20V, VDS = 0V ID = 7.6A, VGS = -10V ID =12A, VGS = -10V ID = 7.6A, VGS = -10V ID = 7.6A, VGS = 10V gfs CISS COSS CRSS td(ON) tr td(OFF) tf RJC ID = 7.6A, VDS = -50V RGEN = RGS = 15, VGS = -10V ID = 7.6A, VDS = -10V VGS = 0V, VDS = -25V f = 0.1MHz MIN -100 -2 2 400 200 60 TYP MAX -4 1 50 100 2.28 -4.8 0.3 0.465 8 1500 700 240 60 175 275 175 1.25 UNITS V V A A nA V V S pF pF pF ns ns ns ns oC/W Drian to Source On-Voltage (Note 1) Static Drian to Source On Resistance (Note 1) Static Drian to Source On Resistance TC = 125oC (Note 1) Forward Transconductance (Note 1) Input Capacitance Output Capacitance Reverse-Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Thermal Resistance Junction-to-Case Source to Drain Diode Specifications PARAMETER Diode Forward Voltage (Note 1) Diode Reverse Recovery Time NOTE: 4. Pulsed: pulse duration = 300s, max, duty cycle = 2%. SYMBOL VSD trr TEST CONDITIONS ISD = 12A IF = 4A, dIF/dt = 100A/s MIN 0.8 TYP MAX 1.6 500 UNITS V ns (c)2001 Fairchild Semiconductor Corporation 2N6897 Rev. B 2N6897 Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 ID, DRAIN CURRENT (A) 0.8 10 Unless Otherwise Specified 100 TC = 25oC TJ = MAX RATED 100s 1.0ms 10ms OPERATION IN THIS AREA LIMITED BY rDS(ON) 1 100ms DC VDSS(MAX) = 100V 0.01 1 10 100 VDS, DRAIN TO SOURCE (V) 1000 0.6 0.4 0.2 0.0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150 FIGURE 15. NORMALIZED POWER DISSIPATION vs TEMPERATURE DERATING CURVE FIGURE 16. MAXIMUM OPERATING AREAS CURVE 24 Id(ON), ON-STATE DRAIN CURRENT (A) rDS(ON), DRAIN TO SOURCE ON RESISTANCE () 20 16 125oC 12 8 4 125oC 0 -1 -2 -3 -4 -40oC -5 -6 -7 -8 VDS = 10V PULSE TEST PULSE DURATION = 80s DUTY CYCLE 2% 25oC -40oC 0.4 VGS = 10V PULSE TEST PULSE DURATION = 80s DUTY CYCLE 2% 125oC 0.3 0.2 25oC -40oC 0.1 0 0 2 4 6 8 10 12 14 16 18 20 ID, DRAIN CURRENT (A) VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 17. TRANSFER CHARACTERISTICS FIGURE 18. DRAIN TO SOURCE ON RESISTANCE AS A FUNCTION OF DRAIN CURRENT 1.3 1.2 VGS(TH), NORMALIZED GATE THRESHOLD VOLTAGE (V) 1.1 1 0.9 0.8 0.7 ID = 0.25mA VDS = VGS 2.0 NORMALIZED DRAIN TO SOURCE ID = 7.6A VGS = 10V ON RESISTANCE (m) 1.5 1.0 0.5 0 -50 0 50 100 150 -50 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC) FIGURE 19. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE FIGURE 20. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE (c)2001 Fairchild Semiconductor Corporation 2N6897 Rev. B 2N6897 Typical Performance Curves 2400 2000 PF, CAPACITANCE (C) Unless Otherwise Specified (Continued) gfs, FORWARD TRANSCONDUCTANCE (S) f = 1MHz 7 6 5 4 3 2 1 0 0 1 2 6 7 3 4 5 ID, DRAIN CURRENT (A) -40oC 25oC 1600 1200 800 COSS 400 CRSS 0 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 CISS 125oC 8 9 10 FIGURE 21. CAPACITANCE vs VOLTAGE FIGURE 22. FORWARD TRANSCONDUCTANCE AS A FUNCTION OF DRAIN CURRENT Test Circuit and Waveforms VDD RL VDS VDS VGS 10% 10% 90% VGS 10% 50% PULSE WIDTH 50% tON td(ON) tr 90% tOFF td(OFF) tf 90% 0V RGS DUT FIGURE 23. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 24. RESISTIVE SWITCHING WAVEFORMS (c)2001 Fairchild Semiconductor Corporation 2N6897 Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R) SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R) VCXTM STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 |
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