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| PMC-Sierra,Inc. PM7344 S/UNI-MPH microprocessor bus interface for configuration, control, and status monitoring. * Low power, +5 V, CMOS technology. * Packaged in a 128-pin rectangular (14 mm by 20 mm) PQFP package. * Supports CRC multiframe alignment or the signalling multiframe alignment. * Declares red and AIS alarms using Q.516 recommended integration periods. Provides LOS detection, and indicates loss of frame alignment (OOF), loss of signalling, and loss of CRC multiframe alignment. * Supports line and path performance monitoring according to ITU-T recommendations. Accumulators are provided for counting CRC-4 errors, FEBE, frame sync errors, and LCVs. * Supports reception and transmission of remote alarm and AIS. * Provides an HDLC interface for terminating/generating a datalink. * Supports the timeslot 16 (64 kbit/s) datalink which may be used for common channel signalling, or any combination of the national bits. Quad T1/E1 Multi-PHY SATURN User Network Interface FEATURES * Monolithic single-chip quad ATM Physical Layer User Network Interface (UNI) operating at 1.544 Mbit/s or 2.048 Mbit/s. * Integrates a quad full-featured dualmode T1/E1 framer/transmitter for terminating four duplex 1.544 Mbit/s DS1 or four duplex 2.048 Mbit/s E1 signals. Recovers T1/E1 clock and data using a digital phase locked loop for high jitter tolerance. * Implements the ATM Forum UNI Specification V3.1 for DS1 and E1 transmission rates. * Implements the ATM physical layer for Broadband ISDN according to ITU-T Recommendation I.432. * Implements direct mapping into four T1 or E1 streams according to ITU-T Recommendation G.804. * Provides UTOPIA L1-compliant, UTOPIA L2-compatible ATM-PHY interface with parity and multi-PHY control signals. * Software-compatible with the PM4341A T1XC, PM6341 E1XC, PM4351 COMET, PM5346 S/UNI(R)LITE and PM7345 S/UNI-PDH. * Application-compatible with the PM8313 D3MX, PM4314 QDSX, and PM7323 RCMP-200. * Provides a generic 8-bit T1 FRAMER/TRANSMITTER * Supports SF or ESF format signals using B8ZS or AMI line code. * Provides Loss Of Signal (LOS) detection and red, yellow and Alarm Indication Signal (AIS) alarm detection. Supports transmission of (AIS) or yellow alarm signal in all formats. * Detects violations of the ANSI T1.403 12.5% pulse density rule over a moving 192-bit window. * Supports line and path performance monitoring according to ANSI specifications. Accumulators are provided for counting ESF CRC-6 errors, framing bit errors, LCVs, and LOF, or frame alignment events. * Provides ESF bit-oriented code detection/generation, and an HDLC interface for terminating/generating the ESF datalink. * Extracts/inserts the datalink in ESF mode. APPLICATIONS * ATM Switches Supporting DS1 or E1 UNI Ports * ATM Switches Supporting DS3 or E3 Ports Carrying Multiplexed DS1 or E1 UNI Signals * ATM Switches Supporting SONET/ SDH Ports Carrying Tributary Mapped DS1 or E1 UNI Signals * ATM Customer Premise Equipment Supporting Multiple DS1 or E1 UNI Ports E1 FRAMER/TRANSMITTER * Supports G.704 2048 kbit/s format using HDB3 or AMI line coding. BLOCK DIAGRAM TDLUDR/ TDLCLK[4:1] TDLINT/ TDLSIG[4:1] TCLKI TFPI/TOHI TRSTB XCLK TDO TMS TCK TDI TSOC TDAT[7:0] HDLC Transmitter Bit-oriented Code Transmitter In-band Loopback Code Generator JTAG Test Access Port TXPRTY TCA[4:1] TWRENB[4]/TCAMPH TWRENB[3]/TWA[1] Transmit ATM Cell Processor Transmit ATM 4-Cell FIFO TWRENB[2]/TWA[0] TWRENB[1]/TWRMPHB Multi-PHY Interface TFCLK RSOC RDAT[7:0] RCLKI[4:1] RDP/RDD[4:1] RDN/RLCV/ROH[4:1] Digital Receive Interface Pulse Density Violation Detector T1/E1 Framer Receive ATM Cell Processor Receive ATM 4-Cell FIFO RXPRTY RCA[4:1] RRDENB[4]/RCAMPH RRDENB[3]/RRA[1] HDLC Receiver Bit-oriented Performance Code Monitor Receiver In-band Code Detector Alarms Integrator Microprocessor Interface RRDENB[2]/RRA[0] RRDENB[1]/RRDMPHB RFCLK TCLKO[4:1] TDP/TDD[4:1] TDN/TOHO[4:1] Digital Transmit Interface Pulse Density Enforcer T1/E1 Framing Insertion D[7:0] RDLINT/ RDLSIG[4:1] RDLEOM/ RDLCLK[4:1] A[10:0] ALE CSB WRB RDB RCLKO RSTB INTB PMC-941028 (R4) (c) 1998 PMC-Sierra, Inc. September, 1998 MPHEN PM7344 S/UNI-MPH Quad T1/E1 Multi-PHY SATURN User Network Interface TYPICAL APPLICATIONS DS3 PORT CARRYING MULTIPLEXED T1 ATM UNI SIGNALS 1.544 MHz Transmit Reference Clock #1 PM7344 S/UNI(R)-MPH Quad T1/E1 Multi-PHY SATURN(R) UNI DSX-3 Line Interface with Clock Recovery 6.312 MHz Optional Transmit Reference Clock 44.736 MHz Transmit Reference Clock DSX-3 Analog Interface Microprocessor Bus 12.352 MHz 1.544 MHz PM7344 S/UNI(R)-MPH Quad T1/E1 Multi-PHY SATURN(R) UNI UTOPIA or SCI-PHYTM Multi-PHY ATM Cell Bus T1 OR E1 MULTI-PHY ATM UNI 1.544 MHz Transmit Reference Clock #7 PM7344 S/UNI(R)-MPH Quad T1/E1 Multi-PHY SATURN(R) UNI PM8313 D3MX M13 Multiplexer/ Demultiplexer Crystal Oscillator Clock 12.352 MHz Microprocessor Bus UTOPIA or SCI-PHYTM Multi-PHY ATM Cell Bus PM4314 QDSX Quad DSX1/E1 Analog Line Interface DSX-1 or E1 Analog Interface or 12.352 MHz Crystal Oscillator Clock 37.056 MHz Microprocessor Bus Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-941028 (R4) (c) 1998 PMC-Sierra, Inc. September, 1998 SATURN, SCI-PHY, S/UNI-LITE, and S/UNI-MPH are trademarks of PMC-Sierra, Inc. |
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