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M-991
Call Progress Tone Generator
Features Generates standard call progress tones Digital input control Linear (analog) output Power output capable of driving standard line 14-pin DIP and 16-pin SOIC package types Single supply 5V CMOS (low power) Inexpensive 3.58 MHz time base Temperature range from -25C to 70C (-01 version) * Temperature range from -40C to 85C (-02 version) * * * * * * * * Applications * * * * * Telephone systems Test equipment Callback Security systems Billing systems Description The M-991 is a call progress tone generator integrated circuit for use in telephone systems. The circuit uses low-power CMOS techniques to generate tones which are digitally controlled and highly linear. The M-991 is designed to permit operation with almost any system. The use of integrated circuit techniques allows the M991 to incorporate the control, tone generating, and power output buffer into a single 14-pin DIP or a 16-pin SOIC. A 3.58-MHz (color burst) crystal-controlled time base guarantees accuracy and repeatability.
Ordering Information Part # M-991 M-991-01SM M-991-01SMTR M-991-02SM M-991-02SMTR Description 14-pin plastic DIP 16-pin SOIC 16-pin SOIC Tape and Reel 16-pin SOIC, Extended Temperature Range 16-pin SOIC, Extended Temperature Range, Tape and Reel
Pin Assignments
Block Diagram
DS-M991-R1
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1
M-991
Absolute Maximum Ratings
Storage Temperature Operating Ambient Temperature Operating Ambient Temperature for the M-991-02SM VDD Any Input Voltage -55 to 125 C -25 to 70 C -40 to 85 C 7.0V VSS -0.6 to VDD +0.6V Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. Exposure of the device to the absolute maximum ratings for an extended period may degrade the device and effect its reliability.
Note: 1. Exceeding these ratings may permanently damage the M-991.
Specifications
Parameter Power Supply and Reference VDD Current Drain, IDD VREF Pin: Deviation from (VDD + VSS)/2 Internal Resistance from VREF to VDD, VSS Oscillator Frequency Deviation External Clock: (XOUT open) VIL VIH Duty Cycle XIN, XOUT Loading: Capacitance Resistance Tone Output Frequency Deviation Level Distorting Components Idle OUTDRIVE Envelope Rise Time Control DX, CE Pns: VIL VIH Mute Pins: VOL (ISINK = -100 A) Timing VOH (ISOURCE = 100 A) Data Setup (tDS) Data Hold (tDH) Chip Enable Fall (tPL) Tone On Delay (tTO) Tone Off Delay (tTD) Mute Delay from Outdrive (tMO)
Notes: (unless otherwise specified) 1. All DC voltages are referenced to VSS. 2. Vrms per tone, 540 W load. 3. Any one frequency relative to the lowest level output tone (f<4000 Hz). 4. 0 dBm = 0.775 Vrms. 5. To 90% maximum amplitude. 6. For all supply voltages in the operating range.
Min 4.75 -2 3.25 -0.01 0 VDD - 0.2 40 20 -0.5 100 -35 2.5 VDD - 1.5 200 10 -
Typ 2.0/4.0 -
Max 5.25 +2 6.75 +0.01 0.2 VDD 60 10 +0.5 180 -60 4 0.5 1.5 90 5 5 200
Units V mA % k % V V % pF M % mV dB dBm ms V V V V ns ns ns ms ms ns
Notes 1 8
7
10 2 3 4 5 6
11
7. At XOUT pin as compared to 3.579545 MHz. 8. OUTDRIVE with load >5 KW/OUTDRIVE with 540 W load. 9. Resistance at VREF to VDD or VSS > 1 MW. 10. Crystal oscillator active. 11. Measured 90% to 10%.
2
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Rev. 1
M-991
Call Progress Tone Generation Call progress tones are audible tones sent from switching systems to calling parties (or equipment) to indicate the status of calls. Calling parties can identify the success of a placed call by what is heard after dialing. The M-991 series utilizes a highly linear tone generator that produces the unique frequencies (singly or in pairs) that are common to call progress signals. Duration and frequency selection are digitally controlled (see the Data/Tone Selection table below for data settings for a particular tone output). A typical control sequence for the M-991 is: (1) set data lines to desired frequency selection, (2) wait for data lines to settle, (3) drive the chip enable (CE) low, (4) maintain CE low for desired tone duration (Note: data lines may be changed after data hold time), and (4) return CE to Data/Tone Selection
D0 0 0 0 0 0 0 0 0 1 1 D1 0 0 0 0 1 1 1 1 0 0 D2 0 0 1 1 0 0 1 1 0 0 D3 0 1 0 1 0 1 0 1 0 1 Frequency (Hz) 1 2 350 440 400 off 440 off 440 480 440 620 480 off 480 620 350 off 620 off 941 1209 Use Dial Tone Special Alert Tone Audible Ring Pre-empt Bell high tone Reorder(Bell low) Special Special DTMF "*"
a logic high. (Commonly used call progress tones are shown in the Data/Tone Selection table below.) In a bus-oriented system, noise on the data lines may propagate through the device and appear at the output. To safeguard against this, use an external latch to lock the data into the device. In addition, it is good practice to bypass the VREF pin to ground with a small capacitor (0.01 mF) to reduce power supply noise. The designer should be aware of device timing requirements and design accordingly. The data input pins may be tied high (+5 VDC) or low (ground) as required, but D4 and D5 must be left open. Beware of hardwiring the CE pin for dedicated tone generation. This input is edge triggered. An RC network like that shown in the Power-on Reset Circuit on Page 4 should be used to momentarily reset the device immediately following power-up to ensure proper operation. Pin Function
Pin CE D0 - D3 D4-D5 MUTE OUTDRIVE VDD VREF VSS XIN XOUT Function Latches data and enables output (active low input). Data input pins. (See Data/Tone Selection.) Leave open. Output indicates that a signal is being generated at OUTDRIVE. Linear buffered tone output. Most positive power supply input pin. Internally generated mid-power supply voltage (output). Most negative power supply input pin. Crystal oscillator or digital clock input. Crystal oscillator output.
Standard Call Progress Tones
Tone Name Dial Reorder Busy Audible Ring Recall Dial Special AR Intercept Call Waiting Busy Verification Executive Override Confirmation
Rev. 1
Frequency (Hz) 1 2 350 480 480 440 350 440 440 440 440 440 350 440 620 620 480 440 480 620 Off Off Off 440 Steady
Interruption Rate
Repeat, tones on and off 250 ms 25 ms each. Repeat, tones on and off 500 ms 50 ms each. Reat, tones on 2 0.2 s, tones off 4 0.4 s Three bursts tones on and off 100 ms 20 ms each followed by dial tone. Tones on 1 0.2s, followed by single 440 Hz on for 0.2s on, and silence for 3 0.3 s, repeat. Repeat alternating tones, each on for 230 ms 70 ms with total cycle of 500 50 ms. One burst 200 100 ms One burst of tone on 1.75 0.25 s before attendant intrudes, followed by burst of tone 0.65 0.15 s on, 8 to 20 s apart for as long as the call lasts One burst of tone for 3 1 s before overriding station intrudes Three bursts on and off 100 ms each or 100 ms on, 100 ms off, 300 ms on
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3
M-991
Power-on Reset Circuit
Timing Diagram
Expanded Timing Diagram
Typical Application
4
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Rev. 1
M-991
Mechanical Dimensions
Tolerances Inches A A1 b b2 C D E E1 e ec L Min .015 .014 .045 .008 .735 .300 .240 .100 BSC 0 .115 15 .150 Max .210 .022 .070 .014 .775 .325 .280 Metric (mm) Min Max 5.33 .38 .36 .56 1.1 1.8 .20 .36 18.7 19.7 7.6 8.3 6.1 7.1 2.54 BSC 0 15 2.9 4.1
Tolerances Inches A A1 b D E e H L Min Max .0926 .1043 .0040 .0118 .013 .020 .3977 .4133 .2914 .2992 .050 BSC .394 .419 .016 .050 Metric (mm) Min Max 2.35 2.65 .10 .30 .33 .51 10.10 10.50 7.4 7.6 1.27 BSC 10.00 10.65 .40 1.27
Dimensions mm (inches)
Rev. 1
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Clare, Inc. makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in Clare's Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of Clare's product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-M991-R1 (c)Copyright 2001, Clare, Inc. All rights reserved. Printed in USA. 7/26/01

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