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HA-5002/883
Data Sheet January 5, 2006 FN3705.4
Monolithic, Wideband, High Slew Rate, High Output Current Buffer
The HA-5002/883 is a monolithic, wideband, high slew rate, high output current, buffer amplifier. Utilizing the advantages of the Intersil Dielectric Isolation technologies, the HA-5002/883 current buffer offers 1300V/s slew rate typically and 1000V/s minimum with 110MHz of bandwidth. The 100mA minimum output current capability is enhanced by a 3 output impedance. The monolithic HA-5002/883 will replace the hybrid LH0002 with corresponding performance increases. These characteristics range from the 3M (typ) input impedance to the increased output voltage swing. Monolithic design technologies have allowed a more precise buffer to be developed with more than an order of magnitude smaller gain error. The voltage gain is 0.98 guaranteed minimum with a 1k load and 0.96 minimum with a 100 load. The HA-5002/883 will provide many present hybrid users with a higher degree of reliability and at the same time increase overall circuit performance.
Features
* This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Voltage Gain (RL = 1k) . . . . . . . . . . . . . . . . . . 0.98 (Min) 0.995 (Typ) (RL = 100) . . . . . . . . . . . . . . . . . 0.96 (Min) 0.971 (Typ) * High Input Impedance . . . . . . . . . . . . . . . . . . 1.5M (Min) 3M (Typ) * Low Output Impedance . . . . . . . . . . . . . . . . . . . 5 (Max) 3 (Typ) * Very High Slew Rate . . . . . . . . . . . . . . . . .1000V/s (Min) 1300V/s (Typ) * Wide Small Signal Bandwidth . . . . . . . . . . . 110MHz (Typ) * High Output Current . . . . . . . . . . . . . . . . . . . .100mA (Min) * High Pulsed Output Current . . . . . . . . . . . . . 400mA (Max) * Monolithic Dielectric Isolation Construction * Replaces Hybrid LH0002
Ordering Information
PART NUMBER PART MARKING TEMP RANGE (C) PACKAGE
Applications
* Line Driver * Data Acquisition * 110MHz Buffer * High Power Current Booster * High Power Current Source * Sample and Holds * Radar Cable Driver * Video Products
HA2-5002/883 HA2-5002/883 -55 to +125 8 Pin Can HA4-5002/883 HA4-5002/883 -55 to +125 20 Ld Ceramic LCC
Pinouts
HA-5002/883 (CLCC) TOP VIEW
OUT V1 + NC NC NC
HA-5002/883 (METAL CAN) TOP VIEW
IN
3 NC V2 NC NC NC 4 5 6 7 8
2
1 20 19 18 NC 17 V2 + 16 NC 15 NC 14 NC V1+ 1 V2 + 2
8 7 V1V2 -
6
9 10 11 12 13 IN V1 NC NC NC
NC
3 4 OUT
5
NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2004-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
HA-5002/883
Absolute Maximum Ratings
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . .44V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Equal to Supplies Peak Output Current (50ms On, 1s Off) . . . . . . . . . . . . . . . . . .400mA Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . . +175C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<4000V Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300C
Thermal Information
Thermal Resistance JA (C/W) JC (C/W) Metal Can Package . . . . . . . . . . . . . . . 160 70 Ceramic LCC Package. . . . . . . . . . . . . 80 30 Package Power Dissipation Limit at +75C for TJ +175C Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .625mW Ceramic LCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.25W Package Power Dissipation Derating Factor Above +75C Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.3mW/C Ceramic LCC Package. . . . . . . . . . . . . . . . . . . . . . . . .12.5mW/C
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . .-55C to +125C Operating Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 12V to 15V RL 100
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379
for details.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 12V and 15V, RSOURCE = 50, CLOAD 10pF, VIN = 0V, Unless Otherwise Specified. PARAMETERS Input Offset Voltage SYMBOL VIO1 CONDITIONS VSUP = 15V GROUP A SUBGROUPS 1 2, 3 VIO2 VSUP = 12V 1 2, 3 Input Bias Current IB1 VSUP = 15V, RS = 1k 1 2, 3 IB2 VSUP = 12V, RS = 1k 1 2, 3 Voltage Gain 1 +AV1 VSUP = 12V, RL = 1k, VIN = 10V VSUP = 12V, RL = 1k, VIN = -10V VSUP = 12V, RL = 100, VIN = 10V VSUP = 12V, RL = 100, VIN = -10V VSUP = 15V, RL = 100, VIN = 10V VSUP = 15V, RL = 100, VIN = -10V VSUP = 15V, RL = 1k, VIN = +10V VSUP = 15V, RL = 1k, VIN = -10V 1 2, 3 1 2, 3 1 1 1 1 1 2, 3 1 2, 3 TEMPERATURE (C) +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +25 +25 +25 +25 +125, -55 +25 +125, -55 MIN -20 -30 -20 -30 -7 -10 -7 -10 0.98 0.98 0.98 0.98 0.96 0.96 0.96 0.96 0.99 0.99 0.99 0.99 MAX 20 30 20 30 7 10 7 10 UNITS mV mV mV mV A A A A V/V V/V V/V V/V V/V V/V V/V V/V V/V V/V V/V V/V
-AV1
Voltage Gain 2
+AV2 -AV2
Voltage Gain 3
+AV3 -AV3
Voltage Gain 4
+AV4
-AV4
2
FN3705.4 January 5, 2006
HA-5002/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 12V and 15V, RSOURCE = 50, CLOAD 10pF, VIN = 0V, Unless Otherwise Specified. PARAMETERS Output Voltage Swing SYMBOL +VOUT1 CONDITIONS VSUP = 15V, RL = 100, VIN = +15V VSUP = 15V, RL = 100, VIN = -15V VSUP = 15V, RL = 1k, VIN = +15V VSUP = 15V, RL = 1k, VIN = -15V VSUP = 12V, RL = 1k, VIN = +12V VSUP = 12V, RL = 1k, VIN = -12V VSUP = 15V, VOUT = +10V VSUP = 15V, VOUT = -10V VSUP = 12V, VOUT = +10V VSUP = 12V, VOUT = -10V VSUP = 5V, V+ = +20V, V- = -15V, V+ = +10V, V- = -15V VSUP = 5V, V+ = +15V, V- = -20V, V+ = +15V, V- = -10V VSUP = 5V, V+ = +17V, V- = -12V, V+ = +7V, V- = -12V VSUP = 5V, V+ = +12V, V- = -17V, V+ = +12V, V- = -7V VSUP = 15V, VOUT = 0V VSUP = 15V, VOUT = 0V VSUP = 12V, VOUT = 0V VSUP = 12V, VOUT = 0V GROUP A SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 TEMPERATURE (C) +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 +25 +125, -55 MIN 10 10 10 10 10 10 100 100 100 100 54 54 54 54 54 54 54 54 -10 -10 -10 -10 MAX -10 -10 -10 -10 -10 -10 -100 -100 -100 -100 10 10 10 10 UNITS V V V V V V V V V V V V mA mA mA mA mA mA mA mA dB dB dB dB dB dB dB dB mA mA mA mA mA mA mA mA
-VOUT1
+VOUT2
-VOUT2
+VOUT3
-VOUT3
Output Current
+IOUT1
-IOUT1
+IOUT2
-IOUT2
Power Supply Rejection Ratio
+PSRR1
-PSRR1
+PSRR2
-PSRR2
Power Supply Current
+ICC1
-ICC1
+ICC2
-ICC2
3
FN3705.4 January 5, 2006
HA-5002/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank. See AC Specifications in Table 3 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 15V or 12V, RLOAD = 1k, CLOAD 10pF, Unless Otherwise Specified. PARAMETERS Input Resistance SYMBOL RIN1 RIN2 Slew Rate +SR1 CONDITIONS VSUP = 15V VSUP = 12V VSUP = 15V, VOUT = -5V to +5V VSUP = 15V, VOUT = +5V to -5V VSUP = 12V, VOUT = -5V to +5V VSUP = 12V, VOUT = +5V to -5V VSUP = 15V or 12V, VOUT = 0 to +500mV VSUP = 15V or 12V, VOUT = 0 to -500mV VSUP = 12V or 15V, VOUT = 0 to +500mV VSUP = 12V or 15V, VOUT = 0 to -500mV VSUP = 15V, VIN = 0V, IOUT = 0mA VSUP = 12V, VIN = 0V, IOUT = 0mA VSUP = 12V VSUP = 12V NOTES 1 1 1 TEMPERATURE (C) +25 +25 +25 +125, -55 1 +25 +125, -55 1 +25 +125, -55 1 +25 +125, -55 1, 2 1, 2 1, 2 1, 2 1 +25 +125, -55 +25 +125, -55 +25 +125, -55 1 +25 +125, -55 1, 3 +25 +125, -55 1, 3 +25 +125, -55 1 1 +25 +25 MIN 1.5 1.5 1000 1000 1000 1000 1000 1000 1000 1000 MAX 10 10 10 10 30 30 30 30 300 300 240 240 5 5 UNITS M M V/s V/s V/s V/s V/s V/s V/s V/s ns ns ns ns % % % % mW mW mW mW
-SR1
+SR2
-SR2
Rise and Fall Time
TR
TF
Overshoot
+OS
-OS
Quiescent Power Consumption
PC1
PC2
Output Resistance
ROUT1 ROUT2
NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot to lot and within lot variation. 2. Measured between 10% and 90% points. 3. Quiescent Power Consumption based upon Quiescent Supply Current test maximum. (No load on outputs.) TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-In) Final Electrical Test Parameters Group A Test Requirements Groups C and D Endpoints NOTE: 1. PDA applies to Subgroup 1 only. SUBGROUPS (SEE TABLE 1) 1 1 (Note 1), 2, 3 1, 2, 3 1
4
FN3705.4 January 5, 2006
HA-5002/883 Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP): V1TRANSISTOR COUNT: 27 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5002/883
V1IN
V1- (ALT) V1+ (ALT)
V2+
V2-
V1+
OUT
5
FN3705.4 January 5, 2006
HA-5002/883 Ceramic Leadless Chip Carrier Packages (CLCC)
0.010 S E H S D D3
J20.A
MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE INCHES SYMBOL A A1 B B1 B2 B3 D D1 D2 MIN 0.060 0.050 0.022 0.006 0.342 MAX 0.100 0.088 0.028 0.022 0.358 MILLIMETERS MIN 1.52 1.27 0.56 0.15 8.69 1.83 REF 0.56 9.09 MAX 2.54 2.23 0.71 NOTES 6, 7 2, 4 2 2 2 5 5 3 3 3 Rev. 0 5/18/94 NOTES:
j x 45o
B
E3
E
0.072 REF
0.200 BSC 0.100 BSC 0.342 0.358 0.358 -
5.08 BSC 2.54 BSC 9.09 9.09 5.08 BSC 2.54 BSC 0.38 1.02 REF 0.51 REF 1.14 1.14 1.91 0.08 5 5 20 1.40 1.40 2.41 0.38 9.09 1.27 BSC 8.69
h x 45o 0.010 S E F S A A1 PLANE 2 PLANE 1
D3 E E1 E2 E3 e e1 h j
0.007 M E F S H S B1
0.200 BSC 0.100 BSC 0.015 0.358 0.050 BSC 0.040 REF 0.020 REF 0.045 0.045 0.075 0.003 5 5 20 0.055 0.055 0.095 0.015
-E-
L L1 L2 L3 ND NE N
e
L -HL3
-FE1 B3
E2
L2 B2
1. Metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the optional plane 2 terminals. 2. Unless otherwise specified, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. Symbol "N" is the maximum number of terminals. Symbols "ND" and "NE" are the number of terminals along the sides of length "D" and "E", respectively. 4. The required plane 1 terminals and optional plane 2 terminals (if used) shall be electrically connected. 5. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown on the drawing. 6. Chip carriers shall be constructed of a minimum of two ceramic layers. 7. Dimension "A" controls the overall package thickness. The maximum "A" dimension is package height before being solder dipped. 8. Dimensioning and tolerancing per ANSI Y14.5M-1982. 9. Controlling dimension: INCH.
L1
e1
D1
D2
6
FN3705.4 January 5, 2006
HA-5002/883 Metal Can Packages (Can)
REFERENCE PLANE A L L2 L1 A A OD OD1 Oe 2 1 Ob1 F Q Ob BASE AND SEATING PLANE BASE METAL LEAD FINISH N k1 OD2
T8.C MIL-STD-1835 MACY1-X8 (A1)
e1 8 LEAD METAL CAN PACKAGE INCHES SYMBOL A Ob Ob1 Ob2 OD MIN 0.165 0.016 0.016 0.016 0.335 0.305 0.110 MAX 0.185 0.019 0.021 0.024 0.375 0.335 0.160 MILLIMETERS MIN 4.19 0.41 0.41 0.41 8.51 7.75 2.79 MAX 4.70 0.48 0.53 0.61 9.40 8.51 4.06 NOTES 1 1 2 1 1 1 3 3 4 Rev. 0 5/18/94
k
OD1
C L
OD2 e e1 F k k1
0.200 BSC 0.100 BSC 0.027 0.027 0.500 0.250 0.010 45o BSC 45o BSC 8 0.040 0.034 0.045 0.750 0.050 0.045 -
5.08 BSC 2.54 BSC 1.02 0.86 1.14 19.05 1.27 1.14
0.69 0.69 12.70 6.35 0.25
Ob1
Ob2
L L1
SECTION A-A
L2 Q
NOTES: 1. (All leads) Ob applies between L1 and L2. Ob1 applies between L2 and 0.500 from the reference plane. Diameter is uncontrolled in L1 and beyond 0.500 from the reference plane. 2. Measured from maximum diameter of the product. 3. is the basic spacing from the centerline of the tab to terminal 1 and is the basic spacing of each lead or lead position (N -1 places) from , looking at the bottom of the package. 4. N is the maximum number of terminal positions. 5. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 6. Controlling dimension: INCH.
N
45o BSC 45o BSC 8
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 7
FN3705.4 January 5, 2006

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