View SN74ALVCH16244GRDR_751720.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
www.ti.com
SCES014K - JULY 1995 - REVISED OCTOBER 2005
FEATURES
* * * * * * * Member of the Texas Instruments WidebusTM Family Operates From 1.65 V to 3.6 V Max tpd of 3 ns at 3.3 V 24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A)
DGG, DGV, OR DL PACKAGE (TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE
blank
blank
blank
ORDERING INFORMATION
TA FBGA - GRD FBGA - ZRD (Pb-free) SSOP - DL -40C to 85C TSSOP - DGG TVSOP - DGV VFBGA - GQL VFBGA - ZQL (Pb-free) (1) PACKAGE (1) Tape and reel Tube Tape and reel Tape and reel Tape and reel Tape and reel ORDERABLE PART NUMBER SN74ALVCH16244GRDR SN74ALVCH16244ZRDR SN74ALVCH16244DL SN74ALVCH16244DLR SN74ALVCH16244DGGR 74ALVCH16244DGGRE4 SN74ALVCH16244DGVR 74ALVCH16244DGVRE4 SN74ALVCH16244KR 74ALVCH16244ZQLR TOP-SIDE MARKING VH244 ALVCH16244 ALVCH16244 VH244 VH244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1995-2005, Texas Instruments Incorporated
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
GQL OR ZQL PACKAGE (TOP VIEW) 123456 A B C D E F G H J K
TERMINAL ASSIGNMENTS (1) (56-Ball GQL/ZQL Package)
1 A B C D E F G H J K 1OE 1Y2 1Y4 2Y2 2Y4 3Y1 3Y3 4Y1 4Y3 4OE 2 NC 1Y1 1Y3 2Y1 2Y3 3Y2 3Y4 4Y2 4Y4 NC GND VCC GND NC GND VCC GND NC 3 NC GND VCC GND 4 NC GND VCC GND 5 NC 1A1 1A3 2A1 2A3 3A2 3A4 4A2 4A4 NC 6 2OE 1A2 1A4 2A2 2A4 3A1 3A3 4A1 4A3 3OE
ABC
ABC
(1)
GRD OR ZRD PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J
NC - No internal connection
TERMINAL ASSIGNMENTS (1) (54-Ball GRD/ZRD Package)
1 A B C D E F G H J 1Y1 1Y3 2Y1 2Y3 3Y1 3Y3 4Y1 4Y3 4Y4 2 NC 1Y2 1Y4 2Y2 2Y4 3Y2 3Y4 4Y2 NC 3 1OE NC VCC GND GND GND VCC NC 4OE 4 2OE NC VCC GND GND GND VCC NC 3OE 5 NC 1A2 1A4 2A2 2A4 3A2 3A4 4A2 NC 6 1A1 1A3 2A1 2A3 3A1 3A3 4A1 4A3 4A4
(1)
NC - No internal connection
xxxxx
FUNCTION TABLE (EACH 4-BIT BUFFER)
INPUTS OE L L H A H L X OUTPUT Y H L Z
2
www.ti.com
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
1OE 1 3OE 2 25
1A1
47
1Y1
3A1
36
13
3Y1
1A2
46
3
1Y2
3A2
35
14
3Y2
1A3
44
5
1Y3
3A3
33
16
3Y3
1A4
43
6
1Y4
3A4
32
17
3Y4
2OE
48
4OE 8
24
2A1
41
2Y1
4A1
30
19
4Y1
2A2
40
9
2Y2
4A2
29
20
4Y2
2A3
38
11
2Y3
4A3
27
22
4Y3
2A4
37
12
2Y4
4A4
26
23
4Y4
Pin numbers shown are for the DGG, DGV, and DL packages.
3
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
www.ti.com
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN VCC VI VO IIK IOK IO Supply voltage range Input voltage range (2) Output voltage range (2) (3) VI < 0 VO < 0 Input clamp current Output clamp current Continuous output current Continuous current through each VCC or GND DGG package DGV package JA Package thermal impedance (4) DL package GQL/ZQL package GRD/ZRD package Tstg (1) (2) (3) (4) Storage temperature range -65 -0.5 -0.5 -0.5 MAX 4.6 4.6 VCC + 0.5 -50 -50 50 100 70 58 63 42 36 150 C C/W UNIT V V V mA mA mA mA
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. This value is limited to 4.6 V maximum. The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions (1)
MIN VCC VIH Supply voltage VCC = 1.65 V to 1.95 V High-level input voltage VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V VCC = 1.65 V to 1.95 V VIL VI VO Low-level input voltage Input voltage Output voltage VCC = 1.65 V IOH High-level output current VCC = 2.3 V VCC = 2.7 V VCC = 3 V VCC = 1.65 V IOL Low-level output current VCC = 2.3 V VCC = 2.7 V VCC = 3 V t/v TA (1) Input transition rise or fall rate Operating free-air temperature -40 VCC = 2.3 V to 2.7 V VCC = 2.7 V to 3.6 V 0 0 1.65 0.65 x VCC 1.7 2 0.35 x VCC 0.7 0.8 VCC VCC -4 -12 -12 -24 4 12 12 24 10 85 ns/V C mA mA V V V V MAX 3.6 UNIT V
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
www.ti.com
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER IOH = -100 A IOH = -4 mA IOH = -6 mA VOH IOH = -12 mA IOH = -24 mA IOL = 100 A IOL = 4 mA VOL IOL = 6 mA IOL = 12 mA IOL = 24 mA II VI = VCC or GND VI = 0.58 V VI = 1.07 V VI = 0.7 V II(hold) VI = 1.7 V VI = 0.8 V VI = 2 V VI = 0 to 3.6 V (2) IOZ ICC ICC Ci Co (1) (2) Control inputs Data inputs Outputs VO = VCC or GND VI = VCC or GND, One input at VCC - 0.6 V, VI = VCC or GND VO = VCC or GND IO = 0 Other inputs at VCC or GND TEST CONDITIONS VCC 1.65 V to 3.6 V 1.65 V 2.3 V 2.3 V 2.7 V 3V 3V 1.65 V to 3.6 V 1.65 V 2.3 V 2.3 V 2.7 V 3V 3.6 V 1.65 V 1.65 V 2.3 V 2.3 V 3V 3V 3.6 V 3.6 V 3.6 V 3 V to 3.6 V 3.3 V 3.3 V 3 6 7 25 -25 45 -45 75 -75 500 10 40 750 A A A pF pF A MIN VCC - 0.2 1.2 2 1.7 2.2 2.4 2 0.2 0.45 0.4 0.7 0.4 0.55 5 A V V TYP (1) MAX UNIT
All typical values are at VCC = 3.3 V, TA = 25C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
PARAMETER tpd ten tdis (1) FROM (INPUT) A OE OE TO (OUTPUT) Y Y Y VCC = 1.8 V TYP
(1) (1) (1)
VCC = 2.5 V 0.2 V MIN 1 1 1 MAX 3.7 5.7 5.2
VCC = 2.7 V MIN MAX 3.6 5.4 4.6
VCC = 3.3 V 0.3 V MIN 1 1 1 MAX 3 4.4 4.1
UNIT ns ns ns
This information was not available at the time of publication.
5
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
www.ti.com
Operating Characteristics
TA = 25C
PARAMETER Cpd Power dissipation capacitance Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF, f = 10 MHz VCC = 1.8 V TYP
(1) (1)
VCC = 2.5 V TYP 16 4
VCC = 3.3 V TYP 19 5
UNIT pF
(1)
This information was not available at the time of publication.
6
www.ti.com
SN74ALVCH16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SCES014K - JULY 1995 - REVISED OCTOBER 2005
PARAMETER MEASUREMENT INFORMATION
VLOAD From Output Under Test CL (see Note A) RL RL S1 Open GND TEST tpd tPLZ/tPZL tPHZ/tPZH S1 Open VLOAD GND
LOAD CIRCUIT INPUT VCC 1.8 V 2.5 V 0.2 V 2.7 V 3.3 V 0.3 V VI VCC VCC 2.7 V 2.7 V tr/tf 2 ns 2 ns 2.5 ns 2.5 ns VM VCC/2 VCC/2 1.5 V 1.5 V VLOAD 2 x VCC 2 x VCC 6V 6V CL 30 pF 30 pF 50 pF 50 pF RL 1 k 500 500 500 V 0.15 V 0.15 V 0.3 V 0.3 V
tw Timing Input tsu Data Input VM VI VM 0V th VI VM 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI Input VM VM 0V tPLH tPHL VOH Output VM VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VM VOL Output Waveform 2 S1 at GND (see Note B) Output Control (low-level enabling) tPZL Output Waveform 1 S1 at VLOAD (see Note B) tPZH VI Input VM VOLTAGE WAVEFORMS PULSE DURATION VM 0V
VI VM VM 0V tPLZ VLOAD/2 VM VOL + V tPHZ VOH VM VOH - V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOL
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 . D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2007
PACKAGING INFORMATION
Orderable Device 74ALVCH16244DGGRE4 74ALVCH16244DGVRE4 74ALVCH16244DLG4 74ALVCH16244DLRG4 74ALVCH16244GRDR Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type TSSOP TVSOP SSOP SSOP BGA MI CROSTA R JUNI OR BGA MI CROSTA R JUNI OR BGA MI CROSTA R JUNI OR TSSOP TVSOP SSOP SSOP BGA MI CROSTA R JUNI OR Package Drawing DGG DGV DL DL GRD Pins Package Eco Plan (2) Qty 48 48 48 48 54 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 25 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU SNPB MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM
1000 Green (RoHS & no Sb/Br) 1000 TBD
74ALVCH16244ZQLR
ACTIVE
ZQL
56
1000 Green (RoHS & no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
74ALVCH16244ZRDR
ACTIVE
ZRD
54
1000 Green (RoHS & no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
SN74ALVCH16244DGGR SN74ALVCH16244DGVR SN74ALVCH16244DL SN74ALVCH16244DLR SN74ALVCH16244KR
ACTIVE ACTIVE ACTIVE ACTIVE NRND
DGG DGV DL DL GQL
48 48 48 48 56
2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 25 Green (RoHS & no Sb/Br)
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU SNPB
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM
1000 Green (RoHS & no Sb/Br) 1000 TBD
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2007
temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000
DGV (R-PDSO-G**)
24 PINS SHOWN 0,23 0,13 13
PLASTIC SMALL-OUTLINE
0,40 24
0,07 M
0,16 NOM 4,50 4,30 6,60 6,20
Gage Plane
0,25 0- 8 1 A 12 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 0,08
PINS ** DIM A MAX A MIN
14 3,70 3,50
16 3,70 3,50
20 5,10 4,90
24 5,10 4,90
38 7,90 7,70
48 9,80 9,60
56 11,40 11,20
4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO001C - JANUARY 1995 - REVISED DECEMBER 2001
DL (R-PDSO-G**)
48 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0.025 (0,635)
0.0135 (0,343) 0.008 (0,203) 25
0.005 (0,13) M
48
0.010 (0,25) 0.005 (0,13)
0.299 (7,59) 0.291 (7,39) 0.420 (10,67) 0.395 (10,03)
Gage Plane 0.010 (0,25)
1 A
24
0- 8 0.040 (1,02) 0.020 (0,51)
Seating Plane 0.110 (2,79) MAX 0.008 (0,20) MIN 0.004 (0,10)
PINS ** DIM A MAX
28 0.380 (9,65) 0.370 (9,40)
48 0.630 (16,00) 0.620 (15,75)
56 0.730 (18,54) 0.720 (18,29) 4040048 / E 12/01
A MIN
NOTES: A. B. C. D.
All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MO-118
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS003D - JANUARY 1995 - REVISED JANUARY 1998
DGG (R-PDSO-G**)
48 PINS SHOWN
PLASTIC SMALL-OUTLINE PACKAGE
0,50 48
0,27 0,17 25
0,08 M
6,20 6,00
8,30 7,90
0,15 NOM
Gage Plane 0,25 0- 8 A 0,75 0,50
1
24
Seating Plane 1,20 MAX 0,15 0,05 0,10
PINS ** DIM A MAX
48
56
64
12,60
14,10
17,10
A MIN
12,40
13,90
16,90 4040078 / F 12/97
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers Low Power Wireless amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com www.ti.com/lpw Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless
Mailing Address:
Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright (c) 2007, Texas Instruments Incorporated

▲Up To Search▲

Price & Availability of SN74ALVCH16244GRDR

	To Download SN74ALVCH16244GRDR Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .