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| NB6L11 2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator The NB6L11 is an enhanced differential 1:2 clock or data fanout buffer/translator. The device has the same pinout and is functionally equivalent to the LVEL11, EP11, LVEP11 devices. Moreover, the device is optimized for the systems that require LOW skew, LOW jitter and LOW power consumption. Differential input can be configured to accept single-ended signal by applying an external reference voltage to unused complementary input pin. Input accept LVNECL, LVPECL, LVTTL, LVCMOS, CML, or LVDS. The outputs are 800 mV ECL signals. Features http://onsemi.com MARKING DIAGRAMS* 8 8 1 SO-8 D SUFFIX CASE 751 1 6L11 ALYW G G * * * * * * * * * * * * Maximum Input Clock Frequency w 6 GHz Typical Maximum Input Data Rate w 6 Gb/s Typical Low 14 mA Typical Power Supply Current 150 ps Typical Propagation Delay 5 ps Typical Within Device Skew 75 ps Typical Rise/Fall Times PECL Mode Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V NECL Mode Op rating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V Open Input Default State Q Outputs Will Default LOW with Inputs Open or at VEE LVDS, LVPECL, LVNECL, LCMOS, LVTTL and CML Input Compatible Pb-Free Packages are Available 8 1 TSSOP-8 DT SUFFIX CASE 948R 8 6L11 ALYW G G 1 A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. (c) Semiconductor Components Industries, LLC, 2006 November, 2006 - Rev. 6 1 Publication Order Number: NB6L11/D NB6L11 Q0 1 8 VCC Q0 2 R2 R1 7 D Q1 3 R2 R1 6 D Q1 4 5 VEE Figure 1. Pinout (Top View) and Logic Diagram Table 1. PIN DESCRIPTION 1 2 3 4 5 6 7 8 Q0 Q0 Q1 Q1 VEE D D VCC ECL Output ECL Output ECL Output ECL Output - LVDS, CML, LVPECL, LVNECL, LVCMOS, LVTTL Input LVDS, CML, LVPECL, LVNECL, LVCMOS, LVTTL Input - - - - - - HIGH LOW - Table 2. ATTRIBUTES Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Pb Pkg Level 1 Level 1 Value 37.5 kW 75 kW > 2 kV > 100 V > 1 kV Pb-Free Pkg Level 1 Level 3 Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC-8 TSSOP-8 Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34 http://onsemi.com 2 A AAAAAAAAAAAAAAAA AAAAAAAAAAAAAAA AAAAAAAAAAAAAAAA Non-inverted differential clock/data output 0. Typically terminated with 50 W Resistor to VTT = VCC - 2 V. Inverted differential clock/data output 0. Typically terminated with 50 W resistor to VTT = VCC - 2 V. Non-inverted differential clock/data output 1. Typically terminated with 50 W resistor to VTT = VCC - 2 V. Inverted differential clock/data output 1. Typically terminated with 50 W resistor to VTT = VCC - 2 V. Negative power supply voltage Inverted differential clock/data input. Internal 37.5 kW to VCC and 75 kW to VEE. Non-inverted differential clock/data input. Internal 75 kW to VCC and 37.5 kW to VEE. Positive power supply voltage UL 94 V-0 @ 0.125 in 167 Devices AAAAAAAAA A AA A AA AAAAAAAAAAAAAA AAAAAAAAAAAAAA AAAAA Pin Name I/O Default State Description NB6L11 Table 3. MAXIMUM RATINGS Symbol VCC VEE VI VINPP Iout TA Tstg qJA qJC qJA qJC Tsol Parameter Positive Power Supply Negative Power Supply Positive Input Voltage Negative Input Voltage Differential Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Standard Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board v 3 sec @ 248C v 3 sec @ 260C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 TSSOP-8 |D - D| Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V VCC - VEE w 2.8 V VCC - VEE t 2.8 V Continuous Surge VI v VCC VI w VEE Condition 2 Rating 3.6 -3.6 3.6 -3.6 2.8 |VCC - VEE| 25 50 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 265 Unit V V V V V mA mA C C C/W C/W C/W C/W C/W C/W C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 3 NB6L11 Table 4. DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 4) -40C Symbol IEE VOH VOL Vth VIH VIL Characteristic Negative Power Supply Current (Note 5) Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Min 5 1350 565 Typ 14 1450 725 Max 20 1550 870 Min 5 1400 630 25C Typ 14 1500 765 Max 20 1600 920 Min 5 1450 690 85C Typ 14 1550 825 Max 20 1650 970 Unit mA mV mV DIFFERENTIAL INPUT DRIVEN SINGLE-ENDED (Figures 10, 12) Input Threshold Reference Voltage Range (Note 2) Single-Ended Input HIGH Voltage Single-Ended Input LOW Voltage 1125 Vth +75 VEE VCC -75 VCC Vth -75 1125 Vth +75 VEE VCC -75 VCC Vth -75 1125 Vth +75 VEE VCC -75 VCC Vth -75 mV mV mV DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13) VIHD VILD VCMR VID IIH IIL Differential Input HIGH Voltage Differential Input LOW Voltage Input Common Mode Range (Differential Cross-Point Voltage) (Note 3) Differential Input Voltage (VIHD - VILD) Input HIGH Current Input LOW Current D D D D -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 mV mV mV mV mA mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Vth is applied to the complementary input when operating in single-ended mode. 3. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC. 4. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to -1.3 V. 5. All input and output pins left open. 6. All loading with 50 W to VCC - 2.0 V. http://onsemi.com 4 NB6L11 Table 5. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 9) -40C Symbol IEE VOH VOL Vth VIH VIL Characteristic Negative Power Supply Current (Note 10) Output HIGH Voltage (Note 11) Output LOW Voltage (Note 11) Min 5 2150 1365 Typ 14 2250 1525 Max 20 2350 1670 Min 5 2200 1430 25C Typ 14 2300 1565 Max 20 2400 1720 Min 5 2250 1490 85C Typ 14 2350 1625 Max 20 2450 1770 Unit mA mV mV DIFFERENTIAL INPUT DRIVEN SINGLE-ENDED (Figures 10, 12) Input Threshold Reference Voltage Range (Note 7) Single-Ended Input HIGH Voltage Single-Ended Input LOW Voltage 1125 Vth +75 VEE VCC -75 VCC Vth -75 1125 Vth +75 VEE VCC -75 VCC Vth -75 1125 Vth +75 VEE VCC -75 VCC Vth -75 mV mV mV DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13) VIHD VILD VCMR VID IIH IIL Differential Input HIGH Voltage Differential Input LOW Voltage Input Common Mode Range (Differential Cross-Point Voltage) (Note 8) Differential Input Voltage (VIHD - VILD) Input HIGH Current Input LOW Current D D D D -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 1200 VEE 1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 mV mV mV mV mA mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Vth is applied to the complementary input when operating in single-ended mode. 8. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC. 9. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 10. All input and output pins left open. 11. All loading with 50 W to VCC - 2.0 V. http://onsemi.com 5 NB6L11 Table 6. DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -3.465 V to -2.375 V (Note 14) -40C Symbol IEE VOH VOL Vth VIH VIL Characteristic Negative Power Supply Current (Note 15) Output HIGH Voltage (Note 16) Output LOW Voltage (Note 16) Min 5 -1150 -1935 Typ 14 -1050 -1775 Max 20 -950 -1630 Min 5 -1100 -1870 25C Typ 14 -1000 -1735 Max 20 -900 -1580 Min 5 -1050 -1810 85C Typ 14 -950 -1675 Max 20 -850 -1530 Unit mA mV mV DIFFERENTIAL INPUT DRIVEN SINGLE-ENDED (Figures 10, 12) Input Threshold Reference Voltage Range (Note 12) Single-Ended Input HIGH Voltage Single-Ended Input LOW Voltage VEE +1125 Vth +75 VEE VCC -75 VCC Vth -75 VEE +1125 Vth +75 VEE VCC -75 VCC Vth -75 VEE +1125 Vth +75 VEE VCC -75 VCC Vth -75 mV mV mV DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13) VIHD VILD VCMR Differential Input HIGH Voltage Differential Input LOW Voltage Input Common Mode Range (Differential Cross-Point Voltage) (Note 13) Differential Input Voltage (VIHD - VILD) Input HIGH Current Input LOW Current D D D D -150 -150 VEE +1200 VEE VEE +1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 VEE +1200 VEE VEE +1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 -150 -150 VEE +1200 VEE VEE +1163 75 50 10 -5 -30 VCC VCC -75 VCC -38 2500 150 150 mV mV mV VID IIH IIL mV mA mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 12. Vth is applied to the complementary input when operating in single-ended mode. 13. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC 14. Input and output parameters vary 1:1 with VCC. 15. Input and output pins left open. 16. All loading with 50 W to VCC - 2.0 V. http://onsemi.com 6 NB6L11 Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = -3.465 V to -2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V (Note 17) -40C Symbol VOUTPP tPLH, tPHL tSKEW Characteristic Output Voltage Amplitude (See Figures 2 & 3) Propagation Delay to Output Differential @ 1 GHz Duty Cycle Skew Within Device Skew Device-to-Device Skew fin v 3 GHz fin v 6 GHz D to Q, Q (Note 18) Min 480 270 110 Typ 700 300 150 2 5 15 0.2 2 75 Q, Q 30 700 75 190 10 15 60 1 12 2500 120 75 30 Max Min 480 270 110 25C Typ 700 300 150 2 5 15 0.2 2 700 75 200 10 15 60 1 12 2500 120 75 30 Max Min 480 270 120 85C Typ 700 300 160 2 5 15 0.2 2 700 75 220 10 15 60 1 12 2500 120 mV ps Max Unit mV ps ps tJITTER RMS Random Clock Jitter (Note 19) fin v 6 GHz Peak-to-Peak Data Dependent Jitter (Note 20) fin v 6 Gb/s Input Voltage Swing / Sensitivity (Differential Configuration) (Note 21) Output Rise/Fall Times @ 1 GHz (20% - 80%) ps VINPP tr tf NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17. Measured using a 800 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. Input edge rates 40 ps (20% - 80%). 18. See Figure 9 tskew = |tPLH - tPHL| for a nominal 50% differential clock input waveform. Skew is measured between outputs under identical transitions and conditions @ 1 GHz. 19. Additive RMS jitter with 50% duty cycle clock signal at 6 GHz. 20. Additive Peak-to-Peak data dependent jitter with NRZ PRBS 223-1 data rate at 6 Gb/s. 21. VINPP(max) cannot exceed VCC - VEE (applicable only when VCC - VEE < 2500 mV). Input voltage swing is a single-ended measurement operating in differential mode 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1 2 3 4 5 6 INPUT CLOCK FREQUENCY (GHz) 7 8 85C 25C -40C 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 1 2 3 4 5 6 INPUT CLOCK FREQUENCY (GHz) 7 8 85C 25C -40C OUTPUT VOLTAGE AMPLITUDE (V) Figure 2. Output Voltage Amplitude (VOUTPP) versus Input Clock Frequency (fIN) and Temperature at VCC - VEE = 3.3 V OUTPUT VOLTAGE AMPLITUDE (V) Figure 3. Output Voltage Amplitude (VOUTPP) versus Input Clock Frequency (fIN) and Temperature at VCC - VEE = 2.5 V http://onsemi.com 7 NB6L11 OUTPUT VOLTAGE AMPLITUDE (100 mV/div) OUTPUT VOLTAGE AMPLITUDE (100 mV/div) TIME (64 ps/div) TIME (32 ps/div) Figure 4. Typical Output Waveform at 2.488 Gb/s with PRBS 223-1 (Total System Pk-Pk Jitter is 17 ps. Device Pk-Pk Jitter Contribution is 4 ps) NOTE: Figure 5. Typical Output Waveform at 6.125 Gb/s with PRBS 223-1 (Total System Pk-Pk Jitter is 20 ps. Device Pk-Pk Jitter Contribution is 5 ps) VCC - VEE = 3.3 V; VIN = 700 mV; TA = 25C. 210 PROPAGATION DELAY (ps) 190 RISE/FALL TIME (ps) 170 150 -40C 130 110 2.375 2.5 3.3 3.465 POWER SUPPLY VOLTAGE (V) 25C 85C 120 110 100 90 80 70 60 50 40 30 2.375 2.5 3.3 3.465 POWER SUPPLY VOLTAGE (V) 25C -40C 85C Figure 6. Propagation Delay versus Power Supply Voltage and Temperature 20 17 IEE CURRENT (mA) VCC - VEE = -3.465 V 14 11 8 5 -40 Figure 7. Rise/Fall Time versus Power Supply Voltage and Temperature VCC - VEE = -2.375 V 25 TEMPERATURE (C) 85 Figure 8. IEE Current versus Temperature and Power Supply Voltage http://onsemi.com 8 NB6L11 D D Q Q tPLH VINPP(D) = VIH(D) - VIL(D) VINPP(D) = VIH(D) - VIL(D) VOUTPP(Q) = VOH(Q) - VOL(Q) VOUTPP(Q) = VOH(Q) - VOL(Q) tPHL Figure 9. AC Reference Measurement Vth D D D Vth D Figure 10. Differential Input Driven Single-Ended Figure 11. Differential Inputs Driven Differentially VCC Vthmax VIHmax VILmax VIH Vth VIL VIHmin VILmin VCC VCMmax VIHDmax VILDmax VID = VIHD - VILD VIHDtyp VILDtyp Vth Vthmin GND VCMR VCMmax GND VIHDmin VILDmin Figure 12. Vth Diagram Figure 13. VCMR Diagram Q Driver Device Q Zo = 50 W D Receiver Device Zo = 50 W 50 W 50 W D VTT VTT = VCC - 2.0 V Figure 14. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.) http://onsemi.com 9 NB6L11 ORDERING INFORMATION Device NB6L11D NB6L11DG NB6L11DR2 NB6L11DR2G NB6L11DT NB6L11DTG* NB6L11DTR2 NB6L11DTR2G* Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Future Product - Contact factory for availability. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices http://onsemi.com 10 NB6L11 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AH -X- A 8 5 B 1 S 4 0.25 (0.010) M Y M -Y- G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C -Z- H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NB6L11 PACKAGE DIMENSIONS TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A 8x K REF 0.10 (0.004) M 0.15 (0.006) T U S 2X TU S V S L/2 8 1 5 L PIN 1 IDENT 4 B -U- 0.25 (0.010) M 0.15 (0.006) T U S A -V- F DETAIL E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ C 0.10 (0.004) -T- SEATING PLANE D G DETAIL E -W- DIM A B C D F G K L M ECLinPS is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 12 NB6L11/D |
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