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(R)
FAST CMOS OCTAL TRANSPARENT LATCHES
Integrated Device Technology, Inc.
IDT54/74FCT373/A/C IDT54/74FCT533/A/C IDT54/74FCT573/A/C
FEATURES
* IDT54/74FCT373/533/573 equivalent to FASTTM speed and drive * IDT54/74FCT373A/533A/573A up to 30% faster than FAST * Equivalent to FAST output drive over full temperature and voltage supply extremes * IOL = 48mA (commercial) and 32mA (military) * CMOS power levels (1mW typ. static) * Octal transparent latch with 3-state output control * JEDEC standard pinout for DIP and LCC * Product available in Radiation Tolerant and Radiation Enhanced versions * Military product compliant to MIL-STD-883, Class B
DESCRIPTION
The IDT54/74FCT373/A/C, IDT54/74FCT533/A/C and IDT54/74FCT573/A/C are octal transparent latches built using an advanced dual metal CMOS technology. These octal latches have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the set-up time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high-impedance state.
FUNCTIONAL BLOCK DIAGRAMS
IDT54/74FCT373 AND IDT54/74FCT573
D0 D O G G D1 D O G D2 D O G D3 D O G D4 D O G D5 D O G D6 D O G D7 D O
LE
OE O0 O1 O2 O3 O4 O5 O6 O7
2602 cnv* 01
IDT54/74FCT533
D0 D O G G D1 D O G D2 D O G D3 D O G D4 D O G D5 D O G D6 D O G D7 D O
LE
OE O0 O1 O2 O3 O4 O5 O6 O7
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a trademark of National Semiconductor Co.
2602 cnv* 02
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1992 Integrated Device Technology, Inc.
MAY 1992
DSC-4624/2
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT373
OE
1
O0 D0 D1 O1 O2 D2 D3 O3 GND
2 3 4 5 6 7 8 9 10
19 18 P20-1 D20-1 16 SO20-2 15 & E20-1 14 13 12 11 17
O7 D7 D6 O6 O5 D5 D4 O4 LE D1 O1 O2 D2 D3 4 5 6 7 8
D0
3
O0
2
OE
1
20
VCC
20 19 18 17 16 15 14
VCC O7
INDEX
D7 D6 O6 O5 D5
L20-2
9 10 11 12 13
O3 GND
O4
1
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
IDT54/74FCT573
D0 D1 D2 D3 D4 D5 D6 D7 GND
2 3 4 5 6 7 8 9 10
19 18 P20-1 D20-1 16 SO20-2 15 & 14 E20-1 13 12 11 17
O0 O1 O2 O3 O4 O5 O6 O7 LE 3 D2 D3 D4 D5 D6 4 5 6 7 8 9 10 11 12 13 L20-2 2 20 19 18 17 16 15 14 O1 O2 O3 O4 O5
D7 GND
D1
OE
LE OE
1
O7
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
IDT54/74FCT533
D0
O0 D0 D1 O1 O2 D2 D3 O3 GND
2 3 4 5 6 7 8 9 10
19 18 P20-1 D20-1 16 SO20-2 15 & 14 E20-1 13 12 11 17
O7 D7 D6 O6 O5 D5 D4 O4 LE D1 O1 O2 D2 D3 4 5 6 7 8 9 10 11 12 13 L20-2 32 20 19 18 17 16 15 14 D7 D6 O6 O5 D5
O0
OE
1
20
VCC
LE
O3 GND
O4
DIP/SOIC/CERPACK TOP VIEW
LCC TOP VIEW
7.12
D4
VCC O7
INDEX
O6
O0
D0
1
20
VCC
OE VCC
INDEX
LE
D4
2602 cnv* 03-08
2
IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE (FCT533)(1)
DN H L X Inputs LE H H X Outputs
FUNCTION TABLE (FCT373 and FCT573)(1)
ON
L H Z
2602 tbl 05
OE
L L H
DN H L X
Inputs LE H H X
OE
L L H
Outputs ON H L Z
2602 tbl 06
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance
NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance
PIN DESCRIPTION
Pin Names DN LE Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs Complementary 3-State Outputs
2602 tbl 07
OE
ON
ON
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating Commercial VTERM(2) Terminal Voltage -0.5 to +7.0 with Respect to GND VTERM(3) Terminal Voltage -0.5 to VCC with Respect to GND TA Operating 0 to +70 Temperature TBIAS Temperature -55 to +125 Under Bias TSTG Storage -55 to +125 Temperature PT Power Dissipation 0.5 IOUT DC Output Current 120 Military -0.5 to +7.0 Unit V
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 6 8 Max. 10 12 Unit pF pF
-0.5 to VCC
V
-55 to +125 -65 to +135 -65 to +150 0.5 120
C C C
W mA
NOTE: 2602 tbl 02 1. This parameter is measured at characterization but not tested.
NOTES: 2602 tbl 01 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals only. 3. Outputs and I/O terminals only.
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL VIK IOS VOH Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Min., IN = -18mA VCC = Max.(3) , VO = GND VCC = 3V, VIN = VLC or VHC, IOH = -32A VCC = Min. VIN = VIH or VIL VOL Output LOW Voltage IOH = -300A IOH = -12mA MIL. IOH = -15mA COM'L. VCC = 3V, VIN = VLC or VHC, IOL = 300A VCC = Min. VIN = VIH or VIL IOL = 300A IOL = 32mA MIL. IOL = 48mA COM'L. Parameter Input HIGH Level Input LOW Level Input HIGH Current Input LOW Current Off State (High Impedance) Output Current VCC = Max. Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND VO = VCC VO = 2.7V VO = 0.5V VO = GND Min. 2.0 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.3 4.3 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 10 10(4) -10(4) -10 -1.2 -- -- -- -- -- VLC VLC(4) 0.5 0.5
2602 tbl 03
Unit V V A
A
V mA V
V
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested.
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN VHC; V IN VLC VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OE = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fi = 10MHz 50% Duty Cycle OE = GND LE = VCC One Bit Toggling VCC = Max. Outputs Open fi = 2.5MHz 50% Duty Cycle OE = GND LE = VCC Eight Bits Toggling Min. -- -- VIN VHC VIN VLC -- Typ.(2) 0.2 0.5 0.15 Max. 1.5 2.0 0.25 Unit mA mA mA/ MHz
IC
Total Power Supply Current (6)
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
1.7
4.0
mA
--
2.0
5.0
VIN VHC VIN VLC (FCT) VIN = 3.4V VIN = GND
--
3.2
6.5 (5)
--
5.2
14.5 (5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
2602 tbl 04
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT373/A/C/FCT573/A/C
FCT373/573 Com'l.(2) Symbol Parameter Conditions(1) Mil.(2) FCT373A/573A Com'l.(2) Mil.(2) FCT373C/573C Com'l. (2) Mil.(2)
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW
Propagation Delay DN to ON Propagation Delay LE to ON Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to LE Hold Time HIGH or LOW, DN to LE LE Pulse Width HIGH
CL = 50pF RL = 500
1.5
8.0
1.5
8.5
1.5 2.0 1.5 1.5 2.0 1.5 5.0
5.2 8.5 6.5 5.5 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 6.0
5.6 9.8 7.5 6.5 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 5.0
4.2 5.5 5.5 5.0 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 6.0
5.1 8.0 6.3 5.9 -- -- --
ns ns ns ns ns ns ns
2602 tbl 08
2.0 13.0 1.5 12.0 1.5 2.0 1.5 6.0 7.5 -- -- --
2.0 15.0 1.5 13.5 1.5 10.0 2.0 1.5 6.0 -- -- --
SWITCHING CHARACTERISTICS OVER OPERATING RANGE FOR FCT533/A/C
FCT533 Com'l.(2) Symbol Parameter Conditions(1) Mil.(2) FCT533A Com'l.(2) Mil.(2) FCT533C Com'l.(2) Mil.(2)
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW
Propagation Delay DN to ON Propagation Delay LE to ON Output Enable Time Output Disable Time Set-up Time HIGH or LOW, DN to LE Hold Time HIGH or LOW, DN to LE LE Pulse Width HIGH
CL = 50pF RL = 500
1.5 10.0 2.0 13.0 1.5 11.0 1.5 2.0 1.5 6.0 7.0 -- -- --
1.5 12.0 2.0 14.0 1.5 12.5 1.5 2.0 1.5 6.0 8.5 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 5.0
5.2 8.5 6.5 5.5 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 6.0
5.6 9.8 7.5 6.5 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 5.0
4.7 6.9 5.5 5.0 -- -- --
1.5 2.0 1.5 1.5 2.0 1.5 6.0
5.1 8.0 6.3 5.9 -- -- --
ns ns ns ns ns ns ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
2602 tbl 09
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: 2537 tbl 10 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. t REM 3V 1.5V 0V 3V 1.5V 0V tH 3V 1.5V 0V 3V 1.5V 0V
PULSE WIDTH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
t SU
tH
PROPAGATION DELAY
3V 1.5V tPLH OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V t PHL 0V VOH 1.5V VOL
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT SWITCH NORMALLY OPEN HIGH 3.5V 1.5V 0.3V t PHZ 0.3V 1.5V 0V V OH 0V t PLZ DISABLE 3V 1.5V 0V 3.5V V OL
SAME PHASE INPUT TRANSITION
NOTES 2537 drw 04 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0 MHz; ZO 50; tF 2.5ns; tR 2.5ns.
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IDT54/74FCT373/533/573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT FCT XXXX XX Temp. Range Device Type X Package X Process Blank B P D SO L E 373 573 533 373A 573A 533A 373C 573C 533C 54 74 Commercial MIL-STD-883, Class B Plastic DIP CERDIP Small Outline IC Leadless Chip Carrier CERPACK Non-Inverting Octal Transparent Latch Non-Inverting Octal Transparent Latch Inverting Octal Transparent Latch Fast Non-Inverting Octal Transparent Latch Fast Non-Inverting Octal Transparent Latch Fast Inverting Octal Transparent Latch Super Fast Non-Inverting Octal Transparent Latch Super Fast Non-Inverting Octal Transparent Latch Super Fast Inverting Octal Transparent Latch -55C to +125C 0C to +70C
2602 cnv* 14
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