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| Datasheet File OCR Text: |
| 1 2 3 4 D[0..7] U5 D CpuClk 6 23 25 CLK BUSACK BUSREQ RESET NMI INT WAIT HALT D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 14 15 12 8 7 9 10 13 30 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 D[0..7] D VCC A[0..15] A[0..15] R7 4k7 INT 26 17 16 24 18 C WR RD IORQ MREQ M1 28 22 21 20 19 27 RFSH WR RD IORQ MREQ M1 C Z80ACPU U8 A13 A14 A15 B VCC 1 2 3 4 5 6 A B C E1 E2 E3 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 15 14 13 12 11 10 9 7 MEM0SEL MEM1SEL MEM2SEL MEM3SEL SIOSEL PPISEL B 74LS138 VCC SW2 PUSH A R6 4k7 Reset + C8 10uF A Protel International P/L L3, 12a Rodborough Rd Frenchs Forest Size: A Number: Revision: NSW Date: 21-Apr-2001 Time: 09:51:50 Sheet 8 of 8 Australia 2086 File: C:\Program Files\Design Explorer 99 SE\Examples\Z80 Microprocessor.Ddb - Z80 Processor\CPU Section.sch Title CPU Section RESET CIRCUIT 1 2 3 4 |
Price & Availability of Z80ACPU
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