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TECHNICAL DATA
IN74HCU04
Hex Unbuffered Inverter
High-Performance Silicon-Gate CMOS
The IN74HCU04A is identical in pinout to the LS/ALS04. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of six single-stage inverters. These inverters are well suited for use as oscillators, pulse shapers, and in many other applications requiring a high-input impedance amplifier. For digital applications, the HC04 is recommended. * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 2.0 to 6.0 V; 2.5 to 6 V in Oscillator Configurations. * Low Input Current: 1.0 A * High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION IN74HCU04N Plastic IN74HCU04D SOIC IZ74HCU04 Chip TA = -55 to 125 C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
A1 Y1 A2 Y2 A3 Y3 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 V CC A6 Y6 A5 Y5 A4 Y4
FUNCTION TABLE
Inputs A L H PIN 14 =VCC PIN 7 = GND Output Y H L
1
IN74HCU04
MAXIMUM RATINGS *
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP ** SOIC Package ** Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 20 25 50 750 500 -65 to +150 260
Unit V V V mA mA mA mW C C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. ** Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA tr, t f Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC =2.0 A VCC =4.5 A VCC =6.0 A Min 2.0 0 -55 Max 6.0 VCC +125 1000 500 400 Unit V V C ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ). CC Unused outputs must be left open.
2
IN74HCU04
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC Symbol VIH Parameter Minimum HighLevel Input Voltage Maximum Low Level Input Voltage Minimum HighLevel Output Voltage Test Conditions VOUT=0.1 V * IOUT 20 A VOUT= VCC-0.1 V * IOUT 20 A VIN=VIL IOUT 20 A VIN=VIL IOUT 4.0 mA IOUT 5.2 mA VOL Maximum LowLevel Output Voltage VIN=VIH IOUT 20 A VIN=VIH IOUT 4.0 mA IOUT 5.2 mA IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) VIN=VCC or GND VIN=VCC or GND IOUT=0A V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Guaranteed Limit 25 C to -55C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.98 5.48 0.2 0.5 0.5 0.26 0.26 0.1 2.0 85 C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.84 5.34 0.2 0.5 0.5 0.33 0.33 1.0 20 125 C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.7 5.2 0.2 0.5 0.5 0.4 0.4 1.0 40 A A V Unit V
VIL
V
VOH
V
* For VCC = 2.0 V, VOUT = 0.2 V or VCC - 0.2 V.
3
IN74HCU04
AC ELECTRICAL CHARACTERISTICS (CL=50pF, Input t r=t f=6.0 ns)
VCC Symbol tPLH, t PHL Parameter Maximum Propagation Delay, Input A to Output Y (Figures 1 and 2) Maximum Output Transition Time, Any Output (Figures 1 and 2) Maximum Input Capacitance Power Dissipation Capacitance (Per Inverter) Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC For load considerations, see Chepter 4. V 2.0 4.5 6.0 2.0 4.5 6.0 Guaranteed Limit 25 C to -55C 75 15 13 70 15 13 10 85C 95 19 16 85 18 16 10 125C 110 22 19 100 22 19 10 Unit ns
tTLH, t THL
ns
CIN CPD
pF pF
TA=25?N, VCC=5.0 V 15
TEST POINT
tr INPUT A 90% 50% 10% tPHL OUTPUT Y tTHL 90% 50% 10% tTLH tf VCC GND tPLH
OUTPUT DEVICE UNDER TEST CL*
* Includes all probe and jig capacitance
Figure 1. Switching Waveforms.
Figure 2. Test Circuit
LOGIC DETAIL (1/6 of Device Show)
VCC
A
Y
4
IN74HCU04
TYPICAL APPLICATIONS
Crystal Oscillator
R2
Stable RC Oscillator
1/6HCU04 1/6HCU04 1/6HCU04 V out
1/6HCU04
R2 > > R1 C1 < C2 R1
C R2 R1
C1 Vout
C2
Schmitt Trigger
R2
High Input Single -Stage Amplifier with a 2 to 6 V Supply Range
VCC
R2 > 6R 1 R1 Vin 1/6HCU04 1/6HCU04 INPUT V out
1 M 1/6HCU04 OUTPUT 1M
Multi-Stage Amplifier
VCC
LED Driver
+V
1/6HCU04 1/6HCU04 1/6HCU04 INPUT OUTPUT
1/6HCU04
For reduced power suplly current, use high-efficiency LEDs such as the Hewlett-Packard HLMP series or equivalent
5
IN74HCU04
CHIP PAD DIAGRAM IZ74HCU04
1.17 + 0.003
(0,0)
Chip marking 25HCU04A (x=0.992, y=0.092)
Thickness of chip 0.46 0,02 mm
PAD LOCATION
Pad No Symbol 01 A1 02 Y1 03 A2 04 Y2 05 A3 06 Y3 07 GND 08 Y4 09 A4 10 Y5 11 A5 12 Y6 13 A6 14 VCC * Pad size is given as per metallization layer X 0.110 0.170 0.350 0.610 0.850 0.950 0.950 0.950 0.850 0.610 0.350 0.170 0.110 0.110 Y 0.280 0.110 0.110 0.110 0.110 0.320 0.510 0.760 0.970 0.970 0.970 0.970 0.800 0.550 Pad size* , mm 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105 0.105x0.105
1.19 + 0.003
6

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