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T CT DUC OD U PRO U TE PR er at TE TIT ent OL E OBS LE SUBS upport C om/tsc .c S SSIB ersil ical Data Sheet A PO r Techn www.int F OR c t o u IL or a ccnt -INTER S 8 1-88
(R)
ICL8013
November 2000 File Number 2863.5
1MHz, Four Quadrant Analog Multiplier
The ICL8013 is a four quadrant analog multiplier whose output is proportional to the algebraic product of two input signals. Feedback around an internal op amp provides level shifting and can be used to generate division and square root functions. A simple arrangement of potentiometers may be used to trim gain accuracy, offset voltage and feedthrough performance. The high accuracy, wide bandwidth, and increased versatility of the ICL8013 make it ideal for all multiplier applications in control and instrumentation systems. Applications include RMS measuring equipment, frequency doublers, balanced modulators and demodulators, function generators, and voltage controlled amplifiers.
Features
* Accuracy . . . . . . . . . . . . . . . . . . . . . . . 1% ("B" Version) * Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . 10V * Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1MHz * Uses Standard 15V Supplies * Built-In Op Amp Provides Level Shifting, Division and Square Root Functions
Pinout
ICL8013 (METAL CAN) TOP VIEW
YOS YIN 10 1 9 ZOS 8 7 4 5 V6 XIN GND XOS
Part Number Information
PART NUMBER ICL8013BCTX ICL8013CCTX MULTIPLICATION ERROR (MAX) 1% 2% TEMP. RANGE (oC) 0 to 70 0 to 70 PKG. NO. T10.B T10.B
V+ ZIN 2 3
PKG 10 Pin Metal Can 10 Pin Metal Can
OUTPUT
Functional Diagram
ZIN
XIN XOS
VOLTAGE TO CURRENT CONVERTER AND SIGNAL COMPRESSION
BALANCED VARIABLE GAIN AMPLIFIER ZOS
OP AMP
OUT
YIN YOS
VOLTAGE TO CURRENT CONVERTER
ZIN
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved
ICL8013
Absolute Maximum Ratings
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input Voltages (X IN, YIN, ZIN, XOS, YOS, ZOS). . . . . . . . . VSUPPLY
Thermal Information
Thermal Resistance (Typical, Note 1) JA ( oC/W) JC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 160 75 Maximum Junction Temperature (Metal Can Package). . . . . . . 175oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range ICL8013XC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, VSUPPLY = 15V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified TEST CONDITIONS ICL8013B MIN -10 < X < 10 -10 < Y < 10 X = -10 X = -1 V lN = 10V V lN = 0V 25 7.5 25 10 A A TYP XY 10 10Z X 0.3 1.5 0.5 0.2 1.0 750 45 75 5 1 1 0.6 3 10 6 36 MAX 1.0 100 100 MIN ICL8013C TYP XY 10 10Z X 0.3 1.5 0.8 0.3 1.0 750 45 75 5 1 1 0.6 3 10 6 36 MAX 2.0 200 150 % Full Scale % Full Scale mV mV % % MHz kHz V/s kHz kHz s s mV RMS mV RMS M M k % Full Scale UNITS
PARAMETER Multiplier Function Multiplication Error Divider Function Division Error
Feedthrough
X = 0, Y = 10V Y = 0, X = 10V
Non-Linearity X Input Y Input Frequency Response Small Signal Bandwidth (-3dB) Full Power Bandwidth Slew Rate 1% Amplitude Error 1% Vector Error (0.5o Phase Shift) Settling Time (to 2% of Final Value) X = 20VP-P Y= 10VDC Y = 20VP-P X = 10VDC
Overload Recovery (to 2% of Final Value) V lN = 10V Output Noise 5Hz to 10kHz 5Hz to 5MHz Input Resistance X lnput Y lnput Z lnput Input Bias Current X or Y Input Z Input V lN = 0V
2
ICL8013
Electrical Specifications
TA = 25oC, VSUPPLY = 15V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified (Continued) TEST CONDITIONS ICL8013B MIN TYP 0.2 0.1 3.5 MAX 75 6.0 MIN ICL8013C TYP 0.2 0.1 3.5 MAX 100 6.0 UNITS %/% mV/V %/% mA
PARAMETER Power Supply Variation Multiplication Error Output Offset Scale Factor Quiescent Current
THE FOLLOWING SPECIFICATIONS APPLY OVER THE OPERATING TEMPERATURE RANGES Multiplication Error Average Temp. Coefficients Accuracy Output Offset Scale Factor Input Bias Current X or Y Input Z Input Input Voltage (X, Y, or Z) Output Voltage Swing R L 2k C L < 1000pF V IN = 0V 10 5 25 10 10 10 35 10 A A V V 0.06 0.2 0.04 0.06 0.2 0.04 %/oC mV/oC %/oC -10V < XIN < 10V, -10V < YIN < 10V 2 3 % Full Scale
Schematic Diagram
V+ R2 R8 R16 R23 C1 Q16Q17 R20 R17 R18 R21 Q18 R10 Q5 Q6 Q11 Q12 Q19 Q20 Q24 R22 Q26 Q22 Q23 R29 Q27 YOS XOS R31 R30 R27 Q21
ZIN Q25 R33 ZOS
Q1
Q2
Q7 Q8
Q14 Q15
YIN XIN
R9 R1 Q3 Q4 R3 R6 R7
Q9
R13
Q10
R28 OUTPUT
COMMON
R32 Q28 R4 VR5 R12 R11 R15 Q13 R19 R 24 R25 R26
3
ICL8013 Application Information
Detailed Circuit Description
The fundamental element of the ICL8013 multiplier is the bipolar differential amplifier of Figure 1.
V+ RL VOUT VIN RL
There are several difficulties with this simple modulator: 1. VY must be positive and greater than VD. 2. Some portion of the signal at VX will appear at the output unless IE = 0. 3. VX must be a small signal for the differential pair to be linear. 4. The output voltage is not centered around ground. The first problem relates to the method of converting the VY voltage to a current to vary the gain of the V X differential pair. A better method, Figure 3, uses another differential pair but with considerable emitter degeneration. In this circuit the differential input voltage appears across the common emitter resistor, producing a current which adds or subtracts from the quiescent current in either collector. This type of voltage to current converter handles signals from 0V to 10V with excellent linearity.
V+ IE + I IE - I VOUT VIN I = VIN RE
2IE V-
FIGURE 1. DIFFERENTIAL AMPLIFIER
The small signal differential voltage gain of this circuit is given by:
RL VOUT A V = --------------- = -----VI N rE kT 1 Substituting r E = ------- = -------qI E gM RL qI E R L V OU T = VIN ------ = V IN x -----------------rE kT

IE V-
IE
The output voltage is thus proportional to the product of the input voltage VlN and the emitter current IE. In the simple transconductance multiplier of Figure 2, a current source comprising Q 3, D1, and R Y is used. If VY is large compared with the drop across D1, then
VY I D ------- = 2I E and RY qR L V OU T = -------------- ( VX x VY ) kTR Y
V+ RL VOUT VIN 2IE Q3 VD VRY RL VOUT = K (VX x VY) =
FIGURE 3. VOLTAGE TO CURRENT CONVERTER
The second problem is called feedthrough; i.e., the product of zero and some finite Input signal does not produce zero output voltage. The circuit whose operation is illustrated by Figures 4A, 4B, and 4C overcomes this problem and forms the heart of many multiplier circuits in use today. This circuit is basically two matched differential pairs with cross coupled collectors. Consider the case shown in Figure 4A of exactly equal current sources basing the two pairs. With a small positive signal at VlN, the collector current of Q1 and Q4 will increase but the collector currents of Q 2 and Q3 will decrease by the same amount. Since the collectors are cross coupled the current through the load resistors remains unchanged and independent of the VlN input voltage. In Figure 4B, notice that with VIN = 0 any variation in the ratio of biasing current sources will produce a common mode voltage across the load resistors. The differential output voltage will remain zero. In Figure 4C we apply a differential input voltage with unbalanced current sources. If IE1 is twice IE2 the gain of differential pair Q1 and Q2 is twice the gain of pair Q3 and Q4. Therefore, the change in cross coupled collector currents will be unequal and a differential output voltage will result. By replacing the separate biasing current sources with the voltage to current converter of Figure 3 we have a balanced multiplier circuit capable of four quadrant operation (Figure 5).
qRL kTRY
(VX x VY)
+ -
ID D1
VY
FIGURE 2. TRANSCONDUCTANCE MULTIPLIER
4
ICL8013
V+ RL
1/ I + 2E
V+ IE RL
1/ I + 2E
IE VOUT = 0
1/ I - 2E
RL
V = K * (VX * VY)
R
1/ I - 2E
+ VIN
+ Q1 Q2 Q3 Q4 VIN IE V-
Q1
Q2
Q3
Q4
-
VIN IE VRE
IE
IE
FIGURE 4A. INPUT SIGNAL WITH BALANCED CURRENT SOURCES VOUT = 0V
V+ RL IE + VIN = 0 VOUT = 0
1/ I 2E
RL IE Q3 Q4
1/ I 2E
FIGURE 5. TYPICAL FOUR QUADRANT MULTIPLIERMODULATOR
Q1
Q2
2IE IE
V-
FIGURE 4B. NO INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES VOUT = 0V
V+ RL IE + 2 + VIN
3/ I + 2 3/ I - 2
RL
1/ I + 2E
VOUT = 0
1/ I - 2E 1/ I - 2 2E
Figure 2 showed a current source formed by relying on the matching characteristics of a diode and the emitter base junction of a transistor. Extension of this idea to a differential circuit is shown in Figure 6A. In a differential pair, the input voltage splits the biasing current in a logarithmic ratio. (The usual assumption of linearity is useful only for small signals.) Since the input to the differential pair in Figure 6A is the difference in voltage across the two diodes, which in turn is proportional to the log of the ratio of drive currents, it follows that the ratio of diode currents and the ratio of collector currents are linearly related and independent of amplitude. If we combine this circuit with the voltage to current converter of Figure 3, we have Figure 6B. The output of the differential amplifier is now proportional to the input voltage over a large dynamic range, thereby improving linearity while minimizing drift and noise factors. The complete schematic is shown after the Electrical Specifications Table. The differential pair Q3 and Q4 form a voltage to current converter whose output is compressed in collector diodes Q 1 and Q2. These diodes drive the balanced cross-coupled differential amplifier Q7/Q 8 Q14/Q15. The gain of these amplifiers is modulated by the voltage to current converter Q9 and Q10. Transistors Q5, Q6, Q11, and Q12 are constant current sources which bias the voltage to current converter. The output amplifier comprises transistors Q16 through Q27.
Q1
Q2
Q3
Q4
-
2IE
IE
V-
FIGURE 4C. INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES, DIFFERENTIAL OUTPUT VOLTAGE
This circuit of Figure 5 still has the problem that the input voltage VIN must be small to keep the differential amplifier in the linear region. To be able to handle large signals, we need an amplitude compression circuit.
X x ID
X x IE
(I - X) IE
(I - X) I D
2 IE
FIGURE 6A. CURRENT GAIN CELL
5
ICL8013
ZIN R= IO = XIN * YIN VOUT XIN YIN MODULATOR 1 10
V+
VOUT =
XIN YIN 10
OP AMP
FIGURE 7A. MULTIPLIER BLOCK DIAGRAM
VIN V-
ZIN VXIN YIN 5K 7.5K
3 6 1 7 ICL8013 4
OUTPUT =
XIN YIN 10
FIGURE 6B. VOLTAGE GAIN WITH SIGNAL COMPRESSION
10
9
Definition of Terms
Multiplication/Division Error: This is the basic accuracy specification. It includes terms due to linearity, gain, and offset errors, and is expressed as a percentage of the full scale output. Feedthrough: With either input at zero, the output of an ideal multiplier should be zero regardless of the signal applied to the other input. The output seen in a non-ideal multiplier is known as the feedthrough. Nonlinearity: The maximum deviation from the best straight line constructed through the output data, expressed as a percentage of full scale. One input is held constant and the other swept through it nominal range. The nonlinearity is the component of the total multiplication/division error which cannot be trimmed out.
XOS YOS ZOS
FIGURE 7B. MULTIPLIER CIRCUIT CONNECTION
Division
If the Z terminal is used as an input, and the output of the op amp connected to the Y input, the device functions as a divider. Since the input to the op amp is at virtual ground, and requires negligible bias current, the overall feedback forces the modulator output current to equal the current produced by Z.
ZIN Therefore I O = XIN * YIN = --------- = 10Z IN R Since Y =V ,V 10ZIN = ---------------X IN
Typical Applications
Multiplication
In the standard multiplier connection, the Z terminal is connected to the op amp output. All of the modulator output current thus flows through the feedback resistor R27 and produces a proportional output voltage. MULTIPLIER TRIMMING PROCEDURE 1. Set XIN = Y IN = 0V and adjust ZOS for zero Output. 2. Apply a 10V low frequency (100Hz) sweep (sine or triangle) to YIN with XIN = 0V, and adjust XOS for minimum output. 3. Apply the sweep signal of Step 2 to XIN with YIN = 0V and adjust YOS for minimum Output. 4. Readjust ZOS as in Step 1, if necessary. 5. With XIN = 10.0VDC and the sweep signal of Step 2 applied to YIN, adjust the Gain potentiometer for Output = YIN. This is easily accomplished with a differential scope plug-in (A+B) by inverting one signal and adjusting Gain control for (Output - YIN) = Zero.
IN
OUT
OUT
Note that when connected as a divider, the X input must be a negative voltage to maintain overall negative feedback. DIVIDER TRIMMING PROCEDURE 1. Set trimming potentiometers at mid-scale by adjusting voltage on pins 7, 9 and 10 (X OS, YOS, ZOS) for 0V. 2. With ZIN = 0V, trim ZOS to hold the Output constant, as XIN is varied from -10V through -1V. 3. With ZIN = 0V and XIN = -10.0V adjust YOS for zero Output voltage. 4. With ZIN = XIN (and/or ZIN = -XIN ) adjust XOS for minimum worst case variation of Output, as XIN is varied from -10V to -1V. 5. Repeat Steps 2 and 3 if Step 4 required a large initial adjustment. 6. With ZIN = XIN (and/or ZIN = -XIN) adjust the gain control until the output is the closest average around +10.0V (-10V for ZIN = -XIN ) as XIN is varied from -10V to -3V.
6
ICL8013
ZIN IZ XIN YIN MODULATOR R= 1 10 VOUT = IO OP AMP
The output of the modulator is again forced to equal the current produced by the Z input.
10ZIN XIN
I O = XIN x Y IN = ( - VOUT ) 2 = 10ZIN V OU T = - 10Z IN
FIGURE 8A. DIVISION BLOCK DIAGRAM
The output is a negative voltage which maintains overall negative feedback. A diode in series with the op amp output prevents the latchup that would otherwise occur for negative input voltages. SQUARE ROOT TRIMMING PROCEDURE 1. Connect the ICL8013 in the Divider configuration. 2. Adjust ZOS, YOS, XOS, and Gain using Steps 1 through 6 of Divider Trimming Procedure. 3. Convert to the Square Root configuration by connecting XIN to the output and inserting a diode between Pin 4 and the output node. 4. With ZIN = 0V adjust ZOS for zero output voltage.
Z
XOS YOS ZOS 7 XIN ZIN YIN (0 TO -10V) 6 3 1 GAIN 5K 7.5K ICL8013 10 9 OUTPUT = 4 10ZIN XIN
FIGURE 8B. DIVISION CIRCUIT CONNECTION
XIN
IZ MODULATOR
R=
1 10 VOUT = -10ZIN
Squaring
The squaring function is achieved by simply multiplying with the two inputs tied together. The squaring circuit may also be used as the basis for a frequency doubler since cos2t = 1/2 (cos 2t + 1).
ZIN R= IO = XIN * YIN X XIN YIN OP AMP 1 10 VOUT = XIN2 10 YIN
IO = VO2
OP AMP
FIGURE 10A. SQUARE ROOT BLOCK DIAGRAM
XOS YOS ZOS 7 XIN (0V TO + 10V) 6 ZIN 3 YIN 1 ICL8013 10 9 1N4148 OUTPUT = -10Z IN 4
FIGURE 9A. SQUARER BLOCK DIAGRAM
GAIN XIN 5k SCALE FACTOR ADJUST 3 6 1 7.5k 7 10 9 OUTPUT = ICL8013 4 XIN2 10
5K 7.5K
FIGURE 10B. ACTUAL CIRCUIT CONNECTION
Variable Gain Amplifier
Most applications for the ICL8013 are straight forward variations of the simple arithmetic functions described above. Although the circuit description frequently disguises the fact, it has already been shown that the frequency doubIer is nothing more than a squaring circuit. Similarly the variable gain amplifier is nothing more than a multiplier, with the input signal applied at the X input and the control voltage applied at the Y input.
XOS YOS ZOS
FIGURE 9B. SQUARER CIRCUIT CONNECTION
Square Root
Tying the X and Y inputs together and using overall feedback from the op amp results in the square root function.
7
ICL8013
Z INPUT GAIN CONTROL VOLTAGE 5K 7.5K
3 6 1 7 ICL8013
XY 4 OUTPUT = 10
V+
10
9
XOS
20K
YOS
20K
ZOS
20K
XOS YOS ZOS V-
FIGURE 11. VARIABLE GAIN AMPLIFIER
FIGURE 12. POTENTIOMETERS FOR TRIMMING OFFSET AND FEEDTHROUGH
Typical Performance Curves
100 0 5 AMPLITUDE (dB) PHASE 10 15 20 25 1K -20 -30 -40 -50 10M 0 -10 PHASE (DEGREES) NONLINEARITY (% OF FULL SCALE)
AMPLITUDE
10
1
X-INPUT
0.1
Y-INPUT
10K
100K FREQUENCY (Hz)
1M
0.01 100
1K 10K FREQUENCY (Hz)
100K
FIGURE 13. FREQUENCY RESPONSE
FIGURE 14. NONLINEARITY vs FREQUENCY
-10 -20 FEEDTHROUGH (dB) X = 0, Y = 20VP-P -30 -40 -50 -60 -70 1K
Y = 0, X = 20VP-P 10K 100K FREQUENCY (Hz) 1M 10M
FIGURE 15. FEEDTHROUGH vs FREQUENCY
8

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