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| 74F794 8-Bit Register with Readback March 1990 Revised August 1999 74F794 8-Bit Register with Readback General Description The 74F794 is an 8-bit register with readback capability designed to store data as well as read the register information back onto the data bus. The I/O bus (D bus) has 3STATE outputs. Current sinking capability is 64 mA on both the D and Q busses. Data is loaded into the registers on the LOW-to-HIGH transition of the clock (CP). The output enable (OE) is used to enable data on D0-D7. When OE is LOW, the output of the registers is enabled on D0-D7, enabling D as an output bus. When OE is HIGH, D0-D7 are inputs to the registers configuring D as an input bus. Features s 3-STATE outputs on the I/O port s D and Q output sink capability of 64 mA s Functionally and pin equivalent to the 74LS794 Ordering Code: Order Number 74F794SC 74F794PC Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbol Connection Diagram (c) 1999 Fairchild Semiconductor Corporation DS010652 www.fairchildsemi.com 74F794 Input Loading/Fan-Out Pin Names OE CP D0-D7 Q0-Q7 Description Output Enable Input Clock Pulse Inputs D Bus Inputs/ 3-STATE Outputs Q Bus Outputs HIGH/LOW (U.L.) 1.0/1.0 1.0/1.0 3.5/1.083 750/106.6 750/106.6 Current 20 A/-0.6 mA 20 A/-0.6 mA 70 A/-650 A -15 mA/64 mA -15 mA/64 mA Truth Table Inputs CP L or H or L or H or OE L H L H Q Qn Qn Qn D Input Output, Q (Note 1) Input Outputs D Output, Q Logic Diagram Note 1: In this case the output of the register is clocked to the inputs and the overall Q output is unchanged at Qn. www.fairchildsemi.com 2 74F794 Absolute Maximum Ratings(Note 2) Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage (Note 3) Input Current (Note 3) ESD Last Passing Voltage (Min) Voltage Applied to Output In HIGH State (with VCC = 0V) Standard Output 3-STATE Output Current Applied to Output in LOW State (Max) Twice the Rated IOL (mA) -0.5V to VCC -0.5V to +5.5V -65C to + 150C -55 to +125C -55C to +150C -0.5V to +7.0V -0.5V to +7.0V -30 mA to +5.0 mA 4000V Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0C to 70C +4.5V to +5.5V Note 2: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 3: In this case the output of the register is clocked to the inputs and the overall Q output is unchanged at Qn. Note 4: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VIH VIL VCD VOH VOL IIH IBVI IBVIT ICEX VID IOD IIL IOS IIH + IOZH IIL + IOZL VID IOD IZZ ICCH ICCL ICCZ Output Leakage Current Input Leakage Test Output Circuit Leakage Current Bus Drainage Test Power Supply Current Power Supply Current Power Supply Current 4.75 Parameter Input HIGH Voltage Input LOW Voltage Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage Input HIGH Current Input HIGH Current Breakdown Test Input HIGH Current Breakdown (I/O) Output HIGH Leakage Current Input Leakage Test Output Leakage Circuit Current Input LOW Current Output ShortCircuit Current Output Leakage Current 4.75 2.4 2.0 Min 2.0 over Operating Temperature Range unless otherwise specified Typ Max Units V 0.8 -1.2 2.8 2.44 0.45 0.55 5.0 V V V V A A mA A V 3.75 -0.6 A mA mA A A V 3.75 100 65 80 80 A A mA mA mA Min Min Min Max VCC Conditions Recognized as a HIGH Signal Recognized as a LOW Signal IIN = -18 mA IOH = -3 mA IOH = -15 mA IOL = 64 mA VIN = 2.7V VIN = 7.0V (OE, CP) VIN = 5.5V (Dn) VOUT = VCC IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VIN = 0.5V (OE, CP) VOUT = 0V VOUT = 2.7V (Dn) VOUT = 0.5V (Dn) IID = 1.9 A All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VOUT = 5.25V VO = HIGH VO = LOW VO = HIGH Z 7.0 0.5 50 Max Max Max 0.0 0.0 Max Max Max Max 0.0 0.0 0.0 Max Max Max -100 -225 70 -650 3 www.fairchildsemi.com 74F794 AC Electrical Characteristics TA = +25C Symbol Parameter Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ tS(H) tS(L) tH(H) tH(L) tW(H Setup Time, HIGH or LOW Bus to Clock Hold Time, HIGH or LOW Bus to Clock Clock Pulse Width HIGH or LOW Output Disable Time Maximum Clock Frequency Propagation Delay CP to Qn Output Enable Time 90 2.5 2.5 2.3 2.0 1.0 1.0 4.0 4.0 1.5 1.5 5.8 5.8 7.0 8.0 8.5 10.0 7.0 7.0 VCC = +5.0V CL = 50 pF Typ Max TA = 0C to +70C VCC = +5.0V CL = 50 pF Min 90 2.5 2.5 2.0 2.0 1.0 1.0 4.0 4.0 1.5 1.5 5.8 5.8 8.0 9.0 9.0 10.5 8.0 8.0 Max MHz ns ns ns ns ns ns Units www.fairchildsemi.com 4 74F794 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com 74F794 8-Bit Register with Readback Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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