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ASAHI KASEI [AKD4356] AKD4356 Evaluation board Rev.B for AK4356 GENERAL DESCRIPTION The AKD4356 is an evaluation board for AK4356, the 24bit 6ch D/A converter for DVD-audio. The AKD4356 has the interface with AKM's wave generator using ROM data and with AKM's A/D converter evaluation boards. Therefore, it is easy to evaluate the AK4356. The AKD4356 also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector or RCA connector. n Ordering guide AKD4356 --Evaluation board for AK4356 (Cable for connecting with printer port of IBM-AT compatible PC and control software are packed with this.) FUNCTION * On-board 2nd order LPF * On-board clock generator * Compatible with 3 types of interface - Direct interface with AKM's A/D converter evaluation boards and direct interface with AKM's signal generator(AKD43XX) by 10pin header - On-board CS8414 as DIR which accepts optical input - Direct interface with AC3 decoder by 10pin header * BNC connector for an external clock input * 10pin header for serial control interface DVDD = 4.5 5.25V GND Lch x3 Output LPF Rch x3 CS8414 (DIR) Opt In RCA In 10pin Header AK4356 Clock Generator A/D, D/A Data ROM Data 10pin Header Control Data AVDD = 4.5 5.25V Figure 1. AKD4356 Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual. '99/11 ASAHI KASEI [AKD4356] n External analog circuit The 2nd order LPF (fc=93.2kHz, Q=0.712) which adds differential outputs of AK4356 is implemented on the board. When the further attenuation of the out-band noise is needed, some additional LPF is required. Analog signal is output through BNC connectors on the board. And the output level of AK4356 is 5.5Vpp@5V. The AK4356 detects input signal "zero" conditions and assert high on DZFL/DZFR pins. As shown on Figure 2, analog output is muted externally with this signal. DZFL* (DZFR*) JP* RN1202 AVDD RN2202 DZFL* (DZFR*) LOUT(ROUT-) R1 R3 C1 R1 R3 C2 R2 2SC3327 +12V + 22u 220 LOUT(ROUT-) NJM5532D R2 C2 10k -12V Figure 2. On-board analog filter R1 4.7k R2 R3 C1 4.7k 200 3300p Table 1. The value of R,C on this board C2 470p fin 20kHz 40kHz Frequency Response -0.004dB -0.123dB Table 2. Frequency Response of LPF 80kHz -1.823dB '99/11 ASAHI KASEI [AKD4356] n Operation sequence 1) Set up the power supply lines. [AVDD] (orange) = 4.55.25V [DVDD] (orange) = 4.55.25V [VD] (red) = 3.45.0V [VP+] (green) = +12V+15V [VP-] (blue) = -12V-12V [AGND] (black) = 0V [DGND] (black) = 0V Each supply line should be distributed from the power supply unit. 2) Set-up the evaluation modes, jumper pins and DIP switches (See the followings.) 3) Power on. The AK4356 should be reset once bringing SW1(-PD) "L" upon power-up. n Evaluation mode Applicable evaluation modes 1) DIR (Optical Link and RCA) (default) 2) Using ROM data (AK43XX) 3) Using AKM's evaluation board for ADC 4) Feeding all signals from external 1) DIR (Optical Link and RCA) ADC DIR ADC DIR BNC XTL DIR VD GND 2) Ideal sine wave generated by ROM data Connect the AKD43XX with PORT3(AD/ROM). AKD4356 sends MCLK to AKD43XX, and receives LRCK, BICK and SDATA. In case of using external master clock through a BNC connector, select "BNC" on JP15(XTI) and short JP16(XTE). JP4 LRCK JP7 BICK JP15 XTI JP16 XTE JP14 DIR JP13 SDATA ADC DIR ADC DIR BNC XTL DIR VD GND '99/11 ASAHI KASEI [AKD4356] 3) Using AKM's evaluation board for ADC To evaluate AK4356 with analog input, the AKM's evaluation board for ADC can be used. MCLK, BICK and LRCK are supplied from clock generator on the AKD4356, and analog signal is A/D converted and send to AKD4356 through PORT3(AD/ROM). In case of using external master clock through a BNC connector, select "BNC" on JP15(XTI) and short JP16(XTE). JP4 LRCK JP7 BICK JP15 XTI JP16 XTE JP14 DIR JP13 SDATA ADC DIR ADC DIR BNC XTL DIR VD GND 4) Feeding all signals from external Under the following set-up, all external signals can be fed through POTR3. JP4 LRCK JP7 BICK JP15 XTI JP16 XTE JP14 DIR JP13 SDATA ADC DIR ADC DIR BNC XTL DIR VD GND n BICK frequency [JP9]: When BICK is fed from 74HC4040 on board, it's frequency is selected with JP9. 128fs: BICK = 128fs 64fs: BICK = 64fs (Figure 3) 32fs: BICK = 32fs JP9 X_BICK 128fs 64fs 32fs Figure 3. BICK frequency '99/11 ASAHI KASEI [AKD4356] n DIP switch set up Upper side is "ON"("H"), lower side is "OFF"("L"). [SW3](MODE1): No.1 to 5 set the mode of AK4356 and No.6 to 8 set the mode of CS8412. No. 1 2 3 4 5 6 7 8 Pin CAD1 CAD0 DIF0 DIF1 DIF2 M2 M1 M0 OFF ON Chip address (2bit) Digital interface format of CS8414 (See table 2.) (Note) Table 3. SW3 set-up (Note: M2-0 should be selected at only evaluation mode 1. In other mode, these should be "OFF".) 3 4 5 6 7 8 Format DIF0 DIF1 DIF2 M2 M1 M0 16bit, LSB justified 0 0 0 1 0 1 20bit, LSB justified 1 0 0 24bit, MSB justified 0 1 0 0 0 0 I2S 1 1 0 0 1 0 24bit, LSB justified 0 0 1 Table 4. Digital interface format set-up (1=ON, 0=OFF) (CS8414 does not correspond to 20/24bit LSB justified format.) JP6 BICK2 THR INV THR default - Mode 0 1 2 3 4 [SW4](MODE2): Set the mode of AK4356. No. 1 2 3 4 5 Pin DFS0 DZFE CKS2 CKS1 CKS0 OFF [JP5, 8]: Set the dividing rate corresponding to CKS2-0. This set up is needed only for the evaluation mode 3. JP5 JP8 Mode FS2 FS1 128fs x1/2 x1 256fs x1 x1 512fs x1 x2 Table 6. JP5 and 8 set up (For 192fs/384fs/768fs mode, use the external divider.) '99/11 ASAHI KASEI [AKD4356] n Other jumpers set up [JP1](GND): Analog ground and digital ground Open: Separated n The function of the toggle SW Upper-side is "H" and lower-side is "L". [SW1](-PD): Resets the AK4356. Keep "H" during normal operation. [SW2](SMUTE): Soft mute of AK4356. Bring "H" when using soft mute. n The indication content for LED [D2] (VERF): Monitors VERF pin of the CS8414. LED turns on when some error has occurred to CS8414. [D3] (PREM): Indicates whether the input data is pre-emphasized or not. LED turns on when the data is preemphasized. n Serial control mode The AK4356 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1(CR-I/F) with PC by 10-line flat cable packed with the AKD4356. Chip address can be selected by SW3(MODE1)-No.1(CAD1) and No.2(CAD0). Take care of the direction of connector. There is a mark at 1pin. The pin layout of PORT1 is as Figure 4. 10 PORT1 CR-I/F 9 -CS CCLK CDTI 2 1 Figure 4. PORT1 pin layout n Interface with AC3 decoder PORT2(AC3) is used for interface with AC3 decoder. MCLK, BICK, LRCK and 3-line serial data can be input from the decoder via PORT2. Pin layout of PORT2 is as Figure5. In this case, JP4(LRCK), JP7(BICK), JP15(XTI), JP16(XTE), JP14(DIR) and JP13(SDATA) should be set up as evaluation mode 4. 2 10 MCLK BICK LRCK PORT2 AC3 9 SDTI1 SDTI2 SDTI3 1 Figure 5. PORT2 pin layout '99/11 ASAHI KASEI [AKD4356] MEASUREMENT RESULTS [Measurement condition] * Measurement unit : ROHDE & SCHWARZ, UPD04 * MCLK : 256fs * BICK : 64fs * fs : 44.1kHz, 96kHz, 192kHz * BW : 20Hz20kHz (fs=44.1kHz), 20Hz40kHz (fs=96kHz), 20Hz80kHz (fs=192kHz) * Bit : 24bit * Power Supply : AVDD=DVDD=5V * Interface : DIR (fs=44.1kHz), Serial Multiplex (fs=96kHz, 192kHz) * Temperature : Room Parameter S/(N+D) DR S/N Input signal 1kHz, 0dB 1kHz, -60dB no signal Measurement filter 20kLPF 20kLPF 20kLPF, A-weighted 20kLPF 20kLPF, A-weighted Measurement filter 40kLPF 40kLPF 20kLPF, A-weighted 40kLPF 20kLPF, A-weighted Measurement filter 80kLPF 80kLPF 20kLPF, A-weighted 80kLPF 20kLPF, A-weighted fs=44.1kHz 97.5dB 110.0dB 113.2dB 110.1dB 113.5dB fs=96kHz 94.4dB 106.2dB 112.3dB 106.4dB 112.8dB fs=192kHz 90.0dB 92.6dB 112.8dB 93.3dB 112.8dB Parameter S/(N+D) DR S/N Input signal 1kHz, 0dB 1kHz, -60dB no signal Parameter S/(N+D) DR S/N Input signal 1kHz, 0dB 1kHz, -60dB no signal [Measurement condition] * Measurement unit : Audio Precision, System two, Cascade * MCLK : 256fs * BICK : 64fs * fs : 44.1kHz * BW : 20Hz20kHz * Bit : 24bit * Power Supply : AVDD=DVDD=5V * Interface : DIR * Temperature : Room Parameter S/(N+D) DR S/N Input signal 1kHz, 0dB 1kHz, -60dB no signal Measurement filter 20kLPF 22kLPF, A-weighted 22kLPF, A-weighted Results 98.8dB 112.2dB 112.6dB '99/11 ASAHI KASEI [AKD4356] n Plots [Measurement condition] * Measurement unit : Audio Precision, System two, Cascade (fs=48kHz), ROHDE & SCHWARZ, UPD04 (fs=96kHz) * MCLK : 256fs * BICK : 64fs * fs : 44.1kHz, 96kHz, 192kHz * BW : 20Hz20kHz (fs=44.1kHz), 20Hz40kHz (fs=96kHz), 20Hz80kHz (fs=192kHz) * Bit : 24bit * Power Supply : VA=VD=5V * Interface : DIR (fs=48kHz, 96kHz), Serial Multiplex (fs=192kHz) * Temperature : Room fs=44.1kHz Figure 6. THD+N vs Input Level (fin=1kHz) Figure 7. THD+N vs fin (0dBFS input) Figure 8. Linearity (fin=1kHz) Figure 9. Frequency Response (0dBFS input) Figure 10. Cross-talk (0dBFS input) Figure 11. FFT (1kHz, 0dBFS input) Figure 12. FFT (1kHz, -60dBFS input) Figure 13. FFT (noise floor) Figure 14. FFT (outband noise) fs=96kHz Figure 15. THD+N vs Input Level (fin=1kHz) Figure 16. THD+N vs fin (0dBFS input) Figure 17. Linearity (fin=1kHz) Figure 18. Frequency Response (0dBFS input) fs=192kHz Figure 19. THD+N vs Input Level (fin=1kHz) Figure 20. THD+N vs fin (0dBFS input) Figure 21. Linearity (fin=1kHz) Figure 22. Frequency Response (0dBFS input) '99/11 ASAHI KASEI [AKD4356] AKM -90 -92 -94 -96 -98 -100 -102 d B r A -108 -110 -112 -114 -116 -118 -120 -120 -104 -106 AK4356 THD+N vs Input Level (fs=44.1kHz, fin=1kHz) -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 Figure 6. THD+N vs Input Level (fs=44.1kHz; fin=1kHz) AKM -90 AK4356 THD+N vs fin (fs=44.1kHz, 0dBFS input) -92 -94 -96 -98 d B r A -102 -100 -104 -106 -108 -110 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 7. THD+N vs fin (fs=44.1kHz; 0dBFS input) '99/11 ASAHI KASEI [AKD4356] AKM +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 AK4356 Linearity (fs=44.1kHz, fin=1kHz) -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0 Figure 8. Linearity (fs=44.1kHz; fin=1kHz) AKM +0.5 AK4356 Frequency Response (fs=44.1kHz, 0dBFS input) +0.4 +0.3 +0.2 +0.1 d B r A -0.1 +0 -0.2 -0.3 -0.4 -0.5 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k Figure 9. Frequency Response (fs=44.1kHz; 0dBFS input) * including output 2nd order LPF Response '99/11 ASAHI KASEI [AKD4356] AKM -100 AK4356 Cross-talk (fs=44.1kHz, 0dBFS input) -102 -104 -106 -108 d B -110 -112 -114 -116 -118 -120 20 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 10. Cross-talk (fs=44.1kHz; 0dBFS input) AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4356 FFT (fs=44.1kHz; 1kHz, 0dBFS input) 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 11. FFT (fs=44.1kHz; 1kHz, 0dBFS input) FFT point=16384, Avg=8 '99/11 ASAHI KASEI [AKD4356] AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4356 FFT (fs=44.1kHz; 1kHz, -60dBFS input) 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 12. FFT (fs=44.1kHz; 1kHz, -60dBFS input) FFT point=16384, Avg=8 AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 AK4356 FFT (noise floor; fs=44.1kHz, no signal input) 50 100 200 500 Hz 1k 2k 5k 10k 20k Figure 13. FFT (noise floor: fs=44.1kHz; no signal input) FFT point=16384, Avg=8 '99/11 ASAHI KASEI [AKD4356] AKM +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 200 AK4356 FFT (outband noise: ~130kHz; fs=44.1kHz, no signal input) 500 1k 2k 5k Hz 10k 20k 50k 100k Figure 14. FFT (outband noise: fs=44.1kHz; no signal input) FFT point=16384, Avg=8 '99/11 ASAHI KASEI [AKD4356] AKM -90 -92 -94 -96 -98 -100 -102 d B r A -108 -110 -112 -114 -116 -118 -120 -120 -104 -106 AK4356 THD+N vs Input Level (fs=96kHz, fin=1kHz) -110 -100 -90 -80 -70 -60 dBFS -50 -40 -30 -20 -10 +0 Figure 15. THD+N vs Input Level (fs=96kHz; fin=1kHz) AKM -90 AK4356 THD+N vs fin (fs=96kHz, 0dBFS input) -92 -94 -96 -98 d B r A -102 -100 -104 -106 -108 -110 20 50 100 200 500 1k Hz 2k 5k 10k 20k 40k Figure 16. THD+N vs fin (fs=96kHz; 0dBFS input) '99/11 ASAHI KASEI [AKD4356] AKM +0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140 AK4356 Linearity (fs=96kHz, fin=1kHz) -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0 Figure 17. Linearity (fs=96kHz; fin=1kHz) AKM +0.5 AK4356 Frequency Response (fs=96kHz, 0dBFS input) +0.4 +0.3 +0.2 +0.1 d B r A -0.1 +0 -0.2 -0.3 -0.4 -0.5 2.5k 5k 7.5k 10k 12.5k 15k 17.5k 20k Hz 22.5k 25k 27.5k 30k 32.5k 35k 37.5k 40k Figure 18. Frequency Response (fs=96kHz; 0dBFS input) including external 2nd order LPF response '99/11 ASAHI KASEI [AKD4356] Figure 19. THD+N vs Input Level (fs=192kHz; fin=1kHz) Figure 20. THD+N vs fin (fs=192kHz; 0dBFS input) '99/11 ASAHI KASEI [AKD4356] Figure 21. Linearity (fs=192kHz; fin=1kHz) Figure 22. Frequency Response (fs=192kHz; 0dBFS input) * including external 2nd order LPF response '99/11 ASAHI KASEI [AKD4356 Control Program] AKD4356 Control Program ver 1.0 operation manual 1. Connect IBM-AT compatible PC with AKD4356 by 10-line type flat cable (packed with AKD4356). Take care of the direction of 10pin Header (Refer to manual of AKD4356). 2. Start up "WINDOWS 95" or "WINDOWS 98". 3. Insert the floppy-disk labeled "AKD4356 Control Program ver 1.0" into the floppy-disk drive. 4. Set up "MS-DOS" from start menu. 5. Change directory to the floppy-disk drive(ex.a:) at MS-DOS prompt. 6. Type "ak4356". 7. Then follow the displayed comment (See the following). ==================== < `99/3 -1- ASAHI KASEI At first the following message is displayed: ****** AK4356 Control Program ver 1.0 , '99/3 ****** copyright(c) 1999, Asahi Kasei Microsystems co.,ltd. All rights reserved. Input Chip Address(CAD1,CAD0) (2 figure, binary) = Input chip address in 2 figures of binary. Set CAD1 and CAD0 before the AKD4356 is powered up. When hanging CAD1 and CAD0, set SW1(-PD) "L", then "H" after that. [AKD4356 Control Program] After chip address is defined, the following default register map is displayed (Loop starts from here): CAD1-0=00 ---------------------------------------------------------------ADDR = 00 : 01 DIF0 RSTN ) 0 1 DIF0 RSTN ) 1 1 `99/3 -2- ASAHI KASEI [AKD4356 Control Program] 2) If you input "R" or "r", this program writes default data to all register addresses. 3) If you input "T" or "t", current register map is displayed. 4) If you input "I" or "i", this program increment data of current address by 1 (only for addr=04H to 09H). You can increment ATT value by 1step. 5) If you input "D" or "d", this program decrement data of current address by 1 (only for addr=04H to 09H). You can decrement ATT value by 1step. 6) If you input "S" or "s", this program is terminated. `99/3 -3- 5 4 3 2 1 VD D1 R1 10k 1 D JP1 Digital Ground U2 4 BICK MCLK 2 3 4 5 6 7 8 9 1 19 A1 A2 A3 A4 A5 A6 A7 A8 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 18 17 16 15 14 13 12 11 D GND Analog Ground U1A 2 3 U1B C1 L 0.1u H SW1 -PD 74HC14 74HC14 DZFL1 CAD1 CAD0 DZFR1 DZFL2 LOUT1+ C3 0.1u +C2 11 10 10u U3 9 8 7 6 5 4 3 2 1 LOUT1DVDD1 VD R2 10k G1 G2 74AC541 CAD1 CAD0 DZFR1 DVDD PD 5 +C4 1u 6 SDTI1 SDTI2 SDTI3 LRCK 2 3 4 5 6 7 8 9 1 19 U4 A1 A2 A3 A4 A5 A6 A7 A8 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 18 17 16 15 14 13 12 11 12 13 14 15 16 17 18 19 R8 2.2k R9 2.2k 20 DFS0 CKS0 21 22 DVSS SDTI1 SDTI2 SDTI3 LRCK SMUTE CCLK CDTI CS DFS0 C L H SW2 SMUTE 1k 74HC14 LOUT1+ LOUT1- DZFL1 DZFL2 MCLK BICK R3 U1C ROUT1+ ROUT1LOUT2+ LOUT2ROUT2+ 44 43 42 41 40 39 38 37 36 35 34 ROUT1+ ROUT1LOUT2+ LOUT2ROUT2+ ROUT2LOUT3+ LOUT3ROUT3+ ROUT3- C 1 2 3 4 5 B PORT1 -CS 10 9 CCLK 8 CDTI 7 R6 6 VD 51 CR-I/F R5 51 R4 51 G1 G2 74AC541 AK4356 ROUT2LOUT3+ LOUT3ROUT3+ ROUT3VREFH AVSS AVDD R7 2.2k CKS0 DZFR3 DZFR2 DZFL3 CKS1 CKS2 DZFE DIF0 DIF1 DIF2 B DVDD 3 + C7 47u JP2 DVDD 23 24 25 26 27 28 29 30 31 32 33 0.1u 2 DIF0 CKS1 DVDD1 CKS2 DZFE DIF1 DIF2 T1 NJM78M05FA 3 GND IN OUT 1 + AVDD JP3 REG C9 47u 2 L1 (short) 1 + 2 L6 1 REG A AVDD2 C8 10u 47u Title Size Document Number 2 AKD4356 AK4356 Sheet 1 AVDD1 5 4 3 A4 Date: 2 Tuesday, August 10, 1999 + 1 C5 C6 10u AVDD1 DZFR2 DZFL3 DZFR3 A AVDD1 Rev B 1 of 3 5 4 3 2 1 VD for 74HCU04, 74HC14, 74AC74, 74AC541x2,74HC4040 SW3 C11 0.1u C12 0.1u C13 0.1u C14 0.1u C15 0.1u C16 0.1u M0 M1 M2 DIF0 DIF1 DIF2 CAD0 CAD1 9 10 11 12 13 14 15 16 MODE1 RP1 PORT2 10 9 8 SDTI1 7 SDTI2 6 SDTI3 AC3 47k 8 7 6 5 4 3 2 1 VD VD C10 47u + SW4 CKS0 CKS1 CKS2 DZFE DFS0 6 7 8 9 10 MODE2 CAD1 CAD0 DIF2 DIF1 DIF0 M2 M1 M0 RP2 5 4 3 2 1 D D MCLK BICK LRCK 1 2 3 4 5 1 2 3 4 5 6 7 8 9 5 4 3 2 1 CKS0 CKS1 CKS2 DZFE DFS0 47k JP4 X_LRCK C 1 ADC DIR LRCK JP7 LRCK 1 U5A 1 2 INV x1 JP6 BICK2 2 JP5 FS2 BICK 3 2 x1/2 MCLK C DIR_LRCK X_BICK 74HCU04 ADC DIR BICK THR 3 JP8 U6 4 x1 3 x2 10 11 Q1 Q2 RST Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 74HC4040 CLK 9 128fs 7 64fs 6 32fs 5 3 2 4 13 12 14 15 1 JP9 X_BICK X_BICK X_LRCK DIR_BICK SDTI1 SDTI2 MCLK BICK LRCK SDATA AD/ROM 1 2 3 4 5 PORT3 10 9 8 7 6 ROM R10 10k B 1 2 FS1 VD 3 DATA 3 DATA 3 DATA VD U7A 2 3 JP13 SDATA D 4 JP10 SDTI1 2 JP11 SDTI2 2 JP12 SDTI3 1 GND 2 1 GND 1 GND SDTI3 PR Q 5 CLK CL Q6 74AC74 VD 1 R11 1k 3 GND JP14 DIR VD 1 VD D2 VERF R12 1k 1 L2 10u 2 U5B 4 3 2 JP15 XTI DIR BNC XTL X1 1 74HCU04 2 1 B 11.2896MHz R13 1M U5D + C18 10u M1 M0 C20 0.1u 8 9 10 C21 (open) C24 M2 R15 1k 47n 6 U5C 5 74HCU04 J2 BNC 74HCU04 U5E 11 C22 (open) A L3 10u 6 5 PORT4 6 GND VCC GND 5 OUT TORX174 4 3 2 1 D3 PREM C19 0.1u R14 +C17 1 OPT 10u 1k C23 A 2 U8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 C Cd/F1 Cc/F0 Cb/E2 Ca/E1 C0/E0 VD+ DGND RXP RXN FSYNC SCK CS12/FCK U VREF Ce/F2 SDATA ERF M1 M0 VA+ AGND FILT MCK M2 M3 SEL CBL 28 27 26 25 24 23 22 21 20 19 18 17 16 15 JP16 XTE 74HCU04 3 RCA J1 RCA R16 75 JP17 RCA/OPT 2 0.01u C25 0.1u C26 DIR_LRCK DIR_BICK CS8414 0.01u R17 51 Title Size Document Number AKD4356 Interface Sheet 1 Rev A3 Date: 5 4 3 2 B 2 of Tuesday, August 10, 1999 3 5 4 3 2 1 1 DZFL1 C27 (open) ON1 2 OFF JP18 1 DZFL1 3 2 TR3 RN2202 (10k,10k) 2 R18 10k 1 C28 (open) DZFR1 3 2 1 4 3 3 2 TR1 RN1202 (10k,10k) AVDD2 DZFR1 ON1 2 OFF JP19 1 4 3 3 2 TR2 RN1202 (10k,10k) AVDD2 TR4 RN2202 (10k,10k) R19 10k 2 3 1 TR6 D C78 D R20 4.7k R24 200 C31 3300p R21 4.7k C29 470p 3 TR5 2SC3327 ROUT1- C80 (short) R22 4.7k R25 200 C32 R23 4.7k C30 470p 12V_N C34 7 U9B NJM5532D 12V_P 22u LOUT1(short) 2SC3327 12V_N C33 1 U9A NJM5532D 12V_P 22u R32 10k C79 LOUT1+ (short) R28 4.7k R29 200 R34 4.7k C81 C35 (open) ROUT1+ (short) C37 8 470p 4.7k R35 4.7k 200 C38 470p 8 1 1 DZFL2 C46 C ON1 2 OFF JP20 1 (open) DZFL2 3 2 TR9 RN2202 (10k,10k) 2 R36 C47 (open) 3 2 1 4 3 3 2 TR7 RN1202 (10k,10k) AVDD2 DZFR2 JP21 4 ON1 2 3 OFF DZFR2 3 2 C82 LOUT2(short) R38 4.7k R42 200 C50 3300p R39 4.7k C48 470p 12V_N 1 U10A NJM5532D 12V_P C52 22u R50 10k 10k 3 1 TR11 2SC3327 ROUT2- C84 (short) R37 R40 4.7k R43 200 R41 10k 4.7k C49 470p 12V_N 7 U10B NJM5532D 12V_P C53 22u R51 10k 3 1 2 C83 LOUT2+ (short) R46 4.7k R47 200 R52 4.7k C85 C54 (open) ROUT2+ (short) C56 8 470p 4.7k R53 4.7k 200 C57 470p 8 B 10u 1 DZFL3 C65 (open) ON1 2 OFF JP22 1 DZFL3 3 2 TR15 RN2202 (10k,10k) 2 R54 10k 1 C66 (open) DZFR3 3 2 1 4 3 3 2 TR13 RN1202 (10k,10k) AVDD2 DZFR3 ON1 2 OFF JP23 1 4 3 3 2 TR14 RN1202 (10k,10k) AVDD2 TR16 RN2202 (10k,10k) R55 10k 1 2 C86 LOUT3(short) R56 4.7k R60 200 C69 3300p R57 4.7k C67 470p 3 TR17 2SC3327 ROUT3- C88 (short) R58 4.7k R61 200 C70 R59 4.7k C68 470p 12V_N 7 U11B NJM5532D 12V_P C72 22u 3 TR18 2SC3327 12V_N C71 1 U11A NJM5532D 12V_P 22u R68 10k C87 A R64 4.7k R65 200 R70 4.7k C89 C73 (open) ROUT3+ (short) LOUT3+ (short) C75 8 470p 4.7k R71 4.7k 200 C76 470p 8 5 4 3 + + 3 R66 R67 5 - - 2 R62 220 J7 LOUT3 3300p 6 R63 220 R69 10k C74 (open) J8 ROUT3 4 4 Title Size Document Number AKD4356 Analog out Sheet 1 A3 Date: 2 Tuesday, August 10, 1999 3 + + + + + + 3 R48 R49 5 - - 2 R44 220 J5 LOUT2 C51 4 3300p 6 R45 220 C55 (open) 4 + + 3 R30 R31 5 - - 2 R26 220 J3 LOUT1 3300p 6 R27 220 R33 10k C36 (open) J4 ROUT1 4 4 +12V REG TR8 RN1202 (10k,10k) AVDD2 TR10 RN2202 (10k,10k) C77 0.1u 1 +C39 47u L4 10u for NJM5532D x3 2 C40 + 10u C43 0.1u +C41 10u C44 0.1u +C42 10u 12V_P C45 0.1u C TR12 2SC3327 J6 ROUT2 -12V 1 C58 47u L5 10u for NJM5532D x3 2 C59 C60 0.1u C61 10u C62 0.1u C63 10u 12V_N B C64 0.1u A Rev B of 3 IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. |
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