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MK2746 DVD/MPEG CLOCK SOURCE Description The MK2746 is a low cost, low jitter, high performance clock synthesizer for DVD and other MPEG2 based applications. Using analog Phase Locked Loop (PLL) techniques, the device accepts a 27 MHz fundamental mode crystal or clock input to produce multiple output clocks including the processor clock, audio clock, bus driver clock, SDRAM clock and a Video clock. The audio clocks are frequency locked to the 27 MHz input using our patented zero ppm error techniques, allowing audio and video to track exactly, thereby eliminating the need for large buffer memory. ICS manufacturers the largest variety of DVD, set top box, and multimedia clock synthesizers for all applications. Features * Packaged in 16 pin TSSOP * Operating voltage of 3.3 V * Provides tight jitter controlled selectable processor clock per table. * Provides selectable audio clock per table. * Provides fixed outputs of 27 MHz (Video), 50 MHz (DSP/Bus clock) and 133.33 MHz (SDRAM). * Advanced, low power, sub-micron CMOS process Block Diagram VDD 3 Audio AS1:0 PLL / Clock Circuit PS1:0 27 MHz crystal or clock X1 Clock Buffer/ Crystal Ocsillator Processor (Tight Jitter) 50M Bus Clock 133.33 M SDRAM Clock 27M Video Clock X2 2 GND MDS 2746 A I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 100802 te l (40 8) 2 95-98 00 w w w. i c st . c o m MK2746 DVD/MPEG CLOCK SOURCE Pin Assignment X2 X1/ICLK VDD GND PCLK PS0 133.33M PS1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VDD 27M AS0 ACLK AS1 VDD GND 50M Clock Output Select Table in MHz AS1 0 0 1 1 AS0 0 1 0 1 Audio CLK 12.288 11.2896 18.432 8.192 PS1 0 0 1 1 PS0 0 1 0 1 Processor CLK 66.66 41.66 50 58.33 16 pin (173 mil) TSSOP 0 = connect directly to GND 1 = connect directly to VDD Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name X2 X1/ICLK VDD GND PCLK PS0 133.33M PS1 50M GND VDD AS1 ACLK AS0 27M VDD Pin Type Input Input Power Power Output Input Output Input Output Power Power Input Output Input Output Power Pin Description Connect to a 27 MHz fundamental mode crystal. Leave open for clock input. Connect to a 27 MHz fundamental mode crystal or clock. Connect to +3.3 V. Connect to ground Processor clock output. Determined by the status of PS1, PS0 per table above. Processor Clock select 0. Selects processor clock per table above. SDRAM clock output. Processor Clock select 1. Selects processor clock per table above. 50 MHz clock output. Connect to ground. Connect to +3.3 V. Audio clock select 1. Selects audio clock per table above. Audio clock output determined by the status of PS1, PS0. Audio clock select 0. Selects audio clock per table above. 27 MHz clock output. Connect to +3.3 V. MDS 2746 A In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 100802 tel (4 08) 295-9 800 w w w. i c s t . c o m MK2746 DVD/MPEG CLOCK SOURCE External Component Selection The MK2746 requires a minimum number of external components for proper operation. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces. 3) To minimize EMI the 33 series termination resistor, if needed, should be placed close to the clock output. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the MK2746. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Decoupling Capacitors Decoupling capacitors of 0.01F should be connected between VDD and GND as close to the MK2746 as possible. For optimum device performance, the decoupling capacitors should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB traces between the clock outputs and the loads are over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Crystal Tuning Load Capacitors For a crystal input, a parallel resonant fundamental mode crystal should be used. Crystal capacitors must be connected between each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL-6)*2. In this equation CL is equal to the crystal load capacitance in pF. As an example, for a crystal with an 18 pF load capacitance, each crystal capacitor would be 24 pF [(18-6)*2=24]. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK2746. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 260C MDS 2746 A In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 100802 tel (4 08) 295-9 800 w w w. i c s t . c o m MK2746 DVD/MPEG CLOCK SOURCE Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +3.0 Typ. Max. +70 +3.6 Units C V DC Electrical Characteristics VDD=3.3 V 10% , Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Short Circuit Current Input Capacitance Nominal Output Impedance On Chip Pull-up Resistor Symbol VDD VIH VIL VIH VIL VOH VOL VOH IDD IOS CIN ZOUT RPU Conditions input selects input selects ICLK ICLK IOH = -12 mA IOL = 12 mA IOH = -4 mA No load Min. 3.0 2.0 Typ. Max. 3.6 0.8 Units V V V V V V V V (VDD/2)-1 2.4 VDD/2 VDD/2 (VDD/2)+1 0.4 VDD-0.4 40 70 5 20 mA mA pF k k AS1, AS0 pins PS1 pin 120 510 AC Electrical Characteristics VDD = 3.3 V 10%, Ambient Temperature 0 to +70 C, unless stated otherwise Parameter Input Frequency Output Rise Time Output Fall Time Output Clock Duty Cycle Maximum Output Jitter, short term, peak to peak Maximum Output Jitter, short term, peak to peak Maximum Output Jitter, long term, peak to peak tOR tOF tD tJ tJ tJ 20% to 80% of VDD, Note 1 80% to 20% of VDD, Note 1 at VDD/2, Note 1 PCLK output, Note 1 All clocks, except PCLK, Note 1 1000 cycles, except ACLK, Note 1 40 Symbol Conditions Min. Typ. 27 1.0 1.0 50 +100 +200 750 Max. Units MHz 1.8 1.8 60 ns ns % ps ps ps Note 1: Measured with 15 pF Load. MDS 2746 A In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 100802 tel (4 08) 295-9 800 w w w. i c s t . c o m MK2746 DVD/MPEG CLOCK SOURCE Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch) Package dimensions are kept current with JEDEC Publication No. 95 16 Millimeters Symbol Min Max Inches* Min Max E1 IN D EX AR EA E 1 2 D A A1 A2 b C D E E1 e L aaa -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 4.90 5.1 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0 8 -0.10 -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.193 0.201 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0 8 -0.004 A 2 A 1 A *For reference only. Controlling dimensions in mm. c -Ce b S E A T IN G P LA N E L aaa C Ordering Information Part / Order Number MK2746G MK2746GT Marking MK2746G MK2746GT Shipping Packaging Tubes Tape and Reel Package 16-pin TSSOP 16-pin TSSOP Temperature 0 to +70 C 0 to +70 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 2746 A In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 100802 tel (4 08) 295-9 800 w w w. i c s t . c o m |
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