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Stereo Decoder/Noise Blanker TDA 4340X 1 1.1 Overview Features * Internal reference voltage source * Adjustment free oscillator with ceramic resonator 456 kHz * Pilot dependent mono/stereo switching with hysteresis P-DSO-20-1 * Stereo indicator output * Analogue control of mono/stereo change over (stereo noise control, SNC) * Pilot canceller (19 kHz) * Adjacent channel noise suppression (114 kHz) * MUTE facility * Analogue control of deemphasis (high cut control, HCC). * Stereo inputs for additional signal source at output amplifiers * Interference noise detector with integrated high-pass filter * (IF level signal or MPX input) * MPX input low-pass filter * Noise blanking at MPX demodulator outputs * Input and output level adjustable (resistor values) Type TDA 4340X 1.2 Application Ordering Code Q67000-A5058 Package P-DSO-20-1 The TDA 4340X is an integrated circuit providing the stereo decoder function and noise blanking for FM car radio applications. Semiconductor Group 1 04.96 TDA 4340X 1.3 Pin Configuration (top view) P-DSO-20-1 Figure 1 Semiconductor Group 2 04.96 TDA 4340X 1.4 Pin No. 1 2 3 4 5 6 7 Pin Definitions and Functions Function Phase detector output, PLL loop filter Oscillator pin (456 kHz) Ground Reference current pin, external reference resistor Positive supply voltage Interference detector input, noise detector input Timing capacitor for monoflop (gate time) Low voltage applied turns off oscillator, phase detector, pilot detector, SNC and changes the time constant for HCC, noise gate monoflop Hold capacitor for noise detector average level Low voltage applied mutes the stereo decoder output, noise level capacitor Auxiliary input left, output amplifier left Audio signal output left Audio signal output right Auxiliary input right, output amplifier right HCC timing/hold capacitor, deemphasis right HCC timing/hold capacitor, deemphasis left Input for HCC voltage Input for SNC voltage Input for reference level control voltage (HCC and SNC) Pilot indicator output, open collector, active low Pilot detector output Low voltage applied switches the stereodecoder to mono state Input for MPX signal 8 9 10 11 12 13 14 15 16 17 18 19 20 Semiconductor Group 3 04.96 TDA 4340X 1.5 Functional Block Diagram Figure 2 Block Diagram Semiconductor Group 4 04.96 TDA 4340X 2 Circuit Description Power Supply, Reference Current A temperature stable, low noise reference voltage generator is used for better ripple rejection and for the generation of a reference current. This current is used as a time base for the deemphasis, the gate time of the pulse former, and the pilot cancellation, avoiding temperature and tolerance effects. MPX Input, MPX Filter Adjusting the value of the input resistor, the MPX input can be adapted to the output level of the FM demodulator. A 4-pole low-pass filter determines the bandwidth of the MPX signal. Voltage Controlled Oscillator, Phase Detector The 456 kHz oscillator and the frequency dividers are used as walsh function generators (suppression of 3rd order harmonics) for: - 38 kHz for the stereo decoder - 19 kHz inphase for phase detector and pilot cancellation - 19 kHz quadrature for the phase detector. The phase detector locks the on-chip 19 kHz signal to the pilot tone in the MPX signal at 90 phase. Pilot Detector, Pilot Indicator, Pilot Cancellation The voltage at the pilot detector output is proportional to the pilot tone input level. If that level is high enough, the pilot indicator output is activated and the pilot Cancellation turned on: a 19 kHz signal proportional to the voltage at the pilot detector output is added to the MPX signal with inverse polarity, cancelling the 19 kHz pilot tone. Interference Detector, Noise Detector, Pulse Former The signal from the interference input (MPX or field strength signal) passes a 4-pole high-pass to the noise blanking circuitry. The average noise level is stored on an external capacitor. The interference detector compares the actual noise level with that stored on the capacitor and triggers the pulse former if there is a significant difference. The pulse former generates a gate pulse for the HCC block. During that pulse time the outputs of the deemphasis circuit are switched to hold mode. Semiconductor Group 5 04.96 TDA 4340X 3 3.1 Electrical Characteristics Absolute Maximum Ratings TA = - 40 C to 85 C Symbol Limit Values min. max. 5 0.1 0 13.2 5 V mA mA V V V V V mA mA V V V V V V mA V V C C K/W kV 100 pF, 1500 0 -1 -1 0 0 0 0 0 -1 -1 0 0 0 0 0 0 0 0 0 - 40 - 40 -4 Unit Remarks Parameter PLL loopfilter Oscillator Reference current Supply voltage Noise detector input Noise gate monoflop Noise level capacitor Output amplifier left AF output left AF output right Output amplifier right Deemphasis right Deemphasis left HCC voltage SNC voltage Reference level voltage Pilot indicator output Pilot detector output MPX input Junction temperature Storage temperature Thermal resistance ESD voltage, HBM V1 I2 I4 V5 V6 V7 V8 V9 I10 I11 V12 V13 V14 V15 V16 V17 I18 V19 V20 Tj TS RthSA VESD V5 V5 - 1.5 6 0.3 0.3 6 5 5 13.2 13.2 13.2 2 V5 - 1.5 6 150 125 95 4 Note: Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Semiconductor Group 6 04.96 TDA 4340X 3.2 Operating Range Symbol Limit Values min. max. 13.2 85 V C 7.5 - 40 Unit Parameter Supply voltage Ambient temperature VS TA Note: In the operating range the functions given in the circuit description are fulfilled. 3.3 AC/DC Characteristics Symbol Limit Values min. Supply current Supply current Total harmonic distortion typ. 15 10 0.1 74 32 4 80 40 1.7 8 660 6 2.6 9 3 3.4 1 80 - 50 - 30 100 0 0 50 30 max. 20 15 0.3 mA mA % dB dB Vpp dB Osc. ON Osc. OFF, V7 = 1 V Unit Test Condition VS = 10 V, TA = 25 C Parameter IS IS THD f = 1 kHz 20 Hz ... 16 kHz, Stereo Signal to noise ratio S/N Channel separation MPX input level Overdrive margin of input AF output voltage Overdrive margin of output AF output DC voltage Difference of output voltage levels Muting depth DC offset at MUTE DC offset stereo ON/OFF f = 1 kHz THD = 1 % mVrms f = 1 kHz, Stereo dB V dB dB mV mV THD = 1 % f = 1 kHz Semiconductor Group 7 04.96 TDA 4340X 3.3 AC/DC Characteristics (cont'd) Symbol Limit Values min. typ. max. Unit Test Condition VS = 10 V, TA = 25 C Parameter Carrier and Harmonic Suppression Pilotsignal subcarrier a19 a38 a571) a761) 44 44 50 50 50 50 60 60 dB dB dB dB f = 19 kHz f = 38 kHz f = 57 kHz f = 76 kHz Intermodulation fmod = 10 kHz fmod = 13 kHz a21) a31) 60 60 65 75 dB dB fS = 2 x 10 kHz ... 19 kHz 91 % Mono, 9 % pilot, S = 1 kHz 91 % Mono, 9 % pilot, S = 1 kHz fS = 3 x 13 kHz ... 38 kHz Traffic Radio f = 57 kHz a571) 70 dB fS = 1 kHz 23 Hz 91 % Mono, 9 % pilot, fm = 1 kHz, 5 % Traffic Radio Carrier (f = 57 kHz, fm = 23 Hz AM, m = 60 %) SCA (subsidiary communications authorization) f = 67 kHz a671) 70 dB fS = 9 kHz 81 % Mono, 9 % pilot, fm = 1 kHz, 10 % SCA carrier ACI (adjacent channel interference) f = 119 kHz f = 190 kHz Ripple rejection 1) a1141) a1901) 1) 80 70 60 70 dB dB dB V5 = 10 V, 100 mVrms, f = 1 kHz No subject of production testing. Semiconductor Group 8 04.96 TDA 4340X 3.3 AC/DC Characteristics (cont'd) Symbol Limit Values min. typ. max. Unit Test Condition VS = 10 V, TA = 25 C Parameter Mono/Stereo Control Pilot threshold voltage: - for Stereo ON - for Stereo OFF - hysteresis Stereo indicator output: - Pilot OFF - Pilot ON VPIL on VPIL off 5 1.5 20 14 3 30 mVrms mVrms dB VPIL on/VPIL off V18 off I18 on 0.5 10 V A I18 = 1 mA V18 = 13.2 V External Control Voltages (active low) Threshold voltage for external mono control (pin 19) Threshold voltage for MUTE (pin 8) V19 thr 1 1.2 V V8 thr 1 1 1.5 1.5 V V Threshold voltage V7 thr for VCO OFF (pin 7) Deemphasis Reference voltage Control Range Minimum Maximum deemph = nom deemph = 1.5 x nom deemph = 2.7 x nom min max V17 0.5 4.5 V Reference level 100 Hz 45 135 50 150 55 165 s s V17 = 3 V, V15 = 6 V, Cdeemph = 6.8 nF V17 = 3 V, V15 = 0 V V15 V15 V15 V17 - 220 V17 V17 - 170 V17 - 120 mV mV Cdeemph = 6.8 nF V17 = 3 V, Cdeemph = 6.8 nF V17 = 3 V, Cdeemph = 6.8 nF V17 = 3 V, Cdeemph = 6.8 nF V17 - 400 V17 - 300 V17 - 200 9 Semiconductor Group 04.96 TDA 4340X 3.3 AC/DC Characteristics (cont'd) Symbol Limit Values min. typ. max. Unit Test Condition VS = 10 V, TA = 25 C Parameter Control Range (osc. OFF) Minimum Maximum AM min AM max 13 35 15 40 17 45 s s V17 = 3 V, V15 = 6 V, V7 = 1 V Cdeemph = 6.8 nF V17 = 3 V, V15 = 0 V, V7 = 1 V Cdeemph = 6.8 nF Stereo/Mono Blend Control Channel separation V16 Channel separation V16 Reference voltage Oscillator Max. osc. frequency fosc max Min. osc. frequency fosc min VCO gain Oscillator voltage Oscillator swing PLL PD gain Noise Detector Input resistance Trigger threshold Trigger threshold Maximum noise mean value i/1) 5 7.0 9 A/rad f/V1 0.7 - 2.0 - 13 3 800 1.0 - 1.0 - 10 4 1100 2.0 - 0.7 -7 5 1400 % % kHz/V V mVpp 100% x (fmax/456 kHz - 1) 100% x (fmin/456 kHz - 1) V17 - 140 V17 - 115 V17 - 90 mV mV V 15 dB sep. 6 dB sep. V17 - 190 0.5 V17 - 170 V17 - 150 4.5 V17 V2 DC V2 AC Vpilot = 54 mVrms R6 V6 min V6 dyn V6maxmean 75 80 100 100 10 160 80 135 120 k kHz - 3 dB mVrms V8 = V8 (V6 mean = 0), f6 = 200 kHz mVrms V8 = V8 (V6 mean = 50 mVrms), f6 = 200 kHz mVrms f6 = 200 kHz Input high-pass filter fin, 6 Semiconductor Group 10 04.96 TDA 4340X 3.3 AC/DC Characteristics (cont'd) Symbol Limit Values min. typ. 40 max. s 50 200 nA mVpp 100 kHz single burst repetition rate 100 Hz both polarities Cin, 6 = 1 nF Unit Test Condition VS = 10 V, TA = 25 C Parameter Suppression pulse duration Input offset current Pulse threshold I13, I141) V6 burst1) - 50 0 130 1) No subject of production testing. Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage. Semiconductor Group 11 04.96 TDA 4340X Figure 3 Test Circuit Semiconductor Group 12 04.96 TDA 4340X Figure 4 Application Circuit Semiconductor Group 13 04.96 TDA 4340X Diagrams Figure 5 Definition of Phase Detector Gain Figure 6 Phase Detector Gain Semiconductor Group 14 04.96 TDA 4340X 4 Package Outlines P-DSO-20-1 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 15 Dimensions in mm 04.96 GPS05094 |
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