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DG3535/DG3536
New Product
Vishay Siliconix
0.25-W Low-Voltage Dual SPDT Analog Switch
FEATURES
D D D D D Low Voltage Operation Low On-Resistance - rON: 0.25 W @ 2.7 V -69 dB OIRR @ 2.7 V, 100 kHz MICRO FOOTr Package ESD Protection >2000 V
BENEFITS
D D D D D Reduced Power Consumption High Accuracy Reduce Board Space 1.6-V Logic Compatible High Bandwidth
APPLICATIONS
D D D D D D Cellular Phones Speaker Headset Switching Audio and Video Signal Routing PCMCIA Cards Battery Operated Systems Relay Replacement
DESCRIPTION
The DG3535/DG3536 is a sub 1-W (0.25 W @ 2.7 V ) dual SPDT analog switches designed for low voltage applications. The DG3535/DG3536 has on-resistance matching (less than 0.05 W @ 2.7 V) and flatness (less than 0.2 W @ 2.7 V) that are guaranteed over the entire voltage range. Additionally, low logic thresholds makes the DG3535/DG3536 an ideal interface to low voltage DSP control signals. The DG3535/DG3536 has fast switching speed with break-before-make guaranteed. In the On condition, all switching elements conduct equally in both directions. Off-isolation and crosstalk is -69 dB @ 100 kHz. The DG3535/DG3536 is built on Vishay Siliconix's high-density low voltage CMOS process. An eptiaxial layer is built in to prevent latchup. The DG3535/DG3536 contains the additional benefit of 2,000-V ESD protection.
As a committed partner to the community and the environment, Vishay Siliconix manufactures this product with the lead (Pb)-free device terminations. For MICRO FOOT analog switching products manufactured with tin/silver/copper (SnAgCu) device terminations, the lead (Pb)-free "--E1" suffix is being used as a designator.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
MICRO FOOT 10-Bump V+ A IN1 NO1 NC1 NO2 NC2 IN2 GND COM1 COM2 B
DG3535/DG3536
1 NC2
2 IN2
3 COM2
4 NO2
GND
DG3535
Top View IN1 COM1
V+
TRUTH TABLE Logic
0 1
C
NC1
NO1
NC1 and NC2
ON OFF
NO1 and NO2
OFF ON
1 NO2
2 IN2
3 COM2
4 NC2
ORDERING INFORMATION Temp Range
-40 to 85C
Device Marking A1 Locator
A B
Package
MICRO FOOT: 10-Bump (4x3, 0.5-mm Pitch, 238-mm Bump Height)
Part Number
DG3535DB-T5--E1 DG3535DB-T1--E1 DG3536DB-T5--E1
GND
DG3536
Top View
V+
XXX 3535
3535 = Example Base Part Number xxx = Data/Lot Traceabiliity Code
C
NO1
IN1
COM1
NC1
Document Number: 72961 S-50130--Rev. D, 24-Jan-05
www.vishay.com
1
DG3535/DG3536
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Reference to GND V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6 V IN, COM, NC, NOa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V+ + 0.3 V) Continuous Current (NO, NC, COM) . . . . . . . . . . . . . . . . . . . . . . . "300 mA Peak Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . "500 mA (Pulsed at 1 ms, 10% duty cycle) Storage Temperature (D Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150C Package Solder Reflow Conditionsb IR/Convection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250C ESD per Method 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2 kV Power Dissipation (Packages)c MICRO FOOT: 10-Bump (4x3 mm)d . . . . . . . . . . . . . . . . . . . . . . . . . 457 mW Notes: a. Signals on NC, NO, or COM or IN exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. Refer to IPC/JEDEC (J-STD-020B). c. All bumps welded or soldered to PC Board. d. Derate 5.7 mW/_C above 70_C
New Product
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
SPECIFICATIONS (V+ = 3 V)
Test Conditions Otherwise Unless Specified Parameter Analog Switch
Analog Signal Ranged On-Resistanced rON Flatnessd On-Resistance Match Between Channelsd VNO, VNC, VCOM rON rON Flatness DrDS(on) INO(off), INC(off) ICOM(off) Channel-On Leakage Current ICOM(on) V+ = 3.3 V, VNO, VNC = 0.3 V/3 V VCOM = 3 V/0.3 V V+ = 3.3 V, VNO, VNC = VCOM = 0.3 V/3 V V+ 2 7 V V = 2.7 V, VCOM = 0 6/1 5 V 0.6/1.5 INO, INC = 100 mA Full Room Full Room Room Room Full Room Full Room Full -2 -20 -2 -20 -2 -20 0 0.25 V+ 0.4 0.5 0.15 0.05 2 20 2 20 2 20 nA W V
Limits
-40 to 85_C
Symbol
V+ = 3 V, "10%, VIN = 0.5 or 1.4 Ve
Tempa
Minb
Typc
Maxb
Unit
Switch Off Leakage Current
Digital Control
Input High Voltaged Input Low Voltage Input Capacitance Input Current
VINH
Full Full Full VIN = 0 or V+ Full
1.4 0.5 10 1 1
VINL
Cin
V pF mA
IINL or IINH
Dynamic Characteristics
Turn-On Time Turn-Off Time Break-Before-Make Time Charge Injectiond Off-Isolationd Crosstalkd NO, NC Off Capacitanced Channel-On Channel On Capacitanced tON VNO or VNC = 2.0 V, RL = 50 W, CL = 35 pF 20V W tOFF td QINJ OIRR XTALK CNO(off) CNC(off) CNO(on) CNC(on) VIN = 0 or V+ f = 1 MHz V+, VNO or VNC = 2.0 V, RL = 50 W, CL = 35 pF CL = 1 nF, VGEN = 1.5 V, RGEN = 0 W RL = 50 W CL = 5 pF f = 100 KHz W, pF, Room Full Room Full Full Room Room Room Room Room Room Room 1 52 43 6 21 -69 -69 145 145 406 406 pF pC dB 82 90 73 78 ns
Power Supply
Power Supply Current I+ VIN = 0 or V+ Room Full 0.001 1.0 1.0 mA
Notes: a. Room = 25C, Full = as determined by the operating suffix. b. Typical values are for design aid only, not guaranteed nor subject to production testing. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Guarantee by design, nor subjected to production test. e. VIN = input voltage to perform proper function. www.vishay.com Document Number: 72961 S-50130--Rev. D, 24-Jan-05
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DG3535/DG3536
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
rON vs. VCOM and Supply Voltage
0.7 0.6 r ON - On-Resistance ( W ) 0.5 0.4 0.3 0.2 0.1 0.0 0.0 V+ = 3.3 V V+ = 1.8 V V+ = 2.0 V V+ = 2.7 V V+ = 3.0 V T = 25_C IS = 100 mA r ON - On-Resistance ( W ) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 85_C 25_C -40_C V+ = 3.0 V IS = 100 mA
Vishay Siliconix
rON vs. Analog Voltage and Temperature (NC1)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.5
1.0
1.5
2.0
2.5
3.0
VCOM - Analog Voltage (V)
VCOM - Analog Voltage (V)
Supply Current vs. Temperature
100000 V+ = 3.0 V VIN = 0 V I+ - Supply Current (A) 100 mA 10 mA 1 mA 100 mA 10 mA 1 mA 100 nA 10 nA 10 -60 1 nA -40 -20 0 20 40 60 80 100
Supply Current vs. Input Switching Frequency
V+ = 3 V
10000 I+ - Supply Current (nA)
1000
100
10
100
1K
10 K
100 K
1M
10 M
Temperature (_C)
Input Switching Frequency (Hz)
Leakage Current vs. Temperature
10000 V+ = 3.0 V 1000 Leakage Current (pA) ICOM(on) ICOM(off) Leakage Current (pA) 300 250 200 150 100 50 0 -50 -100 -150 -200 -250 1 -60 -40 -20 0 20 40 60 80 100 -300 0.0 0.5
Leakage vs. Analog Voltage
V+ = 3.0 V ICOM(on) INO(off), INC(off)
100
10
INO(off), INC(off)
ICOM(off)
1.0
1.5
2.0
2.5
3.0
Temperature (_C)
VCOM - Analog Voltage (V)
Document Number: 72961 S-50130--Rev. D, 24-Jan-05
www.vishay.com
3
DG3535/DG3536
Vishay Siliconix
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
100 90 t ON / t OFF - Switching Time (ns) 80 70 60 50 40 30 20 10 0 -60 -90 -40 -20 0 20 40 60 80 100 100 K 1M 10 M Frequency (Hz) 100 M 1G Temperature (_C) tOFF V+ = 2 V tON V+ = 3 V tOFF V+ = 3 V
Switching Time vs. Temperature
10 tON V+ = 2 V Loss, OIRR, X TALK (dB)
Insertion Loss, Off-Isolation Crosstalk vs. Frequency
-10
Loss
-30
XTALK
OIRR
-50 V+ = 3.0 V RL = 50 W -70
Switching Threshold vs. Supply Voltage
2.00 1.75 Q - Charge Injection (pC) 1.50 1.25 1.00 0.75 0.50 0.25 0.00 0 1 2 3 4 5 6 V+ - Supply Voltage (V) 300 250 200 150 100 50 0 -50 -100 -150 -200 -250 -300 0.0
Charge Injection vs. Analog Voltage
- Switching Threshold (V)
V+ = 2.0 V V+ = 3.0 V
VT
0.5
1.0
1.5
2.0
2.5
3.0
VCOM - Analog Voltage (V)
TEST CIRCUITS
V+ Logic Input V+ Switch Input NO or NC IN Logic Input GND 0V CL (includes fixture and stray capacitance) VOUT + VCOM R L ) R ON RL RL 300 W CL 35 pF COM Switch Output VOUT Switch Output 0V tON tOFF VINH 50% VINL 0.9 x VOUT tr t 5 ns tf t 5 ns
Logic "1" = Switch On Logic input waveforms inverted for switches that have the opposite logic sense.
FIGURE 1. Switching Time
www.vishay.com Document Number: 72961 S-50130--Rev. D, 24-Jan-05
4
DG3535/DG3536
New Product
TEST CIRCUITS
V+ Logic Input COM VO RL 300 W GND CL 35 pF VINH VINL tr t 5 ns tf t 5 ns
Vishay Siliconix
V+ VNO VNC NO NC IN
VNC = VNO VO Switch 0V Output
90%
tD
tD
CL (includes fixture and stray capacitance)
FIGURE 2. Break-Before-Make Interval
V+ VOUT Rgen + VIN = 0 - V+ V+ NC or NO IN GND COM VOUT CL = 1 nF IN On Off Q = DVOUT x CL IN depends on switch configuration: input polarity determined by sense of switch. On DVOUT
FIGURE 3. Charge Injection
V+ 10 nF V+ NC or NO IN COM COM 0V, 2.4 V IN NC or NO GND 10 nF V+ COM Meter 0 V, 2.4 V GND HP4192A Impedance Analyzer or Equivalent f = 1 MHz
V+
RL Analyzer
VCOM Off Isolation + 20 log V NO NC
FIGURE 4. Off-Isolation
FIGURE 5. Channel Off/On Capacitance
Document Number: 72961 S-50130--Rev. D, 24-Jan-05
www.vishay.com
5
DG3535/DG3536
Vishay Siliconix
PACKAGE OUTLINE MICRO FOOT: 10-BUMP (4 X 3, 0.5-mm PITCH, 0.238-mm BUMP HEIGHT)
New Product
10 O 0.150 X 0.229 Note 2 Solder Mask O X Pad Diameter +0.1 Silicon 0.5 A A1 0.5 Recommended Land Pattern 4 b Diameter A Index-Bump A1 Note 3 e B e E 3 2 1 A2
Bump Note 1
XXX 3535
Top Side (Die Back)
S S e e D e
C
NOTES (Unless Otherwise Specified): 1. Bump is Lead Free Sn/Ag/Cu. 2. 3. Non-solder mask defined copper landing pad. Laser Mark on silicon die back; back-lapped, no coating. Shown is not actual marking; sample only.
MILLIMETERS* Dim A A1 A2 b D E e S
0.230
INCHES Min
0.0271 0.0086 0.0185 0.0120 0.0780 0.0583
Min
0.688 0.218 0.470 0.306 1.980 1.480 0.5 BASIC
Max
0.753 0.258 0.495 0.346 2.020 1.520
Max
0.0296 0.0102 0.0195 0.0136 0.0795 0.0598
0.0197 BASIC 0.270 0.0091 0.0106
* Use millimeters as the primary measurement. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?72961. www.vishay.com Document Number: 72961 S-50130--Rev. D, 24-Jan-05
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