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SSX35
Trusted platform module (TPM)
Datasheet April 2005 Revision 1.6
SSX35 Trusted platform module (TPM)
Contents
1. General Description ............................................................... 4 2. Product Parameters............................................................... 4 3. Main Functions....................................................................... 5 4. Pin And Signal Overview ....................................................... 6 5. Absolute Maximum Ratings .................................................. 8 6. Typical Application .............................................................. 11 7. Package Drawing ................................................................. 12 8. Chip Mark ............................................................................. 14
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SSX35 Trusted platform module (TPM)
Revision History
Revision Rev1.6 Date April 2005 Description 4.7K resistor is provided on PP pin by liud
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SSX35 Trusted platform module (TPM)
1. General Description
1(c) Fully compatible with TCG v1.2 Specification.1. 2(c) SINOSUN 8-bits CPU Core. 3(c) Embedded 16KB secure data FLASH memory and 16KB RAM. 4(c) 128KB program FLASH memory supporting online update of Firmware. 5(c) RSA engine supports up to 2048 bits RSA algorithm. 6(c) Embedded SHA-1 algorithm engine. 7(c) Integrated RNG for key generation and encryption transmission. 8(c) LPC interface and serial interface in conformance to ISO 7816 Standard.
Figure 1-1 SSX35ACB structure
2. Product Parameters
1(c) Supply Voltage: 2(c)Frequency: 3(c)Program Space: 4(c)Data Space: 3.3V 10% 33MHz 128KB FLASH memory and 64KB ROM 16KB FLASH memory and 16KB RAM
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SSX35 Trusted platform module (TPM)
5(c)Work Current: 6(c)Idle Current:
< 30mA < 0.1mA RSA 2048 bits Signature (Decryption): <300ms RSA 2048 bits Verification (Encryption): <40ms RSA 1024 bits Signature (Decryption): <120ms RSA 1024 bits Verification (Encryption): <15ms SHA-1(1M bits) Computing Speed: <258ms 2048 bits RSA Key pair generation: <10 Seconds
7(c)Speed:
8(c)Package:
TSSOP28
3. Main Functions
1(c) Measure, store and report on the integrity of platform Using SHA-1 Hash function, SSX35 can measure, store and report the platform integrity. 2(c) Identity Verification Use AIK generated inside the chip to complete digital signature of the data 3(c) Encrypt and store the sensitive data SSX35 stores the sensitive data in the shielded area of the chip, or it can encrypt the data with storage key and store them in the generic memory on the platform. 4(c) Authorized access to internal info: Access to resources (include keys, sensitive data encrypted) managed by SSX35 must be authorized by SSX35. 5(c) Encrypted transmission of commands and data While the SSX35 exchanges commands and data with external entity, it not only verifies the User's ID, but also prevents the key data of ID verification from being stolen, replayed or attacked
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SSX35 Trusted platform module (TPM)
through the communication line. 6(c) Provide secure administration mechanism for trusted platform SSX35 can protect the platform from illegal remote access through physical presence.
4. Pin And Signal Overview
Pinout description as figure4-1and table 4-1
GPIO GPIO DC GND 3VSB GPIO6 PP TestI TestBI/GPIO 3V GND VBAT DC DC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 LPCPD# SERIRQ LAD0 GND 3V LAD1 LFRAME# LCLK LAD2 3V GND LAD3 LRESET# CLKRUN#/GPIO
Figure 4-1 SSX35ACB pinout description
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SSX35 Trusted platform module (TPM)
Table 4-1
Signal LAD[3:0] LPCPD# LCLK Pin(s) 26, 23, 20, 17 28 21 Type BI I I Description Multiplexed Command, Address and Data BUS (see LPC Interface Spec) power down 33MHz clock (see LPC Interface Spec). Frame indicates start of a new LPC cycle, termination of broken cycle (see LPC Interface Spec) System reset signal (see LPC Interface Spec) Serialized IRQ is used to handle interrupt support (see LPC Interface Spec) Same as PCI CLKRUN#. Active Low. internal pull-down GPIO will default to low. PP DC GPIO GPIO GPIO6 7 3,13,14 1 2 6 I,BI I BI BI BI Physical Presence, active high, internal pull-down. Used to indicate Physical Presence to the TPM. Do not connect Defaults high. (weak internal pull-up) Defaults high (weak internal pull-up) GPIO Defaults pull-up) high (weak internal
LFRAME#
22
I
LRESET# SERIRQ
16 27
I BI
CLKRUN#/GPIO
15
BI
TESTI
8
I
This pin will be pulled low on motherboard. Assuming: Pull high to enable Test mode. Pull low to disable Test mode and enable GPIO on pin 9(TESTBI) TESTBI: Test port. If TESTI is pulled low acts as a GPIO. GPIO will default high(weak internal pull-up) This is a 3.3 volt DC power.
TESTBI/GPIO
9
BI
Power 3V 10, 19 24 I The maximum power for this interface is 250 ma.
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SSX35 Trusted platform module (TPM)
GND VBAT 3VSB
4, 11, 18, 25 12 5
I I I
Zero volts. 3.3V battery input. 3.3 volt standby DC power rail.
5. Absolute Maximum Ratings
Operating Temperature........................................0C to +70C Storage Temperature (without Bias)..................-20C to +85C Voltage on I/O Pins.......................................-0.1 to VCC +0.3V Voltage on VCC with Respect to Ground...........................6.0V Maximum ESD Voltage...................................................2000V
*NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification may cause temporary or permanent failure. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 5-1. DC Parameters VCC = 3.0 to 3.6V; Temperature = 0 to 70C
Symbol VCC ICC IST ISL ILIO VIH VIL VOH VOL IOLCR CI Parameter Supply Voltage Operating Current at fclk = 33 MHz Static Current Static Standby current, reset active Input Leakage Input High voltage Input Low voltage Output High Voltage Output Low Voltage Output Low Current Input Pin Capacitance
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Min 3.0
Nom 3.3 25 5 40 0.1
Max 3.6 50 10 100 3 3.6 0.8
Units V mA mA A A V V V
1.5 -0.5 0.9 VCC * 0.98 VCC *
0.1 VCC 7 6
*
V mA pF
SSX35 Trusted platform module (TPM)
Note: These parameters guaranteed but not tested.
Table 5-2. AC Parameters Cl = 10pf. VCC = 3.0 to 3.6V; Temperature = 0 to 70C
Symbol TVAL TON TOFF Parameter CLK to Signal Valid Delay - LAD0-3 Float to Active Delay Active to Float Delay Min 2 2 Nom 5 4 28 Max 10 Units ns ns ns
Figure 5-1 AC parameters
Table 5-3 LPC bus signal delay to PCICLK
Symbol TSU TH Parameter Input Setup Time to CLK Input Hold Time from CLK Min 7 0 Nom Max Units ns ns
Figure 5-2 AC parameters
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SSX35 Trusted platform module (TPM)
Table 5-4 reset signal character
Symbol TRST TRST-CLK TRST-OFF Parameter Reset Active Time after Power Stable Reset Active after CLK Stable Reset Active to Output Float Delay Min 1 100 40 Nom Max Units ms ms ns Notes Note 2 Note 2 Note 2
Table 5-5 clock signal character
Symbol TCYC TLOW THIGH Parameter CLK Period CLK Low Duration CLK High Duration Min 29.5 13.4 13.4 Nom 30 Max 31 18 18 Units ns ns ns Notes Note 3 Note 1, Note 3 Note 1, Note 3
Figure 5-3 clock signal character
Note: 1(c) All parameters measured with respect to signal crossing Vtest = 0.4 * VCC unless otherwise noted. 2(c) These parameters guaranteed but not tested. 3(c) The minimum parameter must never be violated under any circumstances unless Ireset# is asserted.
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SSX35 Trusted platform module (TPM)
6. Typical Application
Figure 6-1 28pins typical application
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SSX35 Trusted platform module (TPM)
Figure 6-2 20pins connector typical application
Note: 1. 33MHz LCLK and LRESET# signals should have 20mil spacing. 2. LAD[3:0] should have 5 mil between each other.10 mil for all other signals. 3. For DC pins, do not connect any signal on these pins. 4. GPIO_ON : the GPIO signal on board , For the BIOS detect PP status from it.
7. Package Drawing
TSSOP28 figure 7-1(c)
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SSX35 Trusted platform module (TPM)
Figure 7-1 package drawing
Notes: 1(c) This drawing is for general information only. Please refer to JEDEC Drawing MO-153, Variation DB for additional information. 2(c) Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15 mm (0.006 in) per side. 3(c) Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in) per side. 4(c) Dimension b does not include Dambar protrusion. Allowable
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SSX35 Trusted platform module (TPM)
Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5(c) Dimension D and E1 to be determined at Datum Plane H.
8. Chip Mark
SSX35ACB SC000001 TPM 0513
Figure 8-1 SSX35ACB chip mark
SSX35ACB is our chip name and TPM0513 is our chip's S/N number:
1 SSX35 is fully compatible with the commercial encryption lows and regulations in China and TCG standard.
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