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Data Sheet No. PD60195-A IR2010 (S) Features * * * * * * * HIGH AND LOW SIDE DRIVER Product Summary VOFFSET IO+/VOUT ton/off Delay Matching 200V max. 3.0A / 3.0A typ. 10 - 20V 95 & 65 ns typ. 15 ns max. * Floating channel designed for bootstrap operation Fully operational to 200V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V logic compatible Separate logic supply range from 3.3V to 20V Logic and power ground 5V offset CMOS Schmitt-triggered inputs with pull-down Shut down input turns off both channels Matched propagation delay for both channels Outputs in phase with inputs Applications * Audio Class D amplifiers * High power DC-DC SMPS converters * Other high frequency applications Packages Description The IR2010 is a high power, high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels, ideal for Audio Class D and DC-DC converter applications. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.0V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 200 volts. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. 14-Lead PDIP Typical Connection 16-Lead SOIC 200V HO V DD HIN SD LIN VSS VCC VDD HIN SD LIN VSS V CC COM LO VB VS TO LOAD (Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR2010 (S) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL Definition High side floating supply voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Allowable offset supply voltage transient (figure 2) Package power dissipation @ TA +25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (14 lead DIP) (16 lead SOIC) (14 lead DIP) (16 lead SOIC) Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 VCC - 25 VSS - 0.3 -- -- -- -- -- -- -55 -- Max. 225 VB + 0.3 VB + 0.3 25 VCC + 0.3 VSS + 25 VCC + 0.3 VDD + 0.3 50 1.6 1.25 75 100 150 150 300 Units V V/ns W C/W C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in figures 24 and 25. Symbol VB VS VHO VCC VLO VDD VSS VIN TA Definition High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side fixed supply voltage Low side output voltage Logic supply voltage Logic supply offset voltage Logic input voltage (HIN, LIN & SD) Ambient temperature Min. VS + 10 Note 1 VS 10 0 VSS + 3 -5 (Note 2) VSS -40 Max. VS + 20 200 VB 20 VCC VSS + 20 5 VDD 125 Units V C Note 1: Logic operational for VS of -4 to +200V. Logic state held for VS of -4V to -VBS. Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD. (Please refer to the Design Tip DT97-3 for more details). 2 www.irf.com IR2010 (S) Dynamic Electrical Characteristics VBIAS (VCC , VBS , VDD) = 15V, CL = 1000 pF, TA = 25C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol ton toff tsd tr tf MT Definition Turn-on propagation delay Turn-off propagation delay Shutdown propagation delay Turn-on rise time Turn-off fall time Delay matching, HS & LS turn-on/off Figure Min. Typ. Max. Units Test Conditions 7 8 9 10 11 5 50 30 35 -- -- -- 95 65 70 10 15 -- 135 105 105 20 25 15 VS = 0V VS = 200V VS = 200V ns Static Electrical Characteristics VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO- Definition Logic "1" input voltage Logic "0" input voltage Logic "1" input voltage Logic "0" input voltage High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Quiescent VDD supply current Logic "1" input bias current Logic "0" input bias current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current Output low short circuit pulsed current Figure Min. Typ. Max. Units Test Conditions 12 13 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 9.5 -- 2 -- -- -- -- -- -- -- -- -- 7.5 7.0 7.5 7.0 2.5 2.5 -- -- -- -- -- -- -- 70 100 1 20 -- 8.6 8.2 8.6 8.2 3.0 3.0 -- 6.0 -- 1 1.0 0.1 50 210 230 5 40 1.0 9.7 9.4 9.7 9.4 -- -- A VO = 0V, VIN = VDD PW 10 s VO = 15V, VIN = 0V PW 10 s V A V VDD = 15V VDD = 3.3V IO = 0A IO = 0A VB=VS = 200V VIN = 0V or VDD VIN = 0V or VDD VIN = 0V or VDD VIN = VDD VIN = 0V www.irf.com 3 IR2010 (S) Functional Block Diagram VB VDD UV DETECT LEVEL SHIFT CIRCUIT UV Q S R VS HO HIN VSS /COM LEVEL SHIFT SD UV DETECT VCC LIN VSS /COM LEVEL SHIFT LO DELAY VSS COM Lead Definitions Symbol Description VDD HIN SD LIN VSS VB HO VS VCC LO COM Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IR2010 Part Number 4 IR2010S www.irf.com IR2010 (S) HV =10 to 200V HIN LIN SD <50 V/ns HO LO Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit HIN LIN (0 to 200V) 50% 50% ton tr 90% toff 90% tf HO LO 10% 10% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition HIN LIN 50% 50% 50% SD tsd LO HO 10% HO LO 90% MT 90% MT LO Figure 5. Shutdown Waveform Definitions HO Figure 6. Delay Matching Waveform Definitions www.irf.com 5 IR2010 (S) 250 180 max 200 160 140 Turn-on Time (nS) 120 100 80 60 40 20 max Tu r n -o n Tim e (n S) 150 typ 100 typ 50 0 -50 -25 0 25 50 75 100 125 Te m p e ra tu re (C) 0 10 12 14 16 18 20 Vcc/Vbs Supply Voltage (V) Figure 7A. Turn-on Time vs. Temperature 300 250 Turn-off Time (nS) 250 Figure 7B. Turn-on Time vs. Vcc/Vbs Voltage 200 Turn-on T ime (nS) 200 max 150 max 150 100 100 typ 50 0 0 2 4 6 8 10 12 14 16 18 20 Vdd Supply Voltage (V) typ 50 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 7C. Turn-on Time vs Vdd Voltage 180 160 140 Turn-off Time (nS) 120 100 80 60 40 50 20 0 10 12 14 16 18 20 Vcc/Vbs Supply Voltage (V) 0 0 Turn-off Time (nS) 250 200 150 300 Figure 8A. Turn-off Time vs. Temperature max max 100 typ typ 2 4 6 8 10 12 14 16 18 20 Vdd Supply Voltage (V) Figure 8B. Turn-off Time vs. Vcc/Vbs Voltage Figure 8C. Turn-off Time vs. Vdd Voltage 6 www.irf.com IR2010 (S) 250 180 160 200 Shutdown Time (nS) 140 max 150 Shutdown Time (nS) 120 max 100 80 60 100 typ 50 typ 40 20 0 -50 -25 0 25 50 75 100 125 Temperature (C) 0 10 12 14 16 18 20 Vcc/Vbs Supply Voltage (V) Figure 9A. Shutdown Time vs. Temperature 300 250 Turn-on Rise Time (nS) Shutdown Time (nS) 30 200 150 40 Figure 9B. Shutdown Time vs. Vcc/Vbs Voltage max 20 max 100 50 0 0 2 4 6 8 10 12 14 16 18 20 Vdd Supply Voltage (V) 10 typ typ 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 9C. Shutdown Time vs Vdd Voltage 40 40 Figure 10A. Turn-on Rise Time vs. Temperature max Turn-on Rise Time (nS) Turn-off Fall Time (nS) 30 30 max 20 20 typ 10 10 typ 0 10 12 14 16 18 20 Vbias Supply Voltage (V) 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 10B. Turn-on Rise Time vs. Vbias Voltage Figure 11A. Turn-off Fall Time vs. Temperature www.irf.com 7 IR2010 (S) 40 14 Logic '1' Input Threshold (V) 12 Turn-off Fall Time (nS) 30 max 20 Typ. 10 max 10 8 6 4 2 0 10 12 14 16 18 20 Vbias Supply Voltage (V) 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 11B. Turn-Off Fall Time vs. Vbias Voltage Figure 12A. Logic "1" Input Threshold vs. Temperature 10 14 Logic '1' Input Threshold (V) 12 Logic '0' Input Threshold (V) 8 max 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 Vdd Logic Supply Voltage (V) min 6 4 2 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 12B. Logic "1" Input Threshold vs. Vdd 14 Logic '0' Input Threshold (V) 12 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 Vdd Logic Supply Voltage (V) Figure 13A. Logic "0" Input Threshold vs. Temperature 10 8 High Level Output (V) 6 min 4 max 2 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 13B. Logic "0" Input Threshold vs. Vdd Figure 14A. High Level Output vs. Temperature 8 www.irf.com IR2010 (S) 10 1.0 8 High Level Output (V) Low Level Output (V) 0.8 6 0.6 4 0.4 max 2 0.2 max 0 10 12 14 16 18 20 Vbias Supply Voltage (V) 0.0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 14B. High Level Output vs. Voltage 1.0 Figure 15A. Low Level Output vs. Temperature 1000 900 Offset Supply Current (uA 0.8 Low Level Output (V) 800 700 600 500 400 300 200 100 0.6 max 0.4 max 0.2 0.0 10 12 14 16 18 20 Vbias Supply Voltage (V) 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 15B. Low Level Output vs. Voltage 100.0 Figure 16A. Offset Supply Current vs. Temperature 500 450 O ffse t Supply Curre nt (uA Vbs Supply Curre nt (uA 80.0 400 350 300 250 200 150 100 50 max 60.0 m ax 40.0 20.0 typ 0.0 0 20 40 60 80 100 120 140 160 180 200 O ffse t Supply Voltage (V) 0 -50 -25 0 25 50 75 100 125 T e mperature (C) Figure 16B. Offset Supply Current vs. Voltage Figure 17A. Vbs Supply Current vs. Temperature www.irf.com 9 IR2010 (S) 500 450 Vbs Supply Current (uA) 400 350 300 250 200 150 100 50 0 10 12 14 16 18 20 Vbs Floating Supply Voltage (V) Vcc Supply Current (uA) 500 450 400 350 300 250 200 150 100 max max typ 50 0 -50 -25 0 25 50 75 typ 100 125 Temperature (C) Figure 17B. Vbs Supply Current vs. Voltage 500 450 Vcc Supply Current (uA) Figure 18A. Vcc Supply Current vs. Temperature 20 18 Vdd Supply Current (uA) 16 14 12 10 8 6 4 400 350 300 250 200 150 100 50 0 10 12 14 16 18 20 Vcc Voltage (V) m ax max typ 2 0 -50 -25 0 25 50 typ 75 100 125 Temperature (C) Figure 18B. Vcc Supply Current vs. Voltage 20 18 Vdd Supply Curre nt (uA 16 14 12 10 8 6 4 2 0 4 6 8 10 12 14 16 18 20 Vdd Voltage (V) Figure 19A. Vdd Supply Current vs. Temperature 100 Logic '1' Input Current (uA) 80 max 60 m ax 40 typ typ 20 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 19B. Vdd Supply Current vs. Voltage Figure 20A. Logic "1" Input Current vs. Temperature 10 www.irf.com IR2010 (S) 100 5.0 Login '1' Input Current (uA ) Logic '0' Input Current (uA 80 4.0 60 3.0 m ax 40 2.0 typ 20 m ax 1.0 0 4 6 8 10 12 14 16 18 20 Vdd Voltage (V) 0.0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 20B. Logic "1" Input Current vs. Voltage 5 .0 Figure 21A. Logic "0" Input Current vs. Temperature 11.0 Log in '0' In pu t Cu r re nt ( uA) 4 .0 10.0 VBS Undervoltage Lockout + (V) Max. 3 .0 9.0 Typ. 2 .0 8.0 Min. m ax 1 .0 7.0 0 .0 4 6 8 10 12 14 16 18 20 Vdd Voltage (V) 6.0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 21B. Logic "0" Input Current vs. Voltage 11.0 Figure 22. VBS Undervoltage (+) vs. Temperature 11.0 10.0 VCC Undervoltage Lockout + (V) VBS Undervoltage Lockout - (V) Max. 10.0 Max. 9.0 9.0 Typ. Typ. 8.0 8.0 Min. 7.0 Min. 7.0 6.0 -50 -25 0 25 50 75 100 125 Temperature (C) 6.0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 23. VBS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (+) vs. Temperature www.irf.com 11 IR2010 (S) 11.0 O utput S ource Curre nt (uA A) 5.0 4.5 10.0 VCC Undervoltage Lockout - (V) Max. 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 9.0 typ 8.0 Typ. m in 7.0 Min. 6.0 -50 -25 0 25 50 75 100 125 Temperature (C) 0.0 -5 0 -2 5 0 25 50 75 10 0 12 5 T e mpe rature (C ) Figure 25. VCC Undervoltage (-) vs. Temperature 5 .0 4 .5 Outp ut Source Curr e nt (uA) 4 .0 3 .5 3 .0 2 .5 2 .0 1 .5 1 .0 0 .5 0 .0 10 12 14 16 18 20 Vb ias Supply Voltag e (V) Figure 26A. Output Source Current vs. Temperature 5.0 4.5 A) O utput S ink C urre n t (uA typ 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -5 0 -2 5 0 25 50 75 10 0 12 5 T e mpe rature (C ) m in typ m in Figure 26B. Output Source Current vs. Voltage 5.0 4.5 Figure 27A. Output Sink Current vs. Temperature 140 ) O utput Sink Curre nt (uA 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 10 12 14 16 18 typ Junction Temperature (C) 120 100 80 60 40 20 0 20 1.E+03 200V 100V 10V m in Vbias Supply Voltage (V) 1.E+04 1.E+05 Frequency (Hz) 1.E+06 Figure 27B. Output Sink Current vs. Voltage Figure 28. IR2010 Tj vs Frequency RGATE = 10 Ohm, Vcc = 15V with IRFBC40 12 www.irf.com IR2010 (S) 140 120 Junction Te m pe ra ture (C) 100 80 60 40 20 0 1.E+03 1.E+04 Fre quency (Hz ) 200V 100V 10V 1.E+05 1.E+06 Figure 29. IR2010 Tj vs Frequency RGATE = 33 Ohm, Vcc = 15V with IRFBC20 Case Outlines 14 Lead PDIP 01-6010 01-3002 03 (MS-001AC) www.irf.com 13 IR2010 (S) 16 Lead SOIC (wide body) 01 6015 01-3014 03 (MS-013AA) IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice. 1/30/2002 14 www.irf.com |
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