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PD- 94227A
SMPS MOSFET
IRFPS35N50L
HEXFET(R) Power MOSFET
Applications * Zero Voltage Switching SMPS VDSS RDS(on) typ. * Telecom and Server Power Supplies 0.125 500V * Uninterruptible Power Supplies * Motor Control applications Features and Benefits * SuperFast body diode eliminates the need for external diodes in ZVS applications. * Lower Gate charge results in simpler drive requirements. * Enhanced dv/dt capabilities offer improved ruggedness. * Higher Gate voltage threshold offers improved noise immunity.
Trr typ. ID
170ns 34A
Super-247TM
Absolute Maximum Ratings
Parameter
ID @ TC = 25C Continuous Drain Current, VGS @ 10V ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current PD @TC = 25C Power Dissipation VGS dv/dt TJ TSTG
Max.
34 22 140 450 3.6 30 15 -55 to + 150 300 (1.6mm from case ) 1.1(10)
Units
A W W/C V V/ns C N*m (lbf*in)
Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and
e
Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw
Diode Characteristics
Symbol
IS ISM VSD trr Qrr IRRM ton
Parameter
Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ac Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- --- --- --- 170 220 670 8.5 34 A 140 1.5 250 330 1010 --- V ns
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 34A, VGS = 0V TJ = 25C, IF = 34A TJ = 125C, di/dt = 100A/s
f
1500 2200
nC TJ = 25C, IS = 34A, VGS = 0V TJ = 125C, di/dt = 100A/s A TJ = 25C
f f f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
8/26/04
IRFPS35N50L
Static @ TJ = 25C (unless otherwise specified)
Symbol
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS RG
Parameter
Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance
Min. Typ. Max. Units
500 --- --- 3.0 --- --- --- --- --- --- 0.12 --- --- --- --- --- 1.1 --- --- 5.0 50 2.0 100 -100 --- V V A mA nA
Conditions
VGS = 0V, I D = 250A VGS = 10V, ID = 20A
V/C Reference to 25C, ID = 1mA
0.125 0.145
f
VDS = VGS, ID = 250A VDS = 500V, V GS = 0V VDS = 400V, V GS = 0V, TJ = 125C VGS = 30V VGS = -30V f = 1MHz, open drain
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Coss eff. (ER)
Parameter
Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related)
Min. Typ. Max. Units
18 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 24 100 42 42 5580 590 58 7290 160 320 220 --- 230 65 110 --- --- --- --- --- --- --- --- --- --- --- pF ns nC S ID = 34A
Conditions
VDS = 50V, I D = 20A VDS = 400V VGS = 10V, See Fig. 7 & 15 VDD = 250V ID = 34A RG = 1.2 VGS = 10V, See Fig. 10a & 10b VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, V DS = 1.0V, = 1.0MHz VGS = 0V, V DS = 400V, = 1.0MHz VGS = 0V,VDS = 0V to 400V
f f
g
Avalanche Characteristics
Symbol
EAS IAR EAR Parameter Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy Typ. --- --- --- Max. 560 34 45 Units mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Caseh Case-to-Sink, Flat, Greased Surface Junction-to-Ambienth
Typ.
--- 0.24 ---
Max.
0.28 --- 40
Units
C/W
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Notes:
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS. Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% VDSS.
Starting TJ = 25C, L = 0.97mH, RG =25, ISD 34A, di/dt 765A/s, VDD V(BR)DSS,
TJ 150C. IAS = 34A (See Figure 13)
R is measured at TJ approximately 90C
2
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IRFPS35N50L
1000
1000
ID, Drain-to-Source Current (A)
100
I D , Drain-to-Source Current (A)
10
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1
10
0.1
4.5V
0.01
1
4.5V
0.001 0.1 1
20s PULSE WIDTH Tj = 25C
10 100
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 34A
I D , Drain-to-Source Current (A)
100
2.5
TJ = 150 C
10
2.0
1.5
1
1.0
0.1
TJ = 25 C
V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 10.0
0.5
0.01 4.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFPS35N50L
100000
30
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + Cgd ds
25
10000
C, Capacitance(pF)
Ciss
Energy (J)
100 1000
20 15
1000
Coss
100
10
Crss
5
10 1 10
0 0 100 200 300 400 500 600
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typ. Output Capacitance Stored Energy vs. VDS
20
ID = 34A VDS = 400V VDS = 250V VDS = 100V
1000
VGS , Gate-to-Source Voltage (V)
16
ISD , Reverse Drain Current (A)
100
TJ = 150 C
10
12
8
1
TJ = 25 C
4
0 0 40 80 120
FOR TEST CIRCUIT SEE FIGURE 13
160 200 240
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
QG , Total Gate Charge (nC)
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Gate Charge Vs. Gate-to-Source Voltage
Fig 8. Typical Source-Drain Diode Forward Voltage
4
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IRFPS35N50L
35 30
V DS VGS RG
RD
D.U.T.
+
ID , Drain Current (A)
25 20 15 10 5 0 25 50 75 100 125 150
-VDD
VGS
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFPS35N50L
OPERATION IN THIS AREA LIMITED BY RDS(on)
EAS , Single Pulse Avalanche Energy (mJ)
1000
1200
TOP BOTTOM
1000
ID 15A 22A 34A
ID , Drain Current (A)
100 10us
800
600
100us 10 1ms
400
1 1
TC = 25 C TJ = 150 C Single Pulse
10 100
200
10ms 1000 10000
0 25 50 75 100 125 150
VDS , Drain-to-Source Voltage (V)
Starting TJ , Junction Temperature ( C)
Fig 12. Maximum Safe Operating Area
Fig 13. Maximum Avalanche Energy Vs. Drain Current
15V
V(BR)DSS
VDS L
DRIVER
tp
RG
20V
D.U.T
IAS tp
+ - VDD
A
0.01
I AS
Fig 14a. Unclamped Inductive Test Circuit
Current Regulator Same Type as D.U.T.
Fig 14b. Unclamped Inductive Waveforms
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS
QGD
VGS
3mA
VG
IG
ID
Current Sampling Resistors
Charge
Fig 15a. Gate Charge Test Circuit
Fig 15b. Basic Gate Charge Waveform
6
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IRFPS35N50L
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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7
IRFPS35N50L
Super-247TM (TO-274AA) Package Outline
0.13 [.005] 16.10 [.632] 15.10 [.595] 5.50 [.216] 4.50 [.178] 2.15 [.084] 1.45 [.058] 0.25 [.010] 13.90 [.547] 13.30 [.524] BA 2X R 3.00 [.118] 2.00 [.079] A
1.30 [.051] 0.70 [.028] 20.80 [.818] 19.80 [.780] 4 16.10 [.633] 15.50 [.611] 4
C 1 2 3
B O 1.60 [.063] MAX. E E
14.80 [.582] 13.80 [.544]
4.25 [.167] 3.85 [.152]
5.45 [.215] 2X
3X
1.60 [.062] 1.45 [.058] BA
3X
1.30 [.051] 1.10 [.044]
0.25 [.010]
S ECTION E-E NOTES: 1. DIMENS IONING AND TOLERANCING PER ASME Y14.5M-1994. 2. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES] 3. CONTROLLING DIMENS ION: MILLIMETER 4. OUTLINE CONFORMS TO JEDEC OUTLINE TO-274AA
2.35 [.092] 1.65 [.065]
LEAD ASS IGNMENTS MOS FET 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN IGBT 1 - GATE 2 - COLLECTOR 3 - EMITTER 4 - COLLECTOR
Super-247TM (TO-274AA)Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH ASSEMBLY LOT CODE A8B9 INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
IRFPS37N50A
PART NUMBER
A8B9
0020
TOP
DATE CODE (YYWW) YY = YEAR WW = WEEK
Super TO-247TM package is not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.08/04
8
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