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Freescale Semiconductor Technical Data
MC100ES6056 Rev 4, 06/2005
2.5 V/3.3 V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer
The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The device features both individual and common select inputs to address both data path and random logic applications. The 100ES Series contains temperature compensation. Features * * * * * * * * * * 360 ps Typical Propagation Delays Maximum Frequency > 3 GHz Typical PECL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V ECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V Open Input Default State Separate and Common Select Q Output Will Default LOW with Inputs Open or at VEE VBB Outputs LVDS Input Compatible 20-Lead Pb-Free Package Available
MC100ES6056
DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E-03
EJ SUFFIX 20-LEAD TSSOP PACKAGE Pb-FREE PACKAGE CASE 948E-03
ORDERING INFORMATION
Device MC100ES6056DT MC100ES6056DTR2 MC100ES6056EJ MC100ES6056EJR2 Package TSSOP-20 TSSOP-20 TSSOP-20 (Pb-Free) TSSOP-20 (Pb-Free)
VCC 20
Q0 19
Q0 18
SEL0 COM_SEL SEL1 17 16 15
VCC 14
Q1 13
Q1 12
VEE 11
1
0
1
0
1
D0a
2
D0a
3
VBB0
4
D0b
5
D0b
6
D1a
7
D1a
8
VBB1
9
D1b
10
D1b
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. 20-Lead Pinout (Top View) and Logic Diagram
(c) Freescale Semiconductor, Inc., 2005. All rights reserved.
Table 1. Pin Description
Pin D0a* - D1a* D0a* - D1a* D0b* - D1b* D0b* - D1b* SEL0* - SEL1* COM_SEL* VBB0, VBB1 Q0 - Q1 Q0 - Q1 VCC VEE ECL Input Data a ECL Input Data a Invert ECL Input Data b ECL Input Data b Invert ECL Indiv. Select Input ECL Common Select Input Output Reference Voltage ECL True Outputs ECL Inverted Outputs Positive Supply Negative Supply Function
Table 2. Function Table
SEL0 X L L H H SEL1 X L H H L COM_SEL H L L L L Q0, Q0 a b b a a Q1, Q1 a b a a b
* Input function will default LOW when left open.
Table 3. General Specifications
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model 0 LFPM, 20 TSSOP 500 LFPM, 20 TSSOP Value 75 k 75 k > 4 kV > 400 V > 2 kV 140C/W 100C/W
Thermal Resistance (Junction-to-Ambient)
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
MC100ES6056 2 Advanced Clock Drivers Device Data Freescale Semiconductor
Table 4. Absolute Maximum Ratings(1)
Symbol VSUPPLY VIN IOUT IBB TA TSTG Characteristic Power Supply Voltage Input Voltage Output Current VBB Sink/Source Current Operating Temperature Range Storage Temperature Range Conditions Difference between VCC & VEE VCC - VEE 3.6 V Continuous Surge Rating 3.9 VCC + 0.3 VEE - 0.3 50 100 0.5 -40 to +85 -65 to +150 Units V V mA mA C C C
1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied.
Table 5. DC Characteristics (VCC = 0 V, VEE = -2.5 V 5% or 3.8 V to -3.135 V; VCC = 2.5 V 5% or 3.135 V to 3.8 V, VEE = 0 V)
Symbol IEE VOH VOL VIH VIL VBB VPP VCMR IIH IIL Characteristics Power Supply Current Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Output Reference Voltage Differential Input Voltage
(2) (3) (1)
-40C Min Typ 30 VCC-1085 VCC-1165 VCC-1810 0.15 VCC -2.3 0.5 VCC-960 Max 60 VCC-880 VCC-880 VCC-1025 VCC-1165 Min
0C to 85C Typ 30 VCC-930 Max 60 VCC-860 VCC-880 VCC-1475 1.3 VCC-0.8 150 0.5
Unit mA mV mV mV mV mV V V A A
(1)
VCC-1950 VCC-1695 VCC-1500 VCC-1950 VCC-1705 VCC-1500 VCC-1475 VCC-1810 1.3 VCC-0.8 150 0.15 VCC -2.3
VCC-1380 VCC-1290 VCC-1220 VCC-1380 VCC-1290 VCC-1200
Differential Cross Point Voltage Input HIGH Current Input LOW Current
1. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase. 2. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 3. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification.
MC100ES6056 Advanced Clock Drivers Device Data Freescale Semiconductor 3
Table 6. AC Characteristics (VCC = 0 V; VEE = -2.5 V 5% or -3.8 V to -3.135 V; VCC = 2.5 V 5% or 3.135 V to 3.8 V; VEE = 0 V)(1)
-40C to 85C Symbol fmax tPLH, tPHL Maximum Frequency Propagation Delay to Output Differential D to Q, Q SEL to Q, Q COM_SEL to Q, Q Output-to-Output(2) Part-to-Part RMS (1) 200 VCC-2.1 70 120 800 300 300 300 Characteristics Min Typ >3 400 430 490 10 500 600 650 50 200 1 1200 VCC-1.1 230 Max Unit GHz ps ps ps ps ps ps mV V ps
tSKEW tJITTER VPP VCMR tr / tf
Skew Cycle-to-Cycle Jitter Minimum Input Swing Differential Cross Point Voltage Output Rise/Fall Time (20%-80%)
1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to VCC-2.0 V. 2. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs.
Q Driver Device Q 50 50
D Receiver Device D
VTT VTT = VCC - 2.0 V
Figure 2. Typical Termination for Output Driver and Device Evaluation
MC100ES6056 4 Advanced Clock Drivers Device Data Freescale Semiconductor
PACKAGE DIMENSIONS
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CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE
MC100ES6056 Advanced Clock Drivers Device Data Freescale Semiconductor 5
PACKAGE DIMENSIONS
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CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE
MC100ES6056 6 Advanced Clock Drivers Device Data Freescale Semiconductor
PACKAGE DIMENSIONS
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CASE 948E-03 ISSUE B 20-LEAD TSSOP PACKAGE
MC100ES6056 Advanced Clock Drivers Device Data Freescale Semiconductor 7
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MC100ES6056 Rev. 4 06/2005

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