|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV5089 DS3126-2.0 June 1993 MV5089 DTMF GENERATOR The MV5089 is fabricated using ISO-CMOS high density technology and offers low power and wide voltage operation. An inexpensive 3.58MHz TV crystal completes the reference oscillator. From this frequency are derived 8 different sinusoidal frequencies which, when appropriately mixed, provide Dual-Tone Multi-Frequency (DTMF) tones. Inputs are compatible with a standard 2-of-8 active-low keyboard and the keyboard entries determine the correct division of the reference frequency by the row and column counters. D-to-A conversion, using R-2R ladder networks, results in a staircase approximation of a sinewave with low total distortion. Frequency and amplitude stability over operating voltage and temperature range are maintained within industry specifications. VDD TONE DISABLE COLUMN 1 COLUMN 2 COLUMN 3 VSS OSC IN OSC OUT 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TONE OUT SINGLE TONE INHIBIT ROW 1 ROW 2 ROW 3 ROW 4 ANY KEY DOWN COLUMN 4 DP16 MP16 FEATURES s s s s s s Pin-for-Pin Replacement for MK5089 Low Standby Power Minimum External Parts Count 2.75V to 10V Operatlon 2-of-8 Keyboard Input High Accuracy Tones Provided by 3.58MHz Crystal Oscillator s Pin-Selectable Inhibit of Single Tone Generation ROW INPUTS Figure 1: Pin connections - top view APPLICATIONS DTMF Signalling for s Telephone Sets s Mobile Radio s Remote Control s Point-of-Sale and Banking Terminals s Process Control { 1 2 3 4 RR RR VDD RR RR VDD VSS SINGLE TONE INHIBIT KEYBOARD LOGIC SINE WAVE COUNTER D/A CONVERTER VDD OSC OUT /4 ROW COUNTER 1/ V 2 DD + VDD TONE OUT OSC IN COLUMN COUNTER SINE WAVE COUNTER D/A CONVERTER KEYBOARD LOGIC VDD RC VSS RC RC RC TONE DISABLE KEYBOARD LOGIC VSS ANY KEY DOWN { COLUMN INPUTS 1 2 3 4 Figure 2: Functional block diagram 1 MV5089 OUTPUT FREQUENCY Table 1 shows the output frequency deviation from the standard DTMF frequencies when a 3.58MHz crystal is used as the reference. The row and column output waveforms are digitally synthesised using R-2R D-to-A converters (see Fig.3), resulting in staircase approximations to a sinewave. An opamp mixes these tones to produce a dual-tone waveform. Single tone distortion is typically better than 7% and all distortion components of the mixed dual-tone should be 30dB relative to the strongest fundamental (column tone). Standard DTMF (Hz) Tone Output Frequency Using 3.5795545 MHz Crystal 701.3 771.4 857.2 935.1 1215.9 1331.7 1471.9 1645.0 % Deviation from Standard Row Column f1 f2 f3 f4 f5 f6 f7 f8 697 770 852 941 1209 1336 1477 1633 +0.62 +0.19 +0.61 -0.63 +0.57 -0.32 -0.35 +0.73 Low Group High Group Table 1: Output frequency deviation VOUT a) t VOUT b) t Figure 3: Typical sinewave output (a) Row tones (b) Column tones DISTORTION MEASUREMENTS THD for the single tone is defined by: 100 ( 2 V2 + V3f + V2 + ---- V2 ) % 2f nf 4f V fundamental Where V2f --- Vnf are the Fourier components of the waveform. THD for the dual tone is defined by: 100 ( 2 V2 + V3R+ V2 + V2 + V2 --- V2 + V2 ) 2R nR 2C 3C nc IMD V2 ROW + V2 COL where VROW is the row fundamental amplitude VCOL is the column fundamental amplitude V2R--VnR are the Fourier component amplitudes of the row frequencies V2C--VnC are the Fourier component amplitudes of the column frequencies VIMD is the sum of all intermodulation components. 2 MV5089 PIN FUNCTIONS PIN 1 2 NAME VDD TONE DISABLE DESCRIPTION Positive Power Supply This input has an internal pull-up resistor to VDD. When connected to VSS no tones are generated by ant key depression allowing the keyboard to be used for purposes other than DTMF signalling. These CMOS inputs are held at VSS by an internal pull-up resistor and are activated by the application of VSS. Negative Power Supply (OV) On-chip inverter completes the oscillator when a 3,579545 MHz crystal is connected to these pins. OSC In is the inverter input and OSC Out is the output. 3,4,5,9 Column 1-4 6 7,8 VSS OSC In, OSC Out 10 Any Key Down This is an NMOS transistor output which switches to VSS while any key is depressed. Otherwise this output is high impedance. Switching is independent of Tone Disable and Single Tone Inhibit. Row 1-4 Single Tone Inhibit As Column 1-4 inputs. This input has a pull-up resistor to VSS. When left unconnected or tied to VSS, dual tones may be generated, but keyboard input combinations resulting in single tone generation are inhibited. When VDD is applied single or dual tones may be generated. Emitter output of a bipolar NPN transistor whose collector is tied to VDD. Input to this transistor is from an op-amp which mixes the row and column tones. 11,12,13,14 15 16 Tone Out ROW AND COLUMN INPUTS These inputs are compatible with the standard 2-of-8 keyboard or with an electronic input. Figures 4 and 5 show these input configurations and Fig.6 shows the internal chip structure of these inputs. When operating with a keyboard, dual tones are generated when any single button is pushed. With Single Tone Inhibit at VDD, connection of VSS to a single column causes the generation of that Column tone. Connection of VSS to more than one Column will result in no Column tones being generated. Connection of VSS to Rows only generates no tone - a Column must be connected to VSS. A single Row tone only may be generated by connecting 2 columns, and the desired row, to VSS. VDD VSS VDD VSS ROW COLUMN Figure 5: Electronic input VDD RR ROW INPUT STATIC PROTECTION Row input sensing circuit OUTPUT TONE LEVEL The output tone level of the MV5089 is proportional to the applied DC supply voltage. A regulated supply will normally be used which may be designed to provide stability over the temperature range. COLUMN INPUT COL VSS ROW STATIC PROTECTION RC VDD Column input sensing circuit Figure 4: 2 of 8 DTMF keyboard Figure 6: Row and Column inputs 3 MV5089 ABSOLUTE MAXIMUM RATINGS Min. VDD - VSS Voltage on any pin Current on any pin Operating temperature Storage temperature -0.3V VSS - 0.3V -40C -65C Max. 10.5V VDD + 0 3V 10 mA +85C +150C Power dissipation Derate 16 mW/C above 75C (All leads soldered to PCB) Min. Max. 850 mW DC ELECTRICAL CHARACTERISTICS Test conditions (unless othenwise stated): Tamb = +25C, VDD = 3V to 10V Characteristics Operating Supply Voltage Standby Supply Current Operating Supply Current SINGLE TONE Input High Voltage INHIBIT Input Low Voltage TONE DISABLE Input Resistance ROW 1-4 Input High Voltage COLUMN 1-4 Input Low Voltage ANY KEY DOWN Sink Current Leakage Current Symbol VDD IDDS IDD VIH VIL RIN VIH VIL IOL IOZ Min. 2.75 0.2 0.5 1.0 5.0 0.7VDD 0 60 0.7VDD 0 0.5 1.0 1 VDD 0.3VDD Typ. Max. 10 100 200 2.0 10.0 VDD 0.3VDD Units V uA uA mA mA V V K V V mA mA uA Ref. to VSS VDD = 3V VDD = 10V VDD = 3V VDD = 10V SUPPLY No Key Depressed All outputs Unloaded One Key Depressed All outputs Unloaded INPUTS AC ELECTRICAL CHARACTERISTICS Test conditions (unless othenwise stated): Tamb = +25C, VDD = 3V to 10V Characteristics TONE OUT OUTPUT LEVEL, ROW PRE EMPHASIS, High Band OUTPUT DISTORTION (Dual Tone) Symbol VOUT Min. -10 2.4 Typ. -8 2.7 Max. -7 3.0 -20 Units dBm dB dB VDD = 3V. Single Tone. RL = 100k OUTPUTS VDD = 3V, VOL = 0.5V VDD = 10V, VOL = 0.5V VDD = 3V, Tone Output Rise Time tr 3 5 ms Total out-of-band power relative to sum of row and column fundamental power Time for waveform to reach 90% of magnitude of either frequency from initial key stroke 4 MV5089 VDD SINGLE TONE INHIBIT COL 1 3 1 15 7 3.58 MHz XTAL 8 TONE DISABLE TONE OUTPUT RL VSS COL 2 4 COL 3 5 COL 4 9 1 4 7 2 5 8 0 3 6 9 # A B C D ROW 1 ROW 2 14 13 MV5089 2 16 ROW 3 12 ROW 4 11 6 10 * VSS VSS ANY KEY DOWN Figure 7: Connection diagram 5 For more information about all Zarlink products visit our Web Site at www.zarlink.com Information relating to products and services furnished herein by Zarlink Semiconductor Inc. trading as Zarlink Semiconductor or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request. Purchase of Zarlink s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2001, Zarlink Semiconductor Inc. All Rights Reserved. TECHNICAL DOCUMENTATION - NOT FOR RESALE |
Price & Availability of MV5089 |
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |