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| FDC796N February 2004 FDC796N 30V N-Channel PowerTrench MOSFET General Description This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed. Features * 12.5 A, 30 V. RDS(ON) = 9 m @ VGS = 10 V RDS(ON) = 12 m @ VGS = 4.5 V * High performance trench technology for extremely low RDS(ON) * Low gate charge * High power and current handling capability * Fast switching speed. Applications * DC/DC converter * Power management * Load switch Bottom Drain G S S S SuperSOT-6 TM 1 S 6 5 4 2 3 S FLMP Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation TA=25oC unless otherwise noted Parameter Ratings 30 20 (Note 1a) Units V A W C 12.5 40 2 1.1 -55 to +150 (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RJA RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1b) 60 111 0.5 C/W Package Marking and Ordering Information Device Marking .796 Device FDC796N Reel Size 7'' Tape width 8mm Quantity 3000 units 2004 Fairchild Semiconductor Corporation FDC796N Rev D (W) FDC796N Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSS VGS(th) VGS(th) TJ RDS(on) gFS Ciss Coss Crss RG td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Notes: 1. TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage (Note 2) Test Conditions ID = 250 A VGS = 0 V, ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 20 V, VGS = 0 V VDS = 0 V Min 30 Typ Max Units V Off Characteristics 25 10 100 1 2 - 5.6 7.4 9.5 9 48.4 1444 342 135 VGS = 15 mV, (Note 2) mV/C A nA On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge ID = 250 A VDS = VGS, ID = 250 A, Referenced to 25C ID = 12.5 A VGS = 10 V, ID = 11 A VGS = 4.5 V, VGS = 10 V, ID = 12.5 A, TJ=125C VDS = 10 V, ID = 12.5 A VDS = 15 V, f = 1.0 MHz V GS = 0 V, 3 V mV/C 9 12 16 m S pF pF pF 20 7.6 42 23 20 ns ns ns ns nC nC nC Dynamic Characteristics f = 1.0 MHz ID = 1 A, RGEN = 6 1.25 10 3.8 26 13 Switching Characteristics VDD = 15 V, VGS = 10 V, VDS = 15 V, VGS = 5 V ID = 12.5 A, 14 4 5 Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IS = 1.5 A (Note 2) 1.5 0.73 25 15 1.2 A V nS nC IF = 12.5 A, diF/dt = 100 A/s RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 60C/W when mounted on a 1in2 pad of 2 oz copper b) 111C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDC796N Rev D (W) FDC796N Typical Characteristics 50 2.4 6.0V 4.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 4.5V 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 0.5 1 1.5 ID, DRAIN CURRENT (A) 40 VGS = 3.5V 3.5V 30 4.0V 4.5V 5.0V 6.0V 10V 20 10 3.0V 0 VDS, DRAIN-SOURCE VOLTAGE (V) 0 10 20 30 40 50 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.024 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 12.5A VGS = 10V 1.4 ID = 6.3 A 0.02 1.2 0.016 TA = 125oC 0.012 1 0.8 TA = 25oC 0.008 0.6 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 0.004 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 50 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 VGS = 0V 10 1 0.1 -55oC 0.01 0.001 0.0001 TA = 125oC 25oC VDS = 5V ID, DRAIN CURRENT (A) 40 30 20 TA = 125oC 25oC 10 -55oC 0 1.5 2 2.5 3 3.5 4 VGS, GATE TO SOURCE VOLTAGE (V) IS, REVERSE DRAIN CURRENT (A) 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC796N Rev D (W) FDC796N Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 12.5A 8 20V 6 CAPACITANCE (pF) VDS = 10V 15V 2000 CISS f = 1MHz VGS = 0 V 1600 1200 4 800 COSS 400 CRSS 2 0 0 5 10 15 20 25 30 Qg, GATE CHARGE (nC) 0 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 50 10s ID, DRAIN CURRENT (A) 10 RDS(ON) LIMIT 100s 1ms 10ms 100ms 1s 10s DC 40 SINGLE PULSE RJA = 111C/W TA = 25C 30 1 VGS = 10V SINGLE PULSE RJA = 111oC/W TA = 25oC 0.01 0.01 0.1 1 20 0.1 10 10 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 111 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDC796N Rev D (W) FDC796N Dimensional Outline and Pad Layout FDC796N Rev D (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST BottomlessTM FASTrTM CoolFETTM FPSTM CROSSVOLTTM FRFETTM DOMETM GlobalOptoisolatorTM EcoSPARKTM GTOTM E2CMOSTM HiSeCTM EnSignaTM I2CTM FACTTM ImpliedDisconnectTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC OPTOPLANARTM PACMANTM POPTM Power247TM PowerSaverTM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I8 |
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