View ESDA6V1B1_323778.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
ESDA6V1B1
TRANSILTM ARRAY FOR ESD PROTECTION
Application Specific Discretes A.S.D.TM
MAIN APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : - COMPUTER - PRINTERS - COMMUNICATION SYSTEMS - GSM HANDSETS AND ACCESSORIES - CAR RADIO It is particularly recommended for parallel port protection where the line interface withstands only 2kV ESD surge SO8 FEATURES 6 BIDIRECTIONAL TRANSILTM FUNCTIONS LOW LEAKAGE CURRENT : IR MAX < 2 A 200 W PEAK PULSE POWER (8/20 s) FUNCTIONAL DIAGRAM
DESCRIPTION The ESDA6V1B1 is a monolithic voltage suppressor designed to protect components which are connected to data and transmission lines against ESD. It clamps the voltage just above the logic level supply for positive and negative transients.
I/O 1 I/O 2 I/O 3 GND
1 2 3 4
8 7 6 5
I/O 6 I/O 5 I/O 4 GND
BENEFITS High ESD protection level : up to 25 kV High integration Suitable for high density boards
COMPLIES WITH THE FOLLOWING STANDARDS : IEC 1000-4-2 : level 4 MIL STD 883C-Method 3015-6 : class 3 (human body model)
November 1999 - Ed : 2B
1/6
ESDA6V1B1
ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP PPP Tstg Tj TL Parameter Electrostatic discharge MIL STD 883C - Method 3015-6 Peak pulse power (8/20s) Storage temperature range Maximum junction temperature Maximum lead temperature for soldering during 10s Value 25 200 - 55 to + 150 150 260 Unit kV W C C C
ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VRM VBR VCL IRM IPP Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Voltage temperature coefficient Capacitance Dynamic resistance
T
C Rd
Types
VBR min. note 1 V
@ max.
IR
IRM max. A 2
@
VRM
Rd typ. note 2 0.7
T max. note 3 10-4/C 10
C typ. 0V bias pF 50
V 8
mA 1
V 5
ESDA6V1B1
6.1
note 1 : Between two I/O pins or I/O pin and Groung note 2 : Square pulse, Ipp = 25A, tp=2.5s. note 3 : VBR = T* (Tamb -25C) * VBR (25C)
2/6
ESDA6V1B1
CALCULATION OF THE CLAMPING VOLTAGE USE OF THE DYNAMIC RESISTANCE The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. The voltage across the protection cell can be calculated with the following formula: VCL = VBR + Rd IPP Where Ipp is the peak current through the ESDA cell. DYNAMIC RESISTANCE MEASUREMENT The short duration of the ESD has led us to prefer a more adapted test wave, as below defined, to the classical 8/20s and 10/1000s surges.
I Ipp
As the value of the dynamic resistance remains stable for a surge duration lower than 20s, the 2.5s rectangular surge is well adapted. In addition both rise and fall times are optimized to avoid any parasitic phenomenon during the measurement of Rd.
2s tp = 2.5s
t
2.5s duration measurement wave.
3/6
ESDA6V1B1
Fig. 1 : Peak power dissipation versus initial junction temperature.
Ppp[Tj initial]/Ppp[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0
2000 1000
Fig. 2 : Peak pulse power versus exponential pulse duration (Tj initial = 25 C).
Ppp(W)
100
Tj initial(C) 0 25 50 75 100 125 150 175
10 1
tp(s) 10 100
Fig. 3 : Clamping voltage versus peak pulse current (Tj initial = 25 C). Rectangular waveform tp = 2.5 s.
Ipp(A) 50.0
tp=2.5s
Fig. 4 : Capacitance versus reverse applied voltage (typical values).
C(pF) 50
F=1MHz Vosc=30mV
10.0
45 40
1.0
35 30
Vcl(V)
0.1
VR(V)
30 35 40 45 50
0
5
10
15
20
25
25
1
2
3
4
5
6
Fig. 5 : Relative variation of leakage current versus junction temperature (typical values).
IR[Tj] / IR[Tj=25C] 2.2 2.0 1.8 1.6 1.4 1.2 Tj(C) 1.0 25 50 75 100 125 150
4/6
ESDA6V1B1
APPLICATION EXAMPLE: Protection of symmetrical signals.
A1 6.1V A2 6.1V A3 6.1V A4 6.1V A5 6.1V A6 6.1V 6.1V
+/- 2.5 V
+/- 2.5 V
+/- 2.5 V
+/- 2.5 V
+/ - 2.5 V
+/- 2.5 V
ORDER CODE
ESDA 6V1 B 1 RL
ESD ARRAY VBR min Bidirectional PACKAGING: RL = Tape and reel = Tube PACKAGE : SO8
5/6
ESDA6V1B1
PACKAGE MECHANICAL DATA SO8 Plastic DIMENSIONS REF.
L c1 C a3 a2 A b1
Millimetres 1.75 0.1 0.65 0.35 0.19 0.25 0.004 1.65 0.85 0.025 0.48 0.014 0.25 0.007
Inches 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150
Min. Typ. Max. Min. Typ. Max. A a1 a2 a3 b b1 C c1
b e3
e
S
E
a1
D M
0.25 0.50 0.50 0.010 45 (typ) 4.8 5.8 1.27 3.81 3.8 0.4 4.0 0.6 0.15 1.27 0.016 5.0 0.189 6.2 0.228
8
5 F
D E e e3 F L M
1
4
0.157 0.050 0.024
MARKING : Logo, Date Code, E6V1B1 Packaging : Preferred packaging is tape and reel. Weight : 0.08g.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6

▲Up To Search▲

Price & Availability of ESDA6V1B1

	To Download ESDA6V1B1 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .