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Final Electrical Specifications LT1167 Single Resistor Gain Programmable, Precision Instrumentation Amplifier FEATURES s s s s s s s s s s s s s s DESCRIPTION June 1998 Single Gain Set Resistor: G = 1 to 10,000 Gain Error: G = 10, 0.04% Max Gain Nonlinearity: G = 10, 10ppm Max Input Offset Voltage: G = 10, 40V Max Input Offset Voltage Drift: 0.3V/C Max Input Bias Current: 350pA Max PSRR at G = 1: 109dB Min CMRR at G = 1: 90dB Min Supply Current: 1.3mA Max Wide Supply Range: 2.3V to 18V 1kHz Voltage Noise: 7.5nV/Hz 0.1Hz to 10Hz Noise: 0.28VP-P Available in SO-8 Package Meets IEC 1004-2 Level 2 ESD Tests with Two External 20k Resistors APPLICATIONS s s s s s Bridge Amplifiers Strain Gauge Amplifiers Thermocouple Amplifiers Differential to Single-Ended Converters Medical Instrumentation The LT (R)1167 is a low power, precision instrumentation amplifier that requires only one external resistor to set gains of 1 to 10,000. The low voltage noise of 7.5nV/Hz (at 1kHz) is not compromised by low power dissipation (0.9mA typical for 2.3V to 15V supplies). The high accuracy of 10ppm maximum nonlinearity and 0.04% max gain error (G = 10) is not degraded even for load resistors as low as 2k (previous monolithic instrumentation amps used 10k for their nonlinearity specifications). The LT1167 is laser trimmed for very low input offset voltage (40V max), drift (0.3V/C), high CMRR (90dB, G = 1) and PSRR (109dB, G = 1). Low input bias currents of 350pA max are achieved with the use of superbeta processing. The output can handle capacitive loads up to 1000pF in any gain configuration while the inputs are ESD protected up to 13kV (human body). The LT1167 with two external 20k resistors passes the IEC 1004-2 level 2 specification. The LT1167, offered in SO-8 package, requires significantly less PC board area than discrete multi op amp and resistor designs. These advantages make the LT1167 the most cost effective solution for precision instrumentation amplifier applications. , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATION Single Supply Barometer VS R5 392k 2 LT1634CCZ-1.25 1 3 2 5k R6 1k - 5k R1 825 LT1167 G = 60 8 3 5 4 TO 4-DIGIT DVM 6 4 2 6 5k 5k R2 12 R4 50k R3 50k RSET 5 + 1/2 LT1490 7 R7 50k 5 6 R8 100k - 0.2% ACCURACY AT 25C 1.2% ACCURACY AT 0C TO 60C VS = 8V TO 30V Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. + + 3 NONLINEARITY (100ppm/DIV) 1/2 LT1490 1 4 - + 8 LUCAS NOVA SENOR NPC-1220-015-A-3L VS 1 2 1 7 - VOLTS 2.800 3.000 3.200 INCHES Hg 28.00 30.00 32.00 1167 TA01 U U U Gain Nonlinearity 1167 TA02 G = 1000 RL = 1k VOUT = 10V OUTPUT VOLTAGE (2V/DIV) 1 LT1167 ABSOLUTE MAXIMUM RATINGS Supply Voltage ...................................................... 20V Differential Input Voltage (Within the Supply Voltage) ..................................................... 40V Input Voltage (Equal to Supply Voltage) ................ 20V Input Current ...................................................... 20mA Output Short-Circuit Duration .......................... Indefinite Operating Temperature Range ................ - 40C to 85C Specified Temperature Range LT1167AC/LT1167C (Note 3) .................. 0C to 70C LT1167AI/LT1167I ............................. - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C PACKAGE/ORDER INFORMATION ORDER PART NUMBER TOP VIEW RG 1 -IN 2 +IN 3 -VS 4 - + 8 7 6 5 RG +VS OUTPUT REF LT1167ACS8 LT1167AIS8 LT1167CS8 LT1167IS8 S8 PART MARKING 1167A 1167AI 1167 1167I S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150C, JA = 190C/ W Consult factory for PDIP package and Military grade parts. ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER G Gain Range Gain Error CONDITIONS G = 1 + (49.4k/RG) G=1 G = 10 (Note 1) G = 100 (Note 1) G = 1000 (Note 1) VS = 15V, VCM = 0V, TA = 25C, R L = 2k, unless otherwise noted. LT1167AC/LT1167AI MIN TYP MAX 1 0.008 0.010 0.025 0.040 1 2 15 5 6 20 10k 0.02 0.04 0.05 0.10 6 10 40 12 15 65 LT1167C/LT1167I MIN TYP MAX 1 0.015 0.020 0.030 0.040 1.5 3 20 6 7 25 10k 0.03 0.05 0.08 0.10 10 15 60 15 20 80 % % % % ppm ppm ppm ppm ppm ppm UNITS Gain Nonlinearity (Note 4) VO = 10V, G = 1 VO = 10V, G = 10 and 100 VO = 10V, G = 1000 VO = 10V, G = 1, RL = 600 VO = 10V, G = 10 and 100, RL = 600 VO = 10V, G = 1000, RL = 600 VOST VOSI VOSO IOS IB en Total Input Referred Offset Voltage VOST = VOSI + VOSO/G Input Offset Voltage Output Offset Voltage Input Offset Current Input Bias Current Input Noise Voltage, RTI 0.1Hz to 10Hz, G = 1 0.1Hz to 10Hz, G = 10 0.1Hz to 10Hz, G = 100 and 1000 fO = 1kHz fO = 1kHz (Note 2) G = 1000, VS = 5V to 15V G = 1, VS = 5V to 15V 15 40 90 50 2.00 0.50 0.28 7.5 67 12 90 40 200 320 350 20 50 100 80 2.00 0.50 0.28 7.5 67 12 90 60 300 450 500 V V pA pA VP-P VP-P VP-P nV/Hz nV/Hz Total RTI Noise = eni 2 + (eno /G)2 eni eno Input Noise Voltage Density, RTI Output Noise Voltage Density, RTI 2 U W U U WW W LT1167 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER in RIN CIN(DIFF) CIN(CM) VCM Input Noise Current Input Noise Current Density Input Resistance Differential Input Capacitance Common Mode Input Capacitance Input Voltage Range CONDITIONS fO = 0.1Hz to 10Hz fO = 10Hz VIN = 10V VIN = 10V VCM = 10V VS = 15V, VCM = 0V, TA = 25C, RL = 2k, unless otherwise noted. LT1167AC/LT1167AI MIN TYP MAX 10 124 200 1000 1.5 1.5 200 LT1167C/LT1167I MIN TYP MAX 10 124 1000 1.5 1.5 UNITS pAP-P fA/Hz G pF pF G = 1, Other Input Grounded VS = 2.3V to 5V VS = 5V to 18V 1k Source Imbalance, VCM = 0V to 10V G=1 G = 10 G = 100 G = 1000 VS = 2.3 to 18V G=1 G = 10 G = 100 G = 1000 VS = 2.3V to 18V RL = 10k VS = 2.3V to 5V VS = 5V to 18V G=1 G = 10 G = 100 G = 1000 G = 1, VOUT = 10V 10V Step G = 1 to 100 G = 1000 VREF = 0V - VS + 1.9 - VS + 1.9 + VS - 1.2 - VS + 1.9 + VS - 1.4 - VS + 1.9 + VS - 1.2 + VS - 1.4 V V CMRR Common Mode Rejection Ratio 90 106 120 126 109 125 131 135 95 115 125 140 120 135 140 150 0.9 1.3 85 100 110 120 105 120 126 130 95 115 125 140 120 135 140 150 0.9 1.3 + VS - 1.2 + VS - 1.3 27 1000 800 120 12 dB dB dB dB dB dB dB dB mA V V mA kHz kHz kHz kHz V/s s s k A V PSRR Power Supply Rejection Ratio IS VOUT Supply Current Output Voltage Swing - VS + 1.1 - VS + 1.2 20 27 1000 800 120 12 0.75 1.2 14 130 20 50 - VS + 1.6 + VS - 1.2 - VS + 1.1 + VS - 1.3 - VS + 1.2 20 IOUT BW Output Current Bandwidth SR Slew Rate Settling Time to 0.01% 0.75 1.2 14 130 20 50 RREFIN IREFIN VREF AVREF Reference Input Resistance Reference Input Current Reference Voltage Range Reference Gain to Output + VS - 1.6 - VS + 1.6 + VS - 1.6 1 0.0001 1 0.0001 3 LT1167 ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER Gain Error CONDITIONS G=1 G = 10 G = 100 G = 1000 VS = 15V, VCM = 0V, 0C TA 70C, RL = 2k, unless otherwise noted. MIN q q q q q q q q LT1167AC TYP MAX 0.01 0.08 0.09 0.14 1.5 3 20 20 0.03 0.26 0.29 0.33 10 15 60 50 MIN LT1167C TYP MAX 0.012 0.100 0.120 0.140 2 4 25 20 0.04 0.28 0.31 0.33 15 20 80 50 UNITS % % % % ppm ppm ppm ppm/C Gain Nonlinearity VOUT = 10V, G = 1 VOUT = 10V, G = 10 and 100 VOUT = 10V, G = 1000 G < 1000 (Note 1) VOST = VOSI + VOSO/G VS = 5V to 15V (Notes 2, 5) VS = 5V to 15V (Notes 2, 5) (Note 2) (Note 2) G/T VOST VOSI VOSIH VOSO VOSOH VOSI/T VOSO/T IOS IOS/T IB IB/T VCM Gain vs Temperature Total Input Referred Offset Voltage Input Offset Voltage Input Offset Voltage Hysteresis Output Offset Voltage Output Offset Voltage Hysteresis Input Offset Drift (RTI) Output Offset Drift Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range q 18 3.0 60 30 0.05 0.7 100 0.3 170 0.4 - VS + 2.1 - VS + 2.1 60 380 0.3 3 400 450 23 3.0 70 30 0.06 0.8 120 0.4 200 0.4 80 500 0.4 4 550 600 V V V V V/C V/C pA pA/C pA pA/C q q q q q q q G = 1, Other Input Grounded VS = 2.3V to 5V VS = 5V to 18V 1k Source Imbalance, VCM = 0V to 10V G=1 G = 10 G = 100 G = 1000 VS = 2.3V to 18V G=1 G = 10 G = 100 G = 1000 VS = 2.3V to 18V RL = 10k VS = 2.3V to 5V VS = 5V to 18V G = 1, VOUT = 10V (Note 2) q q + VS - 1.3 + VS - 1.4 - VS + 2.1 - VS + 2.1 + VS - 1.3 + VS - 1.4 V V CMRR Common Mode Rejection Ratio q q q q q q q q q q q q q q 88 100 115 117 106 123 127 129 92 110 120 135 115 130 135 145 1.0 1.5 + VS - 1.3 + VS - 1.5 21 1.1 + VS - 1.6 83 97 113 114 101 118 124 126 92 110 120 135 115 130 135 145 1.0 1.5 + VS -1.3 + VS - 1.5 21 1.1 + VS - 1.6 dB dB dB dB dB dB dB dB mA V V mA V/s V PSRR Power Supply Rejection Ratio IS VOUT Supply Current Output Voltage Swing - VS + 1.4 - VS + 1.6 16 0.65 - VS + 1.6 - VS + 1.4 - VS + 1.6 16 0.65 - VS + 1.6 IOUT SR VREF Output Current Slew Rate REF Voltage Range 4 LT1167 VS = 15V, VCM = 0V, - 40C TA 85C, RL = 2k, unless otherwise noted. (Note 3) SYMBOL PARAMETER Gain Error CONDITIONS G=1 G = 10 G = 100 G = 1000 VO = 10V, G = 1 VO = 10V, G = 10 and 100 VO = 10V, G = 1000 G < 1000 (Note 1) VOST = VOSI + VOSO/G q q q q q q q q q ELECTRICAL CHARACTERISTICS MIN LT1167AI TYP MAX 0.014 0.130 0.140 0.200 2 5 26 20 0.04 0.38 0.40 0.50 15 20 70 50 MIN LT1167I TYP MAX 0.015 0.140 0.150 0.200 3 6 30 20 0.05 0.40 0.45 0.50 20 30 100 50 UNITS % % % % ppm ppm ppm ppm/C GN Gain Nonlinearity (Notes 2, 4) G/T VOST VOSI VOSIH VOSO VOSOH VOSI /T VOSO/T IOS IOS/T IB IB/T VCM CMRR Gain vs Temperature Total Input Referred Offset Voltage Input Offset Voltage Input Offset Voltage Hysteresis Output Offset Voltage 20 3.0 180 30 0.05 0.8 110 0.3 180 0.5 - VS + 2.1 - VS + 2.1 75 500 0.3 5 550 600 + VS - 1.3 - VS + 2.1 + VS - 1.4 - VS + 2.1 25 3.0 200 30 0.06 1 120 0.3 220 0.6 100 600 0.4 6 700 800 +VS - 1.3 + VS - 1.4 V V V V V/C V/C pA pA/C pA pA/C V V (Notes 2, 5) q Output Offset Voltage Hysteresis (Notes 2, 5) Input Offset Drift (RTI) Output Offset Drift Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range Common Mode Rejection Ratio VS = 2.3V to 5V VS = 5V to 18V 1k Source Imbalance, VCM = 0V to 10V G=1 G = 10 G = 100 G = 1000 VS = 2.3V to 18V G=1 G = 10 G = 100 G = 1000 VS = 2.3V to 5V VS = 5V to 18V G = 1, VOUT = 10V (Note 2) (Note 2) (Note 2) q q q q q q q q q q q q q q q q q q q q q q 86 98 114 116 104 120 125 128 - VS + 1.4 - VS + 1.6 15 0.55 - VS + 1.6 90 105 118 133 112 125 132 140 1.1 1.6 81 95 112 112 100 115 120 125 + VS - 1.3 - VS + 1.4 + VS - 1.5 - VS + 1.6 15 0.55 + VS - 1.6 - VS + 1.6 90 105 118 133 112 125 132 140 1.1 1.6 + VS - 1.3 + VS - 1.5 20 0.95 + VS - 1.6 dB dB dB dB dB dB dB dB mA V V mA V/s V PSRR Power Supply Rejection Ratio IS VOUT IOUT SR VREF Supply Current Output Voltage Swing Output Current Slew Rate REF Voltage Range 20 0.95 The q denotes specifications that apply over the full specified temperature range. Note 1: Does not include the effect of the external gain resistor RG. Note 2: This parameter is not 100% tested. Note 3: The LT1167AC/LT1167C are designed, characterized and expected to meet the industrial temperature limits, but are not tested at - 40C and 85C. I-grade parts are guaranteed. Note 4: This parameter is measured in a high speed automatic tester that does not measure the thermal effects with longer time constants. The magnitude of these thermal effects are dependent on the package used, heat sinking and air flow conditions. Note 5: Hysteresis in offset voltage is created by package stress that differs depending on whether the IC was previously at a higher or lower temperature. Offset voltage hysteresis is always measured at 25C, but the IC is cycled to 85C I-grade (or 70C C-grade) or - 40C I-grade (0C C-grade) before successive measurement. 60% of the parts will pass the typical limit on the data sheet. 5 LT1167 TYPICAL PERFOR A CE CHARACTERISTICS Gain Nonlinearity, G = 1 NONLINEARITY (10ppm/DIV) NONLINEARITY (1ppm/DIV) OUTPUT VOLTAGE (2V/DIV) G=1 RL = 2k VOUT = 10V 1167 G01 OUTPUT VOLTAGE (2V/DIV) G = 10 RL = 2k VOUT = 10V 1167 G02 NONLINEARITY (10ppm/DIV) Gain Nonlinearity, G = 1000 80 NONLINEARITY (100ppm/DIV) 70 NONLINEARITY (ppm) 60 50 40 30 GAIN ERROR (%) G = 1000 OUTPUT VOLTAGE (2V/DIV) RL = 2k VOUT = 10V Distribution of Input Offset Voltage, TA = - 40C 40 35 PERCENT OF UNITS (%) VS = 15V TA = - 40C G = 1000 165 S8 (3 LOTS) PERCENT OF UNITS (%) 25 20 15 10 5 0 0 - 80 - 60 - 40 - 20 20 40 INPUT OFFSET VOLTAGE (V) 60 1167 G40 20 15 10 5 0 - 60 PERCENT OF UNITS (%) 30 6 UW 1167 G04 Gain Nonlinearity, G = 10 Gain Nonlinearity, G = 100 G = 100 OUTPUT VOLTAGE (2V/DIV) RL = 2k VOUT = 10V 1167 G03 Gain Nonlinearity vs Temperature VS = 15V VOUT = - 10V TO 10V RL = 2k 0.20 0.15 0.10 0.05 Gain Error vs Temperature G=1 0 - 0.05 - 0.10 VS = 15V G = 10* VOUT = 10V RL = 2k G = 100* *DOES NOT INCLUDE G = 1000* TEMPERATURE EFFECTS OF R G - 25 0 25 50 TEMPERATURE (C) 75 100 G = 1000 20 10 G = 100 0 - 50 - 25 0 50 75 25 TEMPERATURE (C) 100 150 G = 1, 10 - 0.15 - 0.20 - 50 1167 G05 1167 G06 Distribution of Input Offset Voltage, TA = 25C 30 25 VS = 15V TA = 25C G = 1000 165 S8 (3 LOTS) 40 35 30 25 20 15 10 5 - 40 - 20 0 20 40 INPUT OFFSET VOLTAGE (V) 60 1167 G41 Distribution of Input Offset Voltage, TA = 85C VS = 15V TA = 85C G = 1000 165 S8 (3 LOTS) 0 0 - 80 - 60 - 40 - 20 20 40 INPUT OFFSET VOLTAGE (V) 60 1167 G42 LT1167 TYPICAL PERFOR A CE CHARACTERISTICS Distribution of Output Offset Voltage, TA = - 40C 40 35 PERCENT OF UNITS (%) 165 S8 (3 LOTS) PERCENT OF UNITS (%) 25 20 15 10 5 0 -400 -300 -200 -100 0 100 200 300 400 OUTPUT OFFSET VOLTAGE (V) 1167 G43 20 15 10 5 0 - 200 -150 -100 -50 0 50 100 150 200 OUTPUT OFFSET VOLTAGE (V) 1167 G44 PERCENT OF UNITS (%) 30 Distribution of Input Offset Voltage Drift 30 25 PERCENT OF UNITS (%) 20 15 10 5 0 - 0.4 - 0.3 - 0.2 - 0.1 0 0.1 0.2 INPUT OFFSET VOLTAGE (V) VS = 15V TA = - 40C TO 85C G = 1000 165 S8 (3 LOTS) 40 35 PERCENT OF UNITS (%) 30 25 20 15 10 5 0.3 1167 G46 CHANGE IN OFFSET VOLTAGE (V) Input Bias Current 50 VS = 15V TA = 25C 270 S8 50 INPUT BIAS AND OFFSET CURRENT (pA) 40 PERCENT OF UNITS (%) PERCENT OF UNITS (%) 30 20 10 0 - 100 - 60 20 60 - 20 INPUT BIAS CURRENT (pA) UW VS = 15V TA = - 40C G=1 1167 G10 Distribution of Output Offset Voltage, TA = 25C 30 25 165 S8 (3 LOTS) VS = 15V TA = 25C G=1 40 35 30 25 20 15 10 5 0 Distribution of Output Offset Voltage, TA = 85C 165 S8 (3 LOTS) VS = 15V TA = 85C G=1 -400 -300 -200 -100 0 100 200 300 400 OUTPUT OFFSET VOLTAGE (V) 1167 G45 Distribution of Output Offset Voltage Drift VS = 15V TA = - 40C TO 85C G=1 165 S8 (3 LOTS) 14 12 10 8 Warm-Up Drift VS = 15V TA = 25C G=1 S8 N8 6 4 2 0 0 -5 -4 -3 -2 -1 0 1 2 3 4 OUTPUT OFFSET VOLTAGE (V) 5 0 1 2 3 4 TIME AFTER POWER ON (MINUTES) 5 1167 G47 1167 G09 Input Offset Current VS = 15V TA = 25C 270 S8 Input Bias and Offset Current vs Temperature 500 400 300 200 100 0 - 100 - 200 - 300 - 400 - 500 -75 - 50 -25 0 25 50 75 TEMPERATURE (C) 100 125 1167 G12 VS = 15V VCM = 0V 40 30 IOS IB 20 10 100 0 - 100 - 60 20 60 - 20 INPUT OFFSET CURRENT (pA) 100 1167 G11 7 LT1167 TYPICAL PERFOR A CE CHARACTERISTICS Input Bias Current vs Common Mode Input Voltage 500 400 160 NEGATIVE POWER SUPPLY REJECTION RATIO (dB) COMMON MODE REJECTION RATIO (dB) INPUT BIAS CURRENT (pA) 300 200 100 0 -100 - 200 - 300 - 400 - 500 -15 -12 - 9 - 6 - 3 0 3 6 9 12 15 COMMON MODE INPUT VOLTAGE (V) 1167 G13 85C 0C - 40C 70C 25C Positive Power Supply Rejection Ratio vs Frequency POSITIVE POWER SUPPLY REJECTION RATIO (dB) 160 140 120 100 80 60 40 20 0 0.1 1 10 1k 100 FREQUENCY (Hz) G = 10 G = 100 G=1 V - = - 15V TA = 25C G = 1000 SUPPLY CURRENT (mA) GAIN (dB) Voltage Noise Density vs Frequency 1000 VOLTAGE NOISE DENSITY (nVHz) VS = 15V TA = 25C 1/fCORNER = 10Hz GAIN = 1 1/fCORNER = 9Hz GAIN = 10 10 1/fCORNER = 7Hz GAIN = 100, 1000 NOISE VOLTAGE (2V/DIV) 100 BW LIMIT GAIN = 1000 0 1 10 100 1k FREQUENCY (Hz) 10k 100k 1167 G19 NOISE VOLTAGE (0.2V/DIV) 8 UW 10k Common Mode Rejection Ratio vs Frequency 140 120 100 80 60 40 20 0 0.1 1 10 1k 100 FREQUENCY (Hz) 10k 100k 1167 G14 Negative Power Supply Rejection Ratio vs Frequency 160 140 120 100 80 60 40 20 0 0.1 1 10 1k 100 FREQUENCY (Hz) 10k 100k 1167 G15 G = 1000 G = 100 G = 10 G=1 VS = 15V TA = 25C 1k SOURCE IMBALANCE G = 100 G = 10 G=1 V + = 15V TA = 25C G = 1000 Gain vs Frequency 60 50 40 30 20 10 0 -10 100k G=1 VS = 15V TA = 25C 0.1 1 10 FREQUENCY (kHz) 100 1000 1167 G17 Supply Current vs Supply Voltage 1.50 G = 1000 G = 100 1.25 85C 1.00 25C - 40C 0.75 G = 10 - 20 0.01 0.50 0 10 15 5 SUPPLY VOLTAGE ( V) 20 1167 G18 1167 G16 0.1Hz to 10Hz Noise Voltage, G=1 VS = 15V TA = 25C 0.1Hz to 10Hz Noise Voltage, RTI G = 1000 VS = 15V TA = 25C 0 1 2 3 456 TIME (SEC) 7 8 9 10 0 1 2 3 456 TIME (SEC) 7 8 9 10 1167 G20 1167 G21 LT1167 TYPICAL PERFOR A CE CHARACTERISTICS Current Noise Density vs Frequency 1000 CURRENT NOISE DENSITY (fA/Hz) OUTPUT CURRENT (mA) (SINK) (SOURCE) CURRENT NOISE (5pA/DIV) 100 RS 10 1 10 100 FREQUENCY (Hz) 1000 1167 G22 Overshoot vs Capacitive Load 100 90 80 VS = 15V VOUT = 50mV RL = OVERSHOOT (%) 60 50 40 30 20 10 0 10 AV = 10 AV 100 100 1000 CAPACITIVE LOAD (pF) 10000 1167 G25 AV = 1 G=1 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G28 20mV/DIV 70 5V/DIV Output Impedance vs Frequency 1000 VS = 15V TA = 25C G = 1 TO 1000 OUTPUT IMPEDANCE () 100 10 1 0.1 1 10 100 FREQUENCY (kHz) 1000 1167 G26 G = 10 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G31 20mV/DIV 5V/DIV UW VS = 15V TA = 25C 0.1Hz to 10Hz Current Noise VS = 15V TA = 25C 50 40 30 20 10 0 - 10 - 20 - 30 - 40 - 50 Short-Circuit Current vs Time VS = 15V TA = - 40C TA = 25C TA = 85C TA = 85C TA = - 40C TA = 25C 0 1 2 3 456 TIME (SEC) 7 8 9 10 2 1 0 3 TIME FROM OUTPUT SHORT TO GROUND (MINUTES) 1167 G24 1167 G23 Large-Signal Transient Response Small-Signal Transient Response G=1 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G29 Large-Signal Transient Response Small-Signal Transient Response G = 10 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G32 9 LT1167 TYPICAL PERFOR A CE CHARACTERISTICS Undistorted Output Swing vs Frequency 35 PEAK-TO-PEAK OUTPUT SWING (V) 30 G = 10, 100, 1000 G=1 25 20 15 10 5 0 1 10 100 FREQUENCY (kHz) 1000 1167 G27 20mV/DIV 5V/DIV Settling Time vs Gain 1000 VS = 15V TA = 25C VOUT = 10V 1mV = 0.01% SETTLING TIME (s) 10 5V/DIV 100 1 1 10 GAIN (dB) 1167 G30 100 1000 G = 1000 VS = 15V RL = 2k CL = 60pF 50s/DIV 1167 G37 20mV/DIV Settling Time vs Step Size 10 8 6 OUTPUT STEP (V) 1.6 OUTPUT VOLTAGE SWING (V) (REFERRED TO SUPPLY VOLTAGE) SLEW RATE (V/s) 4 2 0 -2 -4 -6 -8 -10 2 VS = 15 G=1 TA = 25C CL = 30pF RL = 1k TO 0.1% TO 0.01% 0V 0V VOUT 1.4 + SLEW 1.2 - SLEW 1.0 TO 0.01% TO 0.1% 3 4 5 6 7 8 9 10 11 12 SETTLING TIME (s) 1167 G33 10 UW VS = 15V TA = 25C Large-Signal Transient Response Small-Signal Transient Response G = 100 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G34 G = 100 VS = 15V RL = 2k CL = 60pF 10s/DIV 1167 G35 Large-Signal Transient Response Small-Signal Transient Response G = 1000 VS = 15V RL = 2k CL = 60pF 50s/DIV 1167 G38 Slew Rate vs Temperature 1.8 VS = 15V VOUT = 10V G=1 Output Voltage Swing vs Load Current + VS + VS - 0.5 + VS - 1.0 + VS - 1.5 + VS - 2.0 - VS + 2.0 - VS + 1.5 - VS + 1.0 - VS + 0.5 - VS 0.01 0.1 1 10 OUTPUT CURRENT (mA) 100 1167 G39 VS = 15V 85C 25C - 40C SOURCE VOUT SINK 0.8 - 50 -25 50 0 75 25 TEMPERATURE (C) 100 125 1167 G36 LT1167 BLOCK DIAGRAM R3 400 -IN 2 Q1 V- RG 1 RG 8 V+ VB + A2 R7 10k R4 400 +IN 3 Q2 - C2 V- R2 24.7k 7 4 PREAMP STAGE DIFFERENCE AMPLIFIER STAGE V+ V- V- Figure 1. Block Diagram THEORY OF OPERATIO The LT1167 is a modified version of the three op amp instrumentation amplifier. Laser trimming and monolithic construction allow tight matching and tracking of circuit parameters over the specified temperature range. Refer to the block diagram (Figure 1) to understand the following circuit description. The collector currents in Q1 and Q2 are trimmed to minimize offset voltage drift, thus assuring a high level of performance. R1 and R2 are trimmed to an absolute value of 24.7k to assure that the gain can be set accurately (0.05% at G = 100) with only one external resistor RG. The value of RG in parallel with R1 (R2) determines the transconductance of the preamp stage. As RG is reduced for larger programmed gains, the transconductance of the input preamp stage increases to that of the input transistors Q1 and Q2. This increases the open-loop gain when the programmed gain is increased, reducing the input referred gain related errors and noise. The input voltage noise at gains greater than 50 is determined only by Q1 and Q2. At lower gains the noise of the difference amplifier and preamp gain setting resistors increase the noise. The gain bandwidth product is determined by C1, C2 and the preamp transconductance which increases with programmed gain. Therefore, the bandwidth does not drop proportional to gain. The input transistors Q1 and Q2 offer excellent matching, which is inherent in NPN bipolar transistors, as well as picoampere input bias current due to superbeta processing. The collector currents in Q1 and Q2 are held constant due to the feedback through the Q1-A1-R1 loop and Q2-A2-R2 loop which in turn impresses the differential input voltage across the external gain set resistor RG. Since the current that flows through RG also flows through R1 and R2, the ratios provide a gained-up differential voltage,G = (R1 + R2)/RG, to the unity-gain difference amplifier A3. The common mode voltage is removed by A3, resulting in a single-ended output voltage referenced to the voltage on the REF pin. The resulting gain equation is: VOUT - VREF = G(VIN+ - VIN-) where: G = (49.4k / RG) + 1 solving for the gain set resistor gives: RG = 49.4k /(G - 1) + - U W V+ VB + A1 R5 10k R6 10k 6 OUTPUT - C1 R1 24.7k A3 V- R8 10k 5 REF 1167 F01 11 LT1167 THEORY OF OPERATIO Input and Output Offset Voltage The offset voltage of the LT1167 has two components: the output offset and the input offset. The total offset voltage referred to the input (RTI) is found by dividing the output offset by the programmed gain (G) and adding it to the input offset. At high gains the input offset voltage dominates, whereas at low gains the output offset voltage dominates. The total offset voltage is: Total input offset voltage (RTI) = input offset + (output offset/G) Total output offset voltage (RTO) = (input offset * G) + output offset Reference Terminal The reference terminal is one end of one of the four 10k resistors around the difference amplifier. The output voltage of the LT1167 (Pin 6) is referenced to the voltage on the reference terminal (Pin 5). Resistance in series with the REF pin must be minimized for best common mode rejection. For example, a 2 resistance from the REF pin to ground will not only increase the gain error by 0.02% but will lower the CMRR to 80dB. Single Supply Operation For single supply operation, the REF pin can be at the same potential as the negative supply (Pin 4) provided the output of the instrumentation amplifier remains inside the specified operating range and that one of the inputs is at least 2.5V above ground. The barometer application on the front page of this data sheet is an example that satisfies these conditions. The resistance Rb from the bridge transducer to ground sets the operating current for the bridge and also has the effect of raising the input common mode voltage. The output of the LT1167 is always inside the specified range since the barometric pressure rarely goes low enough to cause the output to rail (30.00 inches of Hg corresponds to 3.000V). For applications that require the output to swing at or below the REF potential, the voltage on the REF pin can be level shifted. An op amp is used to buffer the voltage on the REF pin since a parasitic series resistance will degrade the CMRR. The application in the back of this data sheet, Four Digit Pressure Sensor, is an example. -IN 1 RG 8 +IN 1 10mV ADJUSTMENT RANGE 1/2 LT1112 Figure 2. Optional Trimming of Output Offset Voltage Input Bias Current Return Path The low input bias current of the LT1167 (350pA) and the high input impedance (200G) allow the use of high impedance sources without introducing additional offset voltage errors, even when the full common mode range is required. However, a path must be provided for the input bias currents of both inputs when a purely differential signal is being amplified. Without this path the inputs will float to either rail and exceed the input common mode range of the LT1167, resulting in a saturated input stage. Figure 3 shows three examples of an input bias current path. The first example is of a purely differential signal source with a 10k input current path to ground. Since the impedance of the signal source is low, only one resistor is needed. Two matching resistors are needed for higher impedance signal sources as shown in the second example. Balancing the input impedance improves both common mode rejection and DC offset. The need for input resistors is eliminated if a center tap is present as shown in the third example. 12 - + + 3 - U Output Offset Trimming The LT1167 is laser trimmed for low offset voltage so that no external offset trimming is required for most applications. In the event that the offset needs to be adjusted, the circuit in Figure 2 is an example of an optional offset adjust circuit. The op amp buffer provides a low impedance to the REF pin where resistance must be kept to minimum for best CMRR and lowest gain error. 2 LT1167 REF 5 2 10mV 100 3 10k 100 -10mV 6 OUTPUT V+ V- 1167 F02 LT1167 THEORY OF OPERATIO - THERMOCOUPLE RG LT1167 MICROPHONE, HYDROPHONE, ETC RG 10k LT1167 RG 200k 200k CENTER-TAP PROVIDES BIAS CURRENT RETURN 1167 F03 Figure 3. Providing an Input Common Mode Current Path APPLICATIONS INFORMATION The LT1167 is a low power precision instrumentation amplifier that requires only one external resistor to accurately set the gain anywhere from 1 to 1000. The output can handle capacitive loads up to 1000pF in any gain configuration and the inputs are protected against ESD strikes up to 16kV (human body). Input Protection The LT1167 can safely handle up to 20mA of input current in an overload condition. Adding an external 20k input resistor in series with each input allows DC input fault voltages up to 400V and improves the ESD immunity to 4kV, which is the IEC 1004-2 level 2 specification for contact and air discharge. If a higher level of ESD protection or lower value input resistors are needed, a clamp diode from the positive supply to each input will increase the IEC 1004-2 specification to level 4 for both air and contact discharge. A 2N4393 drain/source to gate is a VCC J1 2N4393 RIN VCC J2 2N4393 OPTIONAL FOR HIGHEST ESD PROTECTION VCC good low leakage diode for use with 1k resistors, see Figure 4. The input resistors should be carbon and not metal film or carbon film. RFI Reduction In many industrial and data acquisition applications, instrumentation amplifiers are used to accurately amplify small signals in the presence of large common mode voltages or high levels of noise. Typically, the sources of these very small signals (on the order of microvolts or millivolts) are sensors that can be a significant distance from the signal conditioning circuit. Although these sensors may be connected to signal conditioning circuitry, using shielded or unshielded twisted-pair cabling, the cabling may act as antennae, conveying very high frequency interference directly into the input stage of the LT1167. The amplitude and frequency of the interference can have an adverse effect on an instrumentation amplifier's input stage by causing an unwanted DC shift in the amplifier's input offset voltage. This well known effect is called RFI rectification and is produced when out-of-band interference is coupled (inductively, capacitively or via radiation) and rectified by the instrumentation amplifier's input transistors. These transistors act as high frequency signal detectors, in the same way diodes were used as RF envelope detectors in early radio designs. Regardless of the type of interference or the method by which it is coupled into the circuit, an out-of-band error signal appears in series with the instrumentation amplifier's inputs. RG RIN LT1167 OUT REF VEE 1167 F04 Figure 4. Input Protection - LT1167 + - + U U W + - U U + 13 LT1167 APPLICATIONS INFORMATION To significantly reduce the effect of these out-of-band signals on the input offset voltage of instrumentation amplifiers, simple lowpass filters can be used at the inputs. This filter should be located very close to the input pins of the circuit. An effective filter configuration is illustrated in Figure 5, where three capacitors have been added to the inputs of the LT1167. Capacitors CXCM1 and CXCM2 form lowpass filters with the external series resistors RS1, 2 to any out-of-band signal appearing on each of the input traces. Capacitor CXD forms a filter to reduce any unwanted signal that would appear across the input traces. An added benefit to using CXD is that the circuit's AC common mode rejection is not degraded due to common mode capacitive imbalance. The differential mode and common mode time constants associated with the capacitors are: tDM(LPF) = (2)(RS)(CXD) tCM(LPF) = (RS1, 2)(CXCM1, 2) Setting the time constants requires a knowledge of the frequency, or frequencies of the interference. Once this frequency is known, the common mode time constants can be set followed by the differential mode time constant. To avoid any possibility of inadvertently affecting the signal to be processed, set the differential mode time constant an order of magnitude (or more) larger than the common mode time constant. To avoid any possibility of common mode to differential mode signal conversion, match the common mode time constants to 1% or better. If the sensor is an RTD or a resistive strain gauge, then the series resistors RS1, 2 can be omitted, if the sensor is in proximity to the instrumentation amplifier. "Roll Your Own"--Discrete vs Monolithic LT1167 Error Budget Analysis The LT1167 offers performance superior to that of "roll your own" three op amp discrete designs. A typical application that amplifies and buffers a bridge transducer's differential output is shown in Figure 6. The amplifier, with its gain set to 100, amplifies a differential, full-scale output voltage of 20mV over the industrial range. To make the comparison challenging, the low cost version of the LT1167 will be compared to a discrete instrumentation amp made with the A grade of one of the best precision quad op amps, the LT1114A. The LT1167C outperforms the discrete amplifier that has lower VOS, lower IB and comparable VOS drift. The error budget comparison in Table 1 shows how various errors are calculated and how each error affects the total error budget. The table shows the greatest differences between the discrete solution and the LT1167 are input offset voltage and CMRR. Note that for the discrete solution, the noise voltage specification is multiplied by 2 which is the RMS sum of the uncorelated noise of the two input amplifiers. Each of the amplifier errors is referenced to a full-scale bridge differential voltage of 20mV. The common mode range of the bridge is 5V. The LT1114 data sheet provides offset voltage, offset voltage drift and offset current specifications for the matched op amp pairs used in the error-budget table. Even with an excellent matching op amp like the LT1114, the discrete solution's total error is significantly higher than the LT1167's total error. The LT1167 has additional advantages over the discrete design, including lower component cost and smaller size. CXD 10pF RS2 1.6k CXCM2 100pF EXTERNAL RFI FILTER RG Figure 5. Adding a Simple RC Filter at the Inputs to an Instrumentation Amplifier is Effective in Reducing Rectification of High Frequency Out-of-Band Signals 14 - IN - + IN + RS1 CXCM1 1.6k 100pF V+ LT1167 V- 1167 F05 U W U U VOUT LT1167 APPLICATIONS INFORMATION + 1/4 LT1114A 10k* 10k* 350 RG 499 LT1167C REF 100** 10k** 350 350 Figure 6. "Roll Your Own" vs LT1167 Table 1. "Roll Your Own" vs LT1167 Error Budget ERROR SOURCE Absolute Accuracy at TA = 25C Input Offset Voltage, V Output Offset Voltage, V Input Offset Current, nA CMR, dB LT1167C CIRCUIT CALCULATION 60V/20mV (300V/100)/20mV [(450pA)(350/2)]/20mV 110dB[(3.16ppm)(5V)]/20mV "ROLL YOUR OWN"' CIRCUIT CALCULATION 100V/20mV [(60V)(2)/100]/20mV [(450pA)(350)/2]/20mV [(0.02% Match)(5V)]/20mV Total Absolute Error Drift to 85C Gain Drift, ppm/C Input Offset Voltage Drift, V/C Output Offset Voltage Drift, V/C ERROR, ppm OF FULL SCALE LT1167C "ROLL YOUR OWN" 3000 150 4 790 3944 5000 60 4 500 5564 (50ppm + 10ppm)(60C) [(0.4V/C)(60C)]/20mV [6V/C)(60C)]/100/20mV (100ppm/C Track)(60C) [(1.6V/C)(60C)]/20mV [(1.1V/C)(2)(60C)]/100/20mV Total Drift Error Resolution Gain Nonlinearity, ppm of Full Scale Typ 0.1Hz to 10Hz Voltage Noise, VP-P 15ppm 0.28VP-P/20mV 10ppm (0.3VP-P)( 2)/20mV Total Resolution Error Grand Total Error G = 100, VS = 15V All errors are min/max and referred to input. + PRECISION BRIDGE TRANSDUCER LT1167 MONOLITHIC INSTRUMENTATION AMPLIFIER G = 100, RG = 10ppm TC SUPPLY CURRENT = 1.3mA MAX 1/4 LT1114A 10k* "ROLL YOUR OWN" INST AMP, G = 100 * 0.02 RESISTOR MATCH, 3ppm/C TRACKING ** DISCRETE 1% RESISTOR, 100ppm/C TC 100ppm TRACKING SUPPLY CURRENT = 1.35mA FOR 3 AMPLIFIERS 1167 F06 3600 1200 180 4980 15 14 29 8953 + - 350 - + 10V U - W U U - 10k** 1/4 LT1114A 10k* 6000 4800 66 10866 10 21 31 16461 15 LT1167 APPLICATIONS INFORMATION Current Source Figure 7 shows a simple, accurate, low power programmable current source. The differential voltage across Pins 2 and 3 is mirrored across RG. The voltage across RG is amplified and applied across RX, defining the output current. The 50A bias current flowing from Pin 5 is buffered by the LT1464 JFET operational amplifier. This has the effect of improving the resolution of the current source to 3pA, which is the maximum IB of the LT1464A. Replacing RG with a programmable resistor greatly increases the range of available output currents. 3 8 VS +IN + 7 6 REF 5 VX IL RX RG 1 -IN 2 LT1167 - 4 2 -V S 1 1/2 LT1464 3 [(+IN) - (-IN)]G V IL = X = RX RX G= 49.4k +1 RG LOAD 1167 F07 Figure 7. Precision Voltage-to-Current Converter PATIENT/CIRCUIT PROTECTION/ISOLATION +IN C1 0.01F R2 1M R1 12k R3 30k R4 30k 2 RG 6k 1 2 PATIENT GROUND 1 1/2 LT1112 3 AV = 101 POLE AT 1kHz -IN Figure 8. Nerve Impulse Amplifier 16 U 3 8 - + W - + U U Nerve Impulse Amplifier The LT1167's low current noise makes it ideal for high source impedance EMG monitors. Demonstrating the LT1167's ability to amplify low level signals, the circuit in Figure 8 takes advantage of the amplifier's high gain and low noise operation. This circuit amplifies the low level nerve impulse signals received from a patient at Pins 2 and 3. RG and the parallel combination of R3 and R4 set a gain of ten. The potential on LT1112's Pin 1 creates a ground for the common mode signal. C1 was chosen to maintain the stability of the patient ground. The LT1167's high CMRR ensures that the desired differential signal is amplified and unwanted common mode signals are attenuated. Since the DC portion of the signal is not important, R6 and C2 make up a 0.3Hz highpass filter. The AC signal at LT1112's Pin 5 is amplified by a gain of 101 set by (R7/R8) +1. The parallel combination of C3 and R7 form a lowpass filter that decreases this gain at frequencies above 1kHz. The ability to operate at 3V on 0.9mA of supply current makes the LT1167 ideal for battery-powered applications. Total supply current for this application is 1.7mA. Proper safeguards, such as isolation, must be added to this circuit to protect the patient from possible harm. 3V + 7 C2 0.47F LT1167 G = 10 5 6 0.3Hz HIGHPASS 3V 5 R6 1M + - 8 1/2 LT1112 4 -3V 7 OUTPUT 1V/mV 6 - 4 -3V R8 100 R7 10k C3 15nF 1167 F08 LT1167 APPLICATIONS INFORMATION Low IB Favors High Impedance Bridges, Lowers Dissipation The LT1167's low supply current, low supply voltage operation and low input bias currents optimize it for battery-powered applications. Low overall power dissipation necessitates using higher impedance bridges. The single supply pressure monitor application (Figure 9) shows the LT1167 connected to the differential output of a 3.5k bridge. The bridge's impedance is almost an order of magnitude higher than that of the bridge used in the error-budget table. The picoampere input bias currents keep the error caused by offset current to a negligible level. The LT1112 level shifts the LT1167's reference pin and the ADC's analog ground pins above ground. The LT1167's and LT1112's combined power dissipation is still less than the bridge's. This circuit's total supply current is just 2.8mA. 5V 1 3.5k 3.5k G = 200 249 3.5k 3.5k 3 8 + LT1167 1 2 5 - 4 Figure 9. Single Supply Pressure Monitor U W U U BI TECHNOLOGIES 67-8-3 R40KQ (0.02% RATIO MATCH) 40k 7 REF 6 20k 3 40k 2 IN ADC LTC(R)1286 1 AGND DIGITAL DATA OUTPUT + 1/2 LT1112 - 1167 F09 17 LT1167 TYPICAL APPLICATION U -IN 2 1 - LT1167 6 C1 0.1F R1 1M RG 8 +IN 3 OUTPUT REF + 5 2 f -3dB = 1 (2)(R1)(C1) 1167 TA04 1 1/2 LT1124 18 - + 3 = 1.59Hz LT1167 PACKAGE DESCRIPTION 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP 0.016 - 0.050 0.406 - 1.270 *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE U Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 - 0.197* (4.801 - 5.004) 8 7 6 5 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 1 0.053 - 0.069 (1.346 - 1.752) 2 3 4 0.004 - 0.010 (0.101 - 0.254) 0.014 - 0.019 (0.355 - 0.483) 0.050 (1.270) TYP SO8 0996 19 LT1167 TYPICAL APPLICATION 4-Digit Pressure Sensor 9V R8 392k 2 LT1634CCZ-1.25 1 2 3 + - 4 1 4 1/4 LT1114 11 0.2% ACCURACY AT ROOM TEMP 1.2% ACCURACY AT 0C TO 60C VOLTS 2.800 3.000 3.200 INCHES Hg 28.00 30.00 32.00 RELATED PARTS PART NUMBER LTC1100 LT1101 LT1102 LTC(R)1418 LT1460 LTC1562 LTC1605 DESCRIPTION Precision Chopper-Stabilized Instrumentation Amplifier Precision, Micropower, Single Supply Instrumentation Amplifier High Speed, JFET Instrumentation Amplifier 14-Bit, Low Power, 200ksps ADC with Serial and Parallel I/O Precision Series Reference Active RC Filter 16-Bit, 100ksps, Sampling ADC COMMENTS Best DC Accuracy Fixed Gain of 10 or 100, IS < 105A Fixed Gain of 10 or 100, 30V/s Slew Rate Single Supply 5V or 5V Operation, 1.5LSB INL and 1LSB DNL Max Micropower; 2.5V, 5V, 10V Versions; High Precision Lowpass, Bandpass, Highpass Responses; Low Noise, Low Distortion, Four 2nd Order Filter Sections Single 5V Supply, Bipolar Input Range: 10V, Power Dissipation: 55mW Typ 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com U LUCAS NOVA SENOR NPC-1220-015A-3L 9V 1 R1 825 R2 12 8 3 2 1 LT1167 G = 60 5 - 5k 5k - 7 6 R9 1k 2 6 5k 5k RSET 5 + 3 + 4 10 + 1/4 LT1114 8 TO 4-DIGIT DVM 9 12 + 1/4 LT1114 14 - R6 50k R7 180k 13 - R4 100k R5 100k R3 51k C1 1F 1167 TA03 1167i LT/GP 0698 4K * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 1998 |
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