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HV220/HV20220/HV20320 HV220/HV20220/HV20320
Low Charge Injection 8-Channel High Voltage Analog Switches
Features
HVCMOS(R) technology for high performance Very low quiescent power dissipation - 10A Output on-resistance typically 22 ohms Low parasitic capacitances DC to 10MHz analog signal frequency -60dB typical output off isolation at 5MHz CMOS logic circuitry for low power Excellent noise immunity On-chip shift register, latch and clear logic circuitry Flexible high voltage supplies
General Description
These devices are low charge injection 8-channel high-voltage analog switch integrated circuits (ICs) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and printers. Input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. To reduce any possible clock feed-through noise, Latch Enable Bar (LE) should be left high until all bits are clocked in. Using HVCMOS technology, these switches combine high voltage bilateral DMOS switches and low power CMOS logic to provide efficient control of high voltage analog signals. These ICs are suitable for various combinations of high voltage supplies, e.g., VPP/VNN : +50V/-150V, or +100V/-100V.B

Applications
Medical ultrasound imaging Piezoelectric transducer drivers
LATCHES D LE CL DIN
Block Diagram
LEVEL SHIFTERS
OUTPUT SWITCHES
SW0
D LE CL CLK D LE CL
SW1
SW2
D LE CL 8 BIT SHIFT REGISTER D LE CL
SW3
SW4
D LE CL
SW5
DOUT
D LE CL
SW6
D LE CL
SW7
VDD
LE
CL
V NN V PP
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A011705
1
HV220/HV20220/HV20320
Absolute Maximum Ratings*
VDD Logic power supply voltage VPP - VNN Supply voltage VPP Positive high voltage supply VNN Negative high voltage supply Logic input voltages Analog Signal Range Peak analog signal current/channel Storage temperature Power dissipation: 28-Lead PLCC 48-Lead TQFP 26-Lead BCC 25-Lead FPBGA 1.2W 1.0W 1.0W 1.0W -0.5V to +15V 220V -0.5V to VNN +200V +0.5V to -200V -0.5V to VDD +0.3V VNN to VPP 3.0A -65C to +150C
* Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Ordering Information
Package Options Device HV20220 28-Lead PLCC HV20220PJ HV20220PJ-G HV20320PJ HV20320PJ-G 48-Lead TQFP HV20220FG HV20220FG-G 26-Lead BCC 25-Lead FPBGA -
HV20320
HV220B1-G
HV220GA HV220GA-G
HV220
-
-G indicates the part is RoHS compliant (Green)
Operating Conditions
Symbol VDD VPP VNN VIH VIL VSIG TA
Notes: 1 Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last. 2 VSIG must be V NN VSIG VPP or floating during power up/down transition. 3 Rise and fall times of power supplies VDD, VPP , and VNN should not be less than 1.0msec. B021706
Parameter Logic power supply voltage1, 3 Positive high voltage supply1, 3 supply1, 3
Value 4.5V to 13.2V 40V to VNN+ 200V -40V to -160V VDD -1.5V to VDD 0V to 1.5V VNN +10V to VPP -10V2 0C to 70C
Negative high voltage
High-level input voltage Low-level input voltage Analog signal voltage peak to peak Operating free air-temperature
2
HV220/HV20220/HV20320
Truth Table
D0 L H L H L H L H L H L H L H L H X X D1 D2 D3 D4 D5 D6 D7 LE L L L L L L L L L L L L L L L L H X CL L L L L L L L L L L L L L L L L L H SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7 OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON OFF ON HOLD PREVIOUS STATE OFF OFF OFF OFF OFF OFF OFF OFF
X X
Notes:
X X
X X
X X
X X
X X
X X
1. The eight switches operate independently. 2. Serial data is clocked in on the L to H transition CLK. 3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch. 4. DOUT is high when data in shift register 7 is high. 5. Shift register clocking has no effect on the switch states if LE is H. 6. The clear input overrides all other inputs.
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HV220/HV20220/HV20320 Electrical Characteristics
DC Characteristics (over recommended operating conditions unless otherwise noted)
Characteristics Sym 0C min max 30 25 Small Signal Switch (ON) Resistance RONS 25 18 23 22 Small Signal Switch (ON) Resistance Matching Large Signal Switch (ON) Resistance Switch Off Leakage Per Switch DC Offset Switch Off DC Offset Switch On Pos. HV Supply Current Neg. HV Supply Current Pos. HV Supply Current Neg. HV Supply Current Switch Output Peak Current Output Switch Frequency fSW 6.5 IPP Supply Current IPP 4.0 4.0 6.5 INN Supply Current INN 4.0 4.0 Logic Supply Average Current Logic Supply Quiescent Current Data Out Source Current Data Out Sink Current Logic Input Capacitance IDD IDDQ ISOR ISINK CIN 0.45 0.45 10 4.0 10 0.45 0.45 0.70 0.70 10 IPPQ INNQ IPPQ INNQ 3.0 RONS RONL ISOL 5.0 300 500 20 min +25C typ* 26 22 22 18 20 16 5.0 15 1.0 100 100 10 -10 10 -10 3.0 10 300 500 50 -50 50 -50 2.0 50 7.0 5.0 5.0 7.0 5.0 5.0 4.0 10 0.40 0.40 10 8.0 5.5 5.5 8.0 5.5 5.5 4.0 10 mA A mA mA pF VOUT = VDD - 0.7V VOUT = 0.7V mA mA 2.0 15 300 500 max 38 27 27 24 25 25 20 +70C min max 48 32 30 27 30 27 20 % ohms A mV mV A A A A A KHz ohms Units Test Conditions ISIG = 5mA ISIG = 200mA ISIG = 5mA ISIG = 200mA ISIG = 5mA ISIG = 200mA VPP = 40V, VNN = -160V VPP = 100V, VNN = -100V VPP = 160V, VNN = -40V
ISW = 5mA, VPP = 100V, VNN = -100V VSIG = VPP - 10V, ISIG = 1A VSIG = VPP - 10V and VNN +10V RL = 100 RL = 100K ALL SWs OFF ALL SWs OFF ALL SWs ON ISW = 5mA ALL SWs ON ISW = 5mA VSIG duty cycle 0.1% Duty Cycle = 50% VPP = 40V, VNN = -160V VPP = 100V, VNN = -100V VPP = 160V, VNN = -40V VPP = 40V, VNN = -160V VPP = 100V, VNN = -100V VPP = 160V, VNN = -40V fCLK = 5MHz, VDD = 5.0V 50KHz Output Switching Frequency with no load
* Typical values are only for HV202/HV203
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HV220/HV20220/HV20320 Electrical Characteristics
AC Characteristics
Characteristics Set Up Time Before LE Rises Time Width of LE Clock Delay Time to Data Out Time Width of CL Set Up Time Data to Clock Hold Time Data from Clock Clock Freq Clock Rise and Fall Times Turn On Time Turn Off Time (over operating conditions VDD = 5V, unless otherwise noted) Sym tSD tWLE tDO tWCL tSU th fCLK tr, tf tON tOFF 150 15 35 5.0 50 5.0 5.0 20 Maximum VSIG Slew Rate dv/dt 20 20 Off Isolation KO -30 -58 Switch Crosstalk Output Switch Isolation Diode Current Off Capacitance SW to GND On Capacitance SW to GND KCR IID CSG(OFF) CSG(ON) 5.0 25 -60 300 17 50 5.0 25 12 38 -30 -58 -60 -70 300 17 50 5.0 25 -33 0C min 150 150 150 150 15 35 5.0 50 5.0 5.0 20 20 20 -30 -58 -60 300 17 50 8.0 max min 150 150 150 150 20 35 5.0 50 5.0 5.0 20 20 20 dB dB dB mA pF pF V/ns +25C typ* max min 150 150 150 +70C max Units ns ns ns ns ns ns MHz ns s s VSIG = VPP -10V, RL = 10K VSIG = VPP -10V, RL = 10K VPP = 160V, VNN = -40V VPP = 100V, VNN = -100V VPP = 40V, VNN = -160V f = 5MHz, 1K//15pF load f = 5MHz, 50 load f = 5MHz, 50 load 300ns pulse width, 2.0% duty cycle 0V, 1MHz 0V, 1MHz 50% duty cycle fDATA = fCLK/2 Test Conditions
Electrical Characteristics
AC Characteristics (over operating conditions VDD = 5V, unless otherwise noted)
Characteristics Output Voltage Spike Sym min +VSPK - VSPK +VSPK - VSPK +VSPK - VSPK Charge Injection Q 820 600 350 pC +25C typ* max 150 150 150 150 150 150 VPP = 160V, VNN = -40V, RL = 50 VPP = 40V, VNN = -160V, VSIG = 0V VPP = 100V, VNN = -100V, VSIG = 0V VPP = 160V, VNN = -40V, VSIG = 0V
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Units
Test Conditions
VPP = 40V, VNN = -160V, RL = 50 mV VPP = 100V, VNN = -100V, RL = 50
* Typical values are only for HV202/HV203
5
HV220/HV20220/HV20320
Test Circuits
VPP -10V RL 10K
VPP -10V
ISOL
VOUT
VOUT
VNN +10V
100K
RL
VPP VNN
VPP VNN
VDD
GND
5V
VPP VNN
VPP VNN
VDD
GND
5V
VPP
VNN
VPP VNN
VDD
GND
5V
Switch OFF Leakage
DC Offset ON/OFF
TON /TOFF Test Circuit
VIN = 10 VP-P @5MHz
VSIG
VOUT RL
VIN = 10 VP-P @5MHz
IID
VNN
50 NC
50
VPP VNN
VPP VNN
VDD GND
5V
VPP VNN
VPP VNN
VDD
GND
5V
VPP VNN
VPP VNN
VDD GND
5V
KO = 20Log
VOUT VIN
KCR = 20Log
VOUT VIN
OFF Isolation
Isolation Diode Current
Crosstalk
VOUT
VOUT
+VSPK
VOUT
-V SPK
50
1000pF
VSIG
1K RL
VPP VNN
VPP VNN
VDD
GND
5V
VPP VNN
VPP VNN
VDD
GND
5V
Q = 1000pF x VOUT
Charge Injection
Output Voltage Spike
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6
HV220/HV20220/HV20320
Logic Timing Waveforms
DN-1 DATA IN LE
50% 50% t WLE t SD 50%
DN
50%
DN+1
CLOCK
50% t SU t t h 50%
DD
DATA OUT
50% t t ON
OFF
VOUT OFF
(TYP)
90%
ON
10%
50%
50%
CLR
t WCL
Block Diagram
DIN
LATCHES D LE CL
LEVEL SHIFTERS
OUTPUT SWITCHES
SW0
D LE CL CLK D LE CL
SW1
SW2
D LE CL 8 BIT SHIFT REGISTER D LE CL
SW3
SW4
D LE CL
SW5
DOUT
D LE CL
SW6
D LE CL
SW7
VDD
LE
CL
V NN V PP
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HV220/HV20220/HV20320
Typical Performance Curves for HV20220 & HV20320
IDD vs Clock Frequency VDD = 5.0V, VPP/VNN = 100V, TA = 0C to 70C
3.0 -80.0
Off-Isolation vs. Signal Voltage Frequency
VDD = 5.0V, VPP/VNN = 100V
-75.0 TA = 70C
Off-Isolation (dB)
TA = 0C 10 1000 10000
IDD Current (mA)
2.0
-70.0
-65.0
1.0
-60.0
-55.0
0.0 100
-50.0 1.0 10.0
CLK Frequency (KHz) RON vs. Ambient Temperature TA
VDD = 5.0V, VPP/VNN = 100V 40.0 50.0
Signal Voltage Frequency (MHz) RON vs. VPP/VNN
VDD = 5.0V
ISW = 5mA 30.0
TA = 125C 40.0
RON (ohms) @5mA
TA = 85C 30.0
RON (ohms)
20.0 ISW = 200mA 10.0
TA = 25C 20.0 TA = 0C 10.0
0 -50 -25 0 25 50 75 100 125 150
0 VPP 40V VNN -160V 60V -140V 80V -120V 100V -100V 120V -80V 140V -60V 160V -40V
Ambient Temperature (oC) TDO vs. Ambient Temperature TA
VPP/VNN = 100V 100 VDD = 5.0V 80
IPP/INN vs. Output Switching Frequency
VDD = 5.0V, VPP/VNN = 100V 5 TA = 0 o C
IPP/INN Average Current (mA)
TA = 25oC 4 TA = 70oC TA = 125oC 3
TDO (ns)
60 VDD = 13.5V 40
2
20
1
0 -50 -25 0 25 50 75 100 125
0 0 25 50 75 100 125 150
Ambient Temp TA (C)
Output Switching Frequency (KHz)
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8
9
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HV220/HV20220/HV20320
HV202/HV203 28-Pin J-lead Package Outline
0.450 0.005 (11.430 0.127)
D1
Pin Configuration
HV202 28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 N/C 10 VPP 11 N/C 12 VNN 13 GND 14 VDD Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4
Pin #1
D
B
0.480 0.010 (12.192 0.254)
0.027 0.003 (0.6858 0.0762)
e
0.050 0.010 (1.270 0.254) 0.1725 0.0075 (4.3815 0.1905)
A
A2
0.020 min. (0.508)
0.410 0.010 (10.414 0.254) B.C. of Bend Radii
HV203 28 Pin J-Lead Pin Function 1 SW3 2 SW3 3 SW2 4 SW2 5 SW1 6 SW1 7 SW0 8 SW0 9 VPP 10 VNN 11 N/C 12 GND 13 VDD 14 N/C
Pin 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Function N/C DIN CLK LE CL DOUT SW7 SW7 SW6 SW6 SW5 SW5 SW4 SW4
Q
0.110 0.010 (2.794 0.254)
25 26 27 28 1 2 3 4 5
24
23
22
21
20
19 18 17 16 15 14 13 12
6
7
8
9
10
11
Measurement Legend =
Top View 28-Pin J-Lead Package
Dimensions in Inches (Dimensions in Millimeters)
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10
48-Pin TQFP
D, E
Pin Configuration
0.354 0.010 (8.992 0.254)
0.024 0.008 (0.610 0.2032)
L
0.354 0.010 (8.992 0.254) 0.275 0.004 (6.985 0.102)
D1, E1
0 - 7
0.275 0.004 (6.985 0.1016)
A
0.059 0.004 (1.4986 0.102)
A2
0.055 0.004 (1.397 0.102)
0.020 BSC (0.508)
0.039 TYP. (0.991)
48-Pin TQFP Pin Function 1 SW5 2 N/C 3 SW4 4 N/C 5 SW4 6 N/C 7 N/C 8 SW3 9 N/C 10 SW3 11 N/C 12 SW2 13 N/C 14 SW2 15 N/C 16 SW1 17 N/C 18 SW1 19 N/C 20 SW0 21 N/C 22 SW0 23 N/C 24 VPP
Pin 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Function VNN N/C N/C GND VDD N/C N/C N/C DIN CLK LE CLR DOUT N/C SW7 N/C SW7 N/C SW6 N/C SW6 N/C SW5 N/C
Pin 1
Pin #1
Pin #1
Measurement Legend =
Dimensions in Inches (Dimensions in Millimeters)
Pin 12
top view 48-pin TQFP
11
B020906
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