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INTEGRATED CIRCUITS 74LVT16652A 3.3V LVT 16-bit bus transceiver/ register (3-State) Product specification Supersedes data of 1994 IC23 Data Handbook 1998 Feb 19 Philips Semiconductors Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A FEATURES * 16-bit bus interface * 3-State buffers * Output capability: +64mA/-32mA * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up * Live insertion/extraction permitted * Power-up reset * Power-up 3-State * No bus current loading when output is tied to 5V bus * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model resistors to hold unused inputs DESCRIPTION The 74LVT16652A is a high-performance BiCMOS product designed for VCC operation at 3.3V. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Complimentary output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. A Low-input level selects real-time data, and a High input level selects stored data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. Data on the A or B bus, or both, can be stored in the internal flip-flops by Low-to-High transitions at the appropriate clock (CPAB or CPBA) inputs regardless of the levels on the select-control or output-enable inputs. When SAB and SBA are in real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last level configuration. QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay nAx to nBx or nBx to nAx Input capacitance Control pins I/O pin capacitance Total supply current CL = 50pF; VCC = 3.3V VI = 0V or 3.0V Outputs disabled; VI = 0V or 3.0V Outputs disabled; VCC = 3.6V CONDITIONS Tamb = 25C TYPICAL 1.9 3 9 70 UNIT ns pF pF A ORDERING INFORMATION PACKAGES 56-Pin Plastic SSOP Type III 56-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT16652A DL 74LVT16652A DGG NORTH AMERICA VT16652A DL VT16652A DGG DWG NUMBER SOT371-1 SOT364-1 LOGIC SYMBOL (IEEE/IEC) 56 1 55 54 2 3 EN1(BA) EN2(AB) C3 G4 C5 G6 52 29 28 30 31 27 26 EN7(BA) EN8(AB) C9 G10 C11 G12 42 5 w1 1 5D 6 4 4 3D 1 15 w1 7 11D 12 1 12 10 9D 10 1 w1 8 w1 2 51 49 48 47 45 44 43 16 17 19 20 21 23 24 16 6 8 9 10 12 13 14 41 40 38 37 36 34 33 SW00158 1998 Feb 19 2 853-1767 18986 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A PIN CONFIGURATION 1OEAB 1CPAB 1SAB GND 1A0 1A1 VCC 1A2 1A3 1A4 GND 1A5 1A6 1A7 2A0 2A1 2A2 GND 2A3 2A4 2A5 VCC 2A6 2A7 GND 2SAB 2CPAB 20EAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OEBA 1CPBA 1SBA GND 1B0 1B1 VCC 1B2 1B3 1B4 GND 1B5 1B6 1B7 2B0 2B1 2B2 GND 2B3 2B4 2B5 VCC 2B6 2B7 GND 2SBA 2CPBA 2OEBA LOGIC SYMBOL 5 6 8 9 10 12 13 14 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2 3 54 55 1CPAB 1SAB 1SBA 1CPBA 1AB 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1OEAB 1OEBA 1 56 52 15 51 16 49 17 48 47 19 20 45 44 21 23 43 24 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 27 26 31 30 2CPAB 2SAB 2SBA 2CPBA 2AB 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2OEAB 2OEBA 28 29 42 41 40 38 37 36 34 33 SH00046 SW00159 PIN DESCRIPTION PIN NUMBER 2, 55, 27, 30 3, 54, 26, 31 5, 6, 8, 9, 10, 12, 13, 14 15, 16, 17, 19, 20, 21, 23, 24 52, 51, 49, 48, 47, 45, 44, 43 42, 41, 40, 38, 37, 36, 34, 33 1, 56, 28, 29 4, 11, 18, 25, 32, 39, 46, 53 7, 22, 35, 50 SYMBOL 1CPAB, 1CPBA, 2CPAB, 2CPBA 1SAB, 1SBA, 2SAB, 2SBA 1A0 - 1A7, 2A0 - 2A7 1B0 - 1B7, 2B0 - 2B7 1OEAB, 1OEBA, 2OEAB, 2OEBA GND VCC NAME AND FUNCTION Clock input A to B / Clock input B to A Select input A to B / Select input B to A Data inputs/outputs (A side) Data inputs/outputs (B side) Output enable inputs Ground (0V) Positive supply voltage 1998 Feb 19 3 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A LOGIC DIAGRAM nOEBA nOEAB nCPBA nSBA nCPAB nSAB 1of 8 Channels 1D C1 Q nA0 1D C1 Q nB0 nA1 nA2 nA3 nA4 nA5 nA6 nA7 DETAIL A X 7 nB1 nB2 nB3 nB4 nB5 nB6 nB7 SH00065 FUNCTION TABLE INPUTS nOEAB L L X H L L L L H H H H L X * ** = = = = nOEBA H H H H X L L L H H L nCPAB H or L H or L X X X H or L H or L nCPBA H or L H or L X H or L X X H or L nSAB X X X ** X X X X L H H nSBA X X X X X ** L H X X H nAx Input Input Unspecified output* Output Input Output DATA I/O nBx Input Unspecified output* Input Input Output Output OPERATING MODE Isolation Store A and B data Store A, Hold B Store A in both registers Hold A, Store B Store B in both registers Real time B data to A bus Stored B data to A bus Real time A data to B bus Store A data to B bus Stored A data to B bus Stored B data to A bus High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers. 1998 Feb 19 4 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74LVT16652A. The select pins determine whether data is stored or transferred through the device in real time. The output enable pins determine the direction of the data flow. REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B STORAGE FROM A, B, OR A AND B A B A B A B nOEAB nOEBA nCPAB nCPBA nSAB nSBA L L X X X L } A 1998 Feb 19 nOEAB nOEBA nCPAB nCPBA nSAB nSBA H H X X L X TRANSFER STORED DATA TO A OR B nOEAB nOEBA nCPAB nCPBA nSAB nSBA H L H|L H|L H H } L L X H nOEAB nOEBA nCPAB nCPBA nSAB nSBA X H X X X X X X X X } B } SH00066 5 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A ABSOLUTE MAXIMUM RATINGS1, 2 SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off or High state Output in Low state DC output current Output in High state Storage temperature range -64 -65 to +150 C VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 mA UNIT V mA V mA V DC output diode current DC output voltage3 NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL VCC VI VIH VIL IOH IO OL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%; f 1kHz Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -32 32 mA 64 10 +85 ns/V C MAX 3.6 5.5 V V V V mA UNIT 1998 Feb 19 6 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK Input clamp voltage VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VOH High-level output voltage VCC = 2.7V; IOH = -8mA VCC = 3.0V; IOH = -32mA VCC = 2.7V; IOL = 100A VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VRST Power-up output low voltage5 VCC = 3.6V; IO = 1mA; VI = GND or VCC VCC = 3.6V; VI = VCC or GND VCC = 0 or 3.6V; VI = 5.5V II Input leakage current VCC = 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF Output off current Bus Hold B H ld current t A or B outputs7 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V IHOLD VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 06 75 -75 500 45 35 0.07 4.9 0.07 0.1 125 100 0.12 6 0.12 0.2 mA mA A A I/O Data pins4 Control pins 0.1 0.1 0.1 0.1 0.1 135 -140 A VCC-0.2 2.4 2.0 TYP1 -0.85 VCC 2.5 2.3 0.07 0.3 0.25 0.3 0.4 0.11 0.1 0.2 0.5 0.4 0.5 0.55 0.55 1 10 20 10 -5 100 A A V V V MAX -1.2 V UNIT NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. ICCZ is measured with outputs pulled to VCC or GND. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. 1998 Feb 19 7 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A AC CHARACTERISTICS GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM MIN fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay nAx to nBx or nBx to nAx Propagation delay nCPAB to nBx or nCPBA to nAx Propagation delay nSAB to nBx or nSBA to nAx Output enable time nOEBA to nAx Output disable time nOEBA to nAx Output enable time nOEAB to nBx Output disable time nOEAB to nBx 1 2 1 3 5 6 5 6 5 6 5 6 150 0.5 0.5 1.5 1.5 1.0 1.0 1.0 1.0 1.5 1.5 1.0 1.0 1.5 1.5 VCC = 3.3V 0.3V TYP1 180 1.9 1.9 2.7 2.4 2.3 2.8 2.7 2.5 3.9 2.9 2.9 2.7 3.1 2.8 3.7 3.7 4.5 4.5 4.8 4.8 4.6 4.6 4.9 4.9 4.6 4.6 4.9 4.9 4.0 4.0 4.9 4.9 5.4 5.4 5.0 5.0 4.8 4.6 5.0 5.0 5.2 4.6 MAX VCC = 2.7V MAX MHz ns ns ns ns ns ns ns UNIT NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C. AC SETUP REQUIREMENTS GND = 0V, tR = 2.5ns, tF = 2.5ns, CL = 50pF, RL = 500, Tamb = -40 C to +85 C LIMITS SYMBOL ts(H) ts(L) th(H) th(L) PARAMETER Setup time 1 nAx to nCPAB, nBx to nCPBA Hold time 1 nAx to nCPAB, nBx to nCPBA WAVEFORM VCC = 3.3V 0.3V MIN 4 4 1 1.0 1.9 1.0 1.0 2.6 2.8 TYP 0.6 0.5 0.4 0.5 2.2 2.4 VCC = 2.7V MIN 1.1 2.4 1.0 1.0 2.6 2.8 ns ns ns UNIT tw(H) Pulse width, High or Low tw(L) nCPAB or nCPBA NOTE: 1. This data sheet limit may vary among suppliers. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V 1/fMAX nCPBA or nCPAB 3.0V or VCC whichever is less VM 0V tw(H) tPHL nAx or nBx VM tw(L) tPLH VOH VM VOL nBx or nAx 3.0V or VCC nAx or nBx VM tPLH VM 0V tPHL VOH VM VM VOL VM VM SH00030 SH00048 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency Waveform 2. Propagation Delay, nAx to nBx or nBx to nAx 1998 Feb 19 8 Philips Semiconductors Product specification 3.3V 16-bit bus transceiver/register (3-State) 74LVT16652A 3.0V or VCC nSBA or nSAB VM tPHL nAx or nBx VM 0V tPLH VOH VM VM VOL 3.0V or VCC whichever is less nOEBA nOEAB tPZH tPHZ VOH VM nAx or nBx 0V VY VM VM 0V SH00050 SH00032 Waveform 3. Propagation Delay, SBA to nAx or SAB to nBx 3.0V or VCC Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level 3.0V or VCC 0V tPZL nAx or nBx tPLZ 3.0V or VCC 0V nOEBA VM nOEAB VM nAx or nBx nCPBA or nCPAB TEST CIRCUIT AND WAVEFORMS 6V VCC OPEN VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE 10% tW VOUT RL GND 90% NEGATIVE PULSE VM 10% tTHL (tF) tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V) SWITCH POSITION TEST tPHZ/tPZH tPLZ/tPZL tPLH/tPHL SWITCH GND 6V open DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 1998 Feb 19 EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E VM VM VM VM ts(H) th(H) ts(L) th(L) VM tW(L) VM NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. 0V 3.0V or VCC 0V VM VX VOL SH00051 SH00049 Waveform 4. Data Setup and Hold Times Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level Test Circuit for 3-State Outputs VM VM = 1.5V Input Pulse Definition INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT16 2.7V Rep. Rate 10MHz tW 500ns tR 2.5ns tF 2.5ns SW00003 9 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) 74LVT16652A SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm SOT371-1 1998 Feb 19 10 Philips Semiconductors Low Voltage Products Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) 74LVT16652A TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm SOT364-1 1998 Feb 19 11 Philips Semiconductors Product specification 3.3V LVT 16-bit bus transceiver and registers (3-State) 74LVT16652A Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03561 Philips Semiconductors yyyy mmm dd 12 |
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