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| Datasheet File OCR Text: |
| CXD2180AR (1/4) IL00D C-MOS 1CHIP CCD COLOR CAMERA SIGNAL PROCESSOR LSI --TOP VIEW-- 75 72 64 61 58 51 GND VDD 76 GND VDD 50 GND 48 79 VDD 82 GND VDD 39 94 VDD GND 29 AGND AVDD AVDD GND 1 3 8 VDD 14 GND 100 AGND 26 17 21 22 25 CXD2180AR (2/4) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 PIN NO. 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 PIN NO. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 PIN NO. 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 I/O O O -- I I I I -- O O O O O -- I I -- O I O -- -- O I O SIGNAL AFY1 AFY0 GND CI3 CI2 CI1 CI0 VDD CO3 CO2 CO1 CO0 NRB GND VBC VREFC AGND IREFC VGC IOC AVDD AVDD IOY VGY IREFY I/O -- I I -- O O O O O O O O O -- I I I I I I I I -- O O SIGNAL AGND VREFY VBY GND DICK YO7 YO6 YO5 YO4 YO3 YO2 YO1 YO0 VDD YI7 YI6 YI5 YI4 YI3 YI2 YI1 YI0 GND FSCO HD I/O O O O O I O O -- O I -- I O -- I I I I I O I -- I I I SIGNAL VD SYNC FLD CBLK VRI AHD AVD GND HCOMP SELVLP GND OSCI OSCO VDD PBV PBSYNC SCK SI XCE SO XCLR GND XV1 XSG1 CLK I/O I I I -- O I -- I I I I I I I I I I I/O -- O O O O O O SIGNAL PBLK ID MCK VDD CLP1 TEST GND AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 DEF DOP/DISP VDD AFY7 AFY6 AFY5 AFY4 AFY3 AFY2 CXD2180AR (3/4) INPUT AD0 - AD8 CI0 - CI3 CLK DEF ID MCK OSCI PBLK PBSYNC PBV SCK SELVLP SI TEST VBC, VGC VGY, VBY VREFC VREFY VRI XCE XCLR XSG1 XV1 YI0 - YI7 OUTPUT AFY0 - AFY7 AHD AVD CBLK CLP1 CO0 - CO3 DICK FLD FSCO HD HCOMP IOC IOY IREFC IREFY NRB OSCO SO SYNC VD YO0 - YO7 : : : : : : : : : : : : : : : : : : : : : : : : DIGITAL SIGNAL DATA CHROMA DIGITAL INTERFACE CLOCK (NTSC : 910fH, PAL : 908fH) DEFECT CORRECTION PULSE LINE COLOR DISCRIMINATION MASTER CLOCK 4fsc OSCILLATOR PRE-BLANKING PULSE PLAY BACK SYNC/EXTERNAL SYNC HD LATCH PULSE SERIAL CLOCK LATCH PULSE SELECT (H : AVD, L : PBV) SERIAL DATA TEST (H : TEST, L : NORMAL) CHROMA DAC CAPACITOR Y DAC CAPACITOR CHROMA DAC REFERENCE VOLTAGE Y DAC REFERENCE VOLTAGE RESET CHIP SELECT CLEAR SENSOR CHARGE READ OUT PULSE VERTICAL REGISTER DRIVE CLOCK Y DIGITAL INTERFACE : : : : : : : : : : : : : : : : : : : : : AF DETECT TG HORIZONTAL DIRECTION SYNC SIGNAL TG VERTICAL DIRECTION SYNC SIGNAL COMPOSITE BLANKING OPB CLAMP PULSE CHROMA DIGITAL INTERFACE DIGITAL INTERFACE CLOCK FIELD DISCRIMINATION SUB CARRIER HORIZONTAL DIRECTION SYNC SIGNAL PLL PHASE COMPARATOR CHROMA SIGNAL Y SIGNAL CHROMA DAC REFERENCE CURRENT Y DAC REFERENCE CURRENT DIGITAL INTERFACE COLOR DISCRIMINATION 4fsc OSCILLATOR SERIAL DATA COMPOSITE SYNC VERTICAL DIRECTION SYNC SIGNAL Y DIGITAL INTERFACE INPUT/OUTPUT DOP/DISP : DROP OUT DETECT/OPD DETECT CXD2180AR (4/4) VTR COMB FILTER 93 Y AFY0 - 7 1, 2, 95 - 100 8 DICK YO0 - 7 YI0 - 7 30 31 - 38 40 - 47 8 8 DOP/DISP Y COMB LUMINANCE SIGNAL PROCESSOR PBSYNC 66 24 C COMB C VTR LDF CLP 27 VGY VREFY VBY IOY IREFY + H APER CON FADER IF SYNC VDL CAM SAMPLING DAC 28 23 25 DEF 92 0H 1H 2H 1H PB AD0 - 8 83 - 91 9 + _ V APER CON DEFECT CORRECTION DEFECT DETECTION OPD INTEGRATION 1HDL REC 1HDL 0H+2H CHROMA SIGNAL PROCESSOR 15 XV1 XSG1 PBLK ID 73 74 76 77 OPDC OPDY WB LPF CLP RGB MATRIX VTR HUE GAIN IF ENC VDL DAC CAM 16 19 18 20 VBC VREFC VGC IREFC IOC X SAMPLING OSCI 62 Y /G/G/R/B 13 9 - 12 4 4-7 4 OSCO WINDOW 63 49 FSCO CLP1 AVD AHD CBLK FLD SYNC HD VD HCOMP NRB CO0 - 3 CI0 - 3 VRI 55 80 AE INTEGRATION AWB INTEGRATION 70 SO SG CLK 75 57 56 54 53 52 OPD XCE SI SCK PBV SELVLP 69 68 67 65 60 SIO MCK XCLR 78 71 50 51 59 L H |
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