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LTC1345 Single Supply V.35 Transceiver
FEATURES
s s s s s
DESCRIPTIO
s s
s s
Single Chip Provides All V.35 Differential Clock and Data Signals Operates From Single 5V Supply Shutdown Mode Reduces ICC to 1A Typ Software Selectable DTE or DCE Configuration Transmitters and Receivers Will Withstand Repeated 10kV ESD Pulses 10MBaud Transmission Rate Transmitter Maintains High Impedance When Disabled, Shut Down, or with Power Off Meets CCITT V.35 Specification Transmitters are Short-Circuit Protected
The LTC(R)1345 is a single chip transceiver that provides the differential clock and data signals for a V.35 interface from a single 5V supply. Combined with an external resistor termination network and an LT (R)1134A RS232 transceiver for the control signals, the LTC1345 forms a complete low power DTE or DCE V.35 interface port operating from a single 5V supply. The LTC1345 features three current output differential transmitters, three differential receivers, and a charge pump. The transceiver can be configured for DTE or DCE operation or shut down using two Select pins. In the Shutdown mode, the supply current is reduced to 1A. The transceiver operates up to 10Mbaud. All transmitters feature short-circuit protection and a Receiver Output Enable pin allows the receiver outputs to be forced into a high impedance state. Both transmitter outputs and receiver inputs feature 10kV ESD protection. The charge pump features a regulated VEE output using three external 1F capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATI
s s s
S
Modems Telecommunications Data Routers
TYPICAL APPLICATION
Clock and Data Signals for V.35 Interface
1F VCC1 5V 3
++
2
1F
DTE
28 27 TXD (103) T SCTE (113) T TXC (114) T RXC (115) T RXD (104) T T T T T T 1F 1 2 3 4 14 13 12 11 10 9 7 8 GND (102) 8 BI 627T500/1250 BI 627T500/1250 12 11 10 9 1 2 3 4 5 6 7
DCE
28 27 1F 18 17 16 15 26 25 24 23 22 21 5 9 VCC2
4
1
1F 6
26 DX 25 24 7 DX 23 20 11 RX 19 18 12 RX 17 16 13 RX 15 5 9 10 VCC1 14
+
+
+
LTC1345
U
1F
U
UO
++
1
1F VCC2 5V 3
2
4
LTC1345
+
1F 12
RX
RX
13
DX
6
DX
7
50 DX 8 T = 50
125
10
14
BI TECHNOLOGIES 627T500/1250 (SOIC) OR 899TR50/125 (DIP)
LTC1345 * TA01
1
LTC1345 ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW C2 + 1 28 C2 - C1+ 2 VCC 3 C1 - 4 GND 5 T1 6 T2 7 T3 8 S1 9 S2 10 R3 11 R2 12 R1 13 OE 14 NW PACKAGE 28-LEAD PDIP WIDE 27 VEE 26 Y1 25 Z1 24 Y2 23 Z2 22 Y3 21 Z3 20 B3 19 A3 18 B2 17 A2 16 B1 15 A1 SW PACKAGE 28-LEAD PLASTIC SO WIDE
Supply Voltage, VCC .................................................. 6V Input Voltage Transmitters ........................... - 0.3V to (VCC + 0.3V) Receivers ............................................... - 18V to 18V S1, S2, OE ............................... - 0.3V to (VCC + 0.3V) Output Voltage Transmitters .......................................... - 18V to 18V Receivers ................................ - 0.3V to (VCC + 0.3V) VEE ..................................................................... - 10V to 0.3V Short-Circuit Duration Transmitter Output ..................................... Indefinite Receiver Output .......................................... Indefinite VEE .................................................................................. 30 sec Operating Temperature Range Commercial ............................................ 0C to 70C Industrial ........................................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1345CNW LTC1345CSW LTC1345INW LTC1345ISW
THREE V.35 TRANSMITTERS AND THREE RECEIVERS TJMAX = 125C, JA = 56C/W (NW) TJMAX = 125C, JA = 85C/W (SW)
Consult factory for Military grade parts.
DC ELECTRICAL CHARACTERISTICS
SYMBOL VOD VOC IOH IOL IOZ RO VTH VTH IIN RIN VOH VOL IOSR IOZR VIH VIL IIN ICC PARAMETER Transmitter Differential Output Voltage Transmitter Common-Mode Output Voltage Transmitter Output High Current Transmitter Output Low Current Transmitter Output Leakage Current Transmitter Output Impedance Differential Receiver Input Threshold Voltage Receiver Input Hysterisis Receiver Input Current (A, B) Receiver Input Impedance Receiver Output High Voltage Receiver Output Low Voltage Receiver Output Short-Circuit Current Receiver Three-State Output Current Logic Input High Voltage Logic Input Low Voltage Logic Input Current VCC Supply Current
VCC = 5V 5% (Notes 2, 3), unless otherwise specified.
q q q q q q q q q q q q q q q q q q
VEE
VEE Voltage
CONDITIONS Figure 1, - 4V VOS 4V Figure 1, VOS = 0V VY, Z = 0V VY, Z = 0V S1 = S2 = 0V, - 5V VY, Z 5V - 2V VY, Z 2V - 7V (VA + VB)/2 7V - 7V (VA + VB)/2 7V - 7V VA, B 7V - 7V VA, B 7V IO = 4mA, VB, A = 0.2V IO = 4mA, VB, A = - 0.2V 0V VO VCC S1 = S2 = 0V, 0V VO VCC T, S1, S2, OE T, S1, S2, OE T, S1, S2, OE Figure 1, VOS = 0, S1 = S2 = HIGH No Load, S1 = S2 = HIGH Shutdown, S1 = S2 = 0V No Load, S1 = S2 = HIGH
MIN 0.44 - 0.6 - 12.6 9.4
TYP 0.55 0 - 11 11 1 100 25 50 30 4.5 0.2
MAX 0.66 0.6 - 9.4 12.6 100 200 0.4
17.5 3 7 2
0.4 85 10 0.8 10 170 30 100
118 19 1 - 5.5
UNITS V V mA mA A k mV mV mA k V V mA A V V A mA mA A V
2
U
W
U
U
WW
W
LTC1345
AC ELECTRICAL CHARACTERISTICS
SYMBOL tR, tF tPLH tPHL tSKEW tPLH tPHL tSKEW tZL tZH tLZ tHZ fOSC BRMAX PARAMETER Transmitter Rise or Fall Time Transmitter Input to Output Transmitter Input to Output Transmitter Output to Output Receiver Input to Output Receiver Input to Output Differential Receiver Skew, tPLH - tPHL Receiver Enable to Output LOW Receiver Enable to Output HIGH Receiver Disable From LOW Receiver Disable From HIGH Charge Pump Oscillator Frequency Maximum Data Rate (Note 4)
VCC = 5V 5% (Notes 2, 3), unless otherwise specified.
MIN
q q q q q q q q q q
CONDITIONS Figures 1 and 3, VOS = 0V Figures 1 and 3, VOS = 0V Figures 1 and 3, VOS = 0V Figures 1 and 3, VOS = 0V Figures 1 and 4, VOS = 0V Figures 1 and 4, VOS = 0V Figures 1 and 4, VOS = 0V Figures 2 and 5, CL = 15pF, S1 Closed Figures 2 and 5, CL = 15pF, S2 Closed Figures 2 and 5, CL = 15pF, S1 Closed Figures 2 and 5, CL = 15pF, S2 Closed
10
TYP 7 25 25 0 49 52 3 40 35 30 35 200 15
MAX 40 70 70 100 100 70 70 70 70
UNITS ns ns ns ns ns ns ns ns ns ns ns kHz Mbaud
The q denotes specifications which apply over the full operating temperature range. Note 1: The absolute maximum ratings are those values beyond which the safety of the device cannot be guaranteed. Note 2: All currents into device pins are termed positive; all currents out of device pins are termed negative. All voltages are referenced to device ground unless otherwise specified.
Note 3: All typicals are given for VCC = 5V, C1 = C2 = C3 = 1F ceramic capacitors and TA = 25C. Note 4: Maximum data rate is specified for NRZ data encoding scheme. The maximum data rate may be different for other data encoding schemes. Data rate is guaranteed by correlation and is not tested.
TYPICAL PERFORMANCE CHARACTERISTICS
Transmitter Output Current vs Temperature
13 VCC = 5V
OUTPUT CURRENT (mA)
12
OUTPUT CURRENT (mA)
11
TIME (ns)
10
9 -50 -25
0
50 75 25 TEMPERATURE (C)
UW
100
LTC1345 * TPC01
Transmitter Output Current vs Output Voltage
13 TA = 25C VCC = 5V 12
15 20
Transmitter Output Skew vs Temperature
VCC = 5V
11
10
10
5
125
9 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 OUTPUT VOLTAGE (V)
1.5
2.0
0 -50 -25
0
50 75 25 TEMPERATURE (C)
100
125
LTC1345 * TPC02
LTC1345 * TPC03
3
LTC1345
TYPICAL PERFORMANCE CHARACTERISTICS
Receiver tPLH - tPHL vs Temperature
20 VCC = 5V 15 CURRENT (mA) 120 140 VCC = 5V LOADED 25 CURRENT (mA) -5.0
NO LOAD 100 20
10
VOLTAGE (V)
TIME (ns)
5
0 -50 -25
0
50 75 25 TEMPERATURE (C)
Transmitter Output Waveforms
INPUT 5V/DIV
OUTPUT 0.2V/DIV
PIN FUNCTIONS
C2+ (Pin 1): Capacitor C2 Positive Terminal. C1+ (Pin 2): Capacitor C1 Positive Terminal. VCC (Pin 3): Positive Supply, 4.75 VCC 5.25V. C1- (Pin 4): Capacitor C1 Negative Terminal. GND (Pin 5): Ground. The positive terminal of C3 is connected to ground. T1 (Pin 6): Transmitter 1 Input. T2 (Pin 7): Transmitter 2 Input. T3 (Pin 8): Transmitter 3 Input. S1 (Pin 9): Select Input 1. S2 (Pin 10): Select Input 2. R3 (Pin 11): Receiver 3 Output. R2 (Pin 12): Receiver 2 Output. R1 (Pin 13): Receiver 1 Output. OE (Pin 14): Receiver Output Enable. A1 (Pin 15): Receiver 1 Inverting Input. B1 (Pin 16): Receiver 1 Noninverting Input. A2 (Pin 17): Receiver 2 Inverting Input. B2 (Pin 18): Receiver 2 Noninverting Input. A3 (Pin 19): Receiver 3 Inverting Input. B3 (Pin 20): Receiver 3 Noninverting Input. Z3 (Pin 21): Transmitter 3 Inverting Output.
4
UW
100
LTC1345 * TPC04
Supply Current vs Temperature
30 -4.5
VEE Voltage vs Temperature
VCC = 5V
-5.5
80
15
-6.0
125
60 -50 -25
0
50 75 25 TEMPERATURE (C)
100
10 125
-6.5 -50 -25
0
50 75 25 TEMPERATURE (C)
100
125
LTC1345 * TPC05
LTC1345 * TPC06
Receiver Output Waveforms
INPUT 0.2/DIV
OUTPUT 5V/DIV
LTC1345 * TPC07
LTC1345 * TPC08
U
U
U
LTC1345
PIN FUNCTIONS
Y3 (Pin 22): Transmitter 3 Noninverting Output. Z2 (Pin 23): Transmitter 2 Inverting Output. Y2 (Pin 24): Transmitter 2 Noninverting Output Z1 (Pin 25): Transmitter 1 Inverting Output. Y1 (Pin 26): Transmitter 1 Noninverting Output. VEE (Pin 27): Charge Pump Output. Connected to negative terminal of capacitor C3. C2 - (Pin 28): Capacitor C2 Negative Terminal.
FU CTIO TABLES
Transmitter and Receiver Configuration
S1 0 1 0 1 S2 0 0 1 1 TX# -- 1, 2, 3 1, 2 1, 2, 3 RX# -- 1, 2 1, 2, 3 1, 2, 3 REMARKS Shutdown DCE Mode, RX3 Shut Down DTE Mode, TX3 Shut Down All Active DTE or All ON DTE or All ON DCE DCE Disabled INPUTS CONFIGURATION S1 S2 DTE DTE DCE or All ON DCE or All ON Shutdown 0 0 1 1 0 1 1 X X 0 T 0 1 0 1 X Y1 AND Y2 0 1 0 1 Z OUTPUTS Z1 AND Z2 1 0 1 0 Z Y3 Z Z 0 1 Z Z3 Z Z 1 0 Z Shutdown X X 1 1 X 0 1 1 0 0 X 0
Transmitter
TEST CIRCUITS
Y 50 T Y VOD Z A 50 VOC = (VY + VZ)/2 Z 50 125 50 125 B R OE 15pF RECEIVER OUTPUT CL 1k VCC S1
Figure 1. V.35 Transmitter/Receiver Test Circuit
U
U
U
U
U
Receiver
INPUTS CONFIGURATION S1 S2 OE 0 0 0 0 1 X B-A 0.2V - 0.2V 0.2V - 0.2V X X 1 0 1 0 Z Z OUTPUTS R1 AND R2 R3 1 0 Z Z Z Z
VOS
S2
LTC1345 * F02
LTC1345 * F01
Figure 2. Receiver Output Enable/Disable Timing Test Load
5
LTC1345
SWITCHI G TI E WAVEFOR S
3V T 0V t PLH VO Y-Z -VO Z VO Y tSKEW tSKEW
LTC1345 * F03
1.5V
f = 1MHz: t r 10ns: t f 10ns
50% 10% tr
Figure 3. V.35 Transmitter Propagation Delays
V ID B-A -VID 0V
f = 1MHz: t r 10ns: t f 10ns
t PLH VOH R VOL 1.5V OUTPUT
Figure 4. V.35 Receiver Propagation Delays
3V OE 0V t ZL 5V R VOL t ZH VOH R 0V
LTC1345 * F05
1.5V
Figure 5. Receiver Enable and Disable Times
6
W
1.5V 1.5V
W
U
1.5V t PHL
90%
VDIFF = V(Y) - V(Z) 1/2 VO
90% 50% 10% tf
INPUT
0V t PHL 1.5V
LTC1345 * F04
f = 1MHz: t r 10ns: t f 10ns
1.5V t LZ
OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH t HZ
0.5V
0.5V
LTC1345
APPLICATIONS INFORMATION
Review of CCITT Recommendation V.35 Electrical Specifications V.35 is a CCITT recommendation for synchronous data transmission via modems. Appendix 2 of the recommendation describes the electrical specifications which are summarized below: 1. The interface cable is balanced twisted-pair with 80 to 120 impedance. 2. The transmitter's source impedance is between 50 and 150. 3. The transmitter's resistance between shorted terminals and ground is 150 15. 4. When terminated by a 100 resistive load, the terminalto-terminal voltage should be 0.55V 20%. 5. The transmitter's rise time should be less than 1% of the signal pulse or 40ns, whichever is greater.
B
6. The common-mode voltage at the transmitter output should not exceed 0.6V. 7. The receiver impedance is 100 10. 8. The receiver impedance to ground is 150 15. 9. The transmitter or receiver should not be damaged by connection to earth ground, short-circuiting, or cross connection to other lines. 10. No data errors should occur with 2V common-mode change at either the transmitter or receiver, or 4V ground potential difference between transmitter and receiver.
U
W
U
U
Cable Termination Each end of the cable connected to an LTC1345 must be terminated by either one of two electrically equivalent external Y or resistor networks for proper operation. The Y-termination has two series connected 50 resistors and a 125 resistor connected between ground and the center tap of the two 50 resistors as shown in Figure 6A.
50
125
50 A
300 120 300
LTC1345 * F06
Figure 6. Y and Termination Networks
The alternative -termination has a 120 resistor across the twisted wires and two 300 resistors between each wire and ground as shown in Figure 6B. Standard 1/8W, 5% surface mount resistors can be used for the termination network. To maintain the proper differential output swing, the resistor tolerance must be 5% or less. A termination network that combines all the resistors into an SO-14 package is available from: BI Technologies (Formerly Beckman Industrial) Resistor Networks 4200 Bonita Place Fullerton, CA 92635 Phone: (714) 447-2357 FAX: (714) 447-2500 Part #: BI Technologies 627T500/1250 (SOIC) 899TR50/125 (DIP)
7
LTC1345
APPLICATIONS INFORMATION
Theory of Operation The transmitter output consists of complementary switched-current sources as shown in Figure 7.
VCC CHIP BOUNDARY 11mA
Y 50 T 50 Z 125
11mA VEE
LTC1345 * F07
Figure 7. Simplified Transmitter Schematic
With a logic zero at the transmitter input, the inverting output Z sources 11mA and the noninverting output Y sinks 11mA. The differential transmitter output voltage is then set by the termination resistors. With two differential 50 resistors at each end of the cable, the voltage is set to (50 x 11mA) = 0.55V. With a logic 1 at the transmitter input, output Z sinks 11mA and Y sources 11mA. The common-mode voltage of Y and Z is 0V when both current sources are matched and there is no ground potential difference between the cable terminations. The transmitter current sources have a common-mode range of 2V, which allows for a ground difference between cable terminations of 4V. Each receiver input has a 30k resistance to ground and requires external termination to meet the V.35 input impedance specification. The receivers have an input hysteresis of 50mV to improve noise immunity. The receiver output
8
U
W
U
U
may be forced into a high impedance state by pulling the output enable (OE) pin high. For normal operation OE should be pulled low. A charge pump generates the regulated negative supply voltage (VEE) with three 1F capacitors. Commutating capacitors C1 and C2 form a voltage doubler and inverter while C3 acts as a reservoir capacitor. To insure proper operation, the capacitors must have an ESR less than 1. Monolithic ceramic or solid tantalum capacitors are good choices. Under light loads, regulation at about - 5.2V is provided by a pulse-skipping scheme. Under heavy loads the charge pump is on continuously. A small ripple of about 500mV will be present on VEE. Two Select pins, S1 and S2, configure the chip for DTE, DCE, all transmitters and receivers on, or Shutdown. In Shutdown mode, ICC drops to 1A. The outputs of the transmitters and receivers are in high impedance states, the charge pump stops and VEE is clamped to ground. ESD Protection LTC1345 transmitter outputs and receiver inputs have onchip protection from multiple 10kV ESD transients. ESD testing is done using the Human Body ESD Model. ESD testing must be done with an AC ground on the VCC and VEE supply pins. The low ESR supply decoupling and VEE reservoir capacitors provide this AC ground during normal operation. Complete V.35 Port Figure 8 shows the schematic of a complete surface mounted, single 5V DTE and DCE V.35 port using only three ICs and eight capacitors per port. The LTC1345 is used to transmit the clock and data signals, and the LT1134A to transmit the control signals. If test signals 140, 141, and 142 are not used, the transmitter inputs should be tied to VCC.
LTC1345
APPLICATIONS INFORMATION
1F VCC1 5V 3
++
2
1F
DTE
T 28 27 1F 1 2 3 4 14 13 12 11 10 9 7 8 B A T T T T BI 627T500/ 1250 (SOIC) T =
4
1
1F 6
26 DX 25 24 7 DX 23 20 11 RX 19 18 12 RX 17 16 13 RX 15 5 9 10 VCC1 0.2F 0.2F 14
P S U W AA Y X V T R
TXD (103)
P S
12 11 10
T
SCTE (113)
U W T
9 1
TXC (114)
AA Y T
2 3
RXC (115)
X V T
4 5
RXD (104)
T R T
6 7
GND (102) CABLE SHIELD
B A
8
4 1 0.1F 2 21
3
22
23 24 1 0.1F 0.1F
LT1134A
DX
5
H
DTR (108)
H
19
DX
7
C
RTS (105)
C
20
RX
6
E
DSR (107)
E
18
RX
8
D
CTS (106)
D
16
RX
10
F
DCD (109)
F
OPTIONAL SIGNALS
14
RX
12
NN
TM (142)
NN
17
DX
9
N
RDL (140)
N
15
DX
11
L
LLB (141)
L
13
ISO 2593 ISO 2593 34-PIN DTE/DCE 34-PIN DTE/DCE INTERFACE CONNECTOR INTERFACE CONNECTOR
Figure 8. Complete Single 5V V.35 Interface
+
+
+
LTC1345
U
W
U
U
50
125
DCE
1F
++
1
1F VCC2 5V 3
50 BI 627T500/ 1250 (SOIC) 27 1F 18 17 16 15 26 25 24 23 22 21 5
28
2
4
LTC1345
+
1F 12
RX
RX
13
DX
6
DX
7
DX
8
9 VCC2 0.2F
10
14
0.2F
4
3
22
23 24
LT1134A
0.1F
6
RX
20
8
RX
18
5
DX
21
7
DX
19
9
DX
17
11
DX
15
10
RX
16
12
RX
14
13
LTC1345 * TA08
9
LTC1345
APPLICATIONS INFORMATION
RS422/RS485 Applications The receivers on the LTC1345 are ideal for RS422 and RS485 applications. Using the test circuit in Figure 9, the LTC1345 receivers are able to successfully reconstruct the data stream with the common-mode voltage meeting RS422 and RS485 requirements (12V to -7V). Figures 10 and 11 show that the LTC1345 receivers are very capable of reconstructing data at rates up to 10Mbaud.
VCC1 5V A LTC485 GND TTL IN B 100 BX 100 AX LTC1345 GND VCC2 5V RECEIVER OUTPUT 5V/DIV 5 0
-+
12V TO - 7V COMMON-MODE VOLTAGE
LTC1345 * F09
Figure 9 RS422/RS485 Receiver Interface
10
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W
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U
0V -5V RECEIVER INPUT A B 5V/DIV -10V
LTC1345 * F10
Figure 10. - 7V Common Mode
TTL OUT
RECEIVER B INPUT A 5V/DIV
15V 10V 5V 0V
RECEIVER OUTPUT 5V/DIV
5 0
LTC1345 * F11
Figure 11. 12V Common Mode
LTC1345
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted. N Package 28-Lead Plastic DIP
1.455* (36.957) MAX 28 27 26 25 24 23 22 21 20 19 18 17 16 15
0.505 - 0.560* (12.827 - 14.224)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0.600 - 0.625 (15.240 - 15.875)
0.150 0.005 (3.810 0.127) 0.015 (0.381) MIN
0.045 - 0.065 (1.143 - 1.651)
0.009 - 0.015 (0.229 - 0.381) +0.025 0.625 -0.015 +0.635 -0.381
0.070 (1.778) TYP 0.125 (3.175) MIN 0.035 - 0.080 (0.889 - 2.032) 0.100 0.010 (2.540 0.254) 0.018 0.003 (0.457 0.076)
N28 0594
(
15.87
)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTURSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm).
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1345
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted. S Package 28-Lead Plastic SOL
0.697 - 0.712 (17.70 - 18.08) (NOTE 2) 28 27 26 25 24 23 22 21 20 19 18 17 16 15
NOTE 1
0.394 - 0.419 (10.007 - 10.643)
1 0.291 - 0.299 (7.391 - 7.595) (NOTE 2) 0.010 - 0.029 x 45 (0.254 - 0.737) 0 - 8 TYP
2
3
4
5
6
7
8
9
10
11
12
13
14
0.005 (0.127) RAD MIN
0.093 - 0.104 (2.362 - 2.642)
0.037 - 0.045 (0.940 - 1.143)
0.009 - 0.013 (0.229 - 0.330)
NOTE 1 0.016 - 0.050 (0.406 - 1.270)
0.050 (1.270) TYP
0.014 - 0.019 (0.356 - 0.482)
0.004 - 0.012 (0.102 - 0.305)
NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS. 2. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
SOL28 0392
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 q FAX: (408) 434-0507 q TELEX: 499-3977
LT/GP 0395 10K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1995

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