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LF2272
DEVICES INCORPORATED
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
DESCRIPTION
The LF2272 is a high-speed digital colorspace converter/corrector consisting of three simultaneous 12-bit input and output channels for functionality up to 64 Giga (236) colors. Some of the applications the LF2272 can be used for include phosphor colorimetry correction, image capturing and manipulation, composite color encoding/decoding, color matching, and composite color standards conversion/transcoding. The 3 x 3 matrix multiplier (triple dot product) allows users to easily perform three-dimensional perspective translations or video format conversions at real-time video rates. By using the LF2272, conversions can be made from the RGB (color component) format to the YIQ (quadrature encoded chrominance) or YUV (color difference) formats and vice versa (YIQ or YUV to RGB). Differing signal formats in each stage of a system can be disregarded. For example, using an LF2272 at each format interface allows each stage of a system to operate on the data while in the appropriate format.
Colorspace Converter/ Corrector (3 x 12-bits)
LF2272
FEATURES
u 50 MHz Data and Computation Rate u Full Precision Internal Calculations with Output Rounding u On-board 10-bit Coefficient Storage u Overflow Capability in Low Resolution Applications u Two's Complement Input and Output Data Format u 3 Simultaneous 12-bit Channels (64 Giga Colors) u Applications: * Component Color Standards Translations (RGB, YIQ, YUV) * Color-Temperature Conversion * Image Capturing and Manipulation * Composite Color Encoding/ Decoding * Three-Dimensional Perspective Translation u Replaces TRW/Raytheon/Fairchild TMC2272 u 120-pin PQFP
All inputs and outputs, as well as all control lines, are registered on the rising edge of clock. The LF2272 operates at clock rates up to 50 MHz over the full commercial temperature and supply voltage ranges. A narrower data path can be used to allow the LF2272 to work with many different imaging applications. DETAILS OF OPERATION All three input ports (A, B, C) and all three output ports (X, Y, Z) are utilized to implement a 3 x 3 matrix multiplication (triple dot product). Each truncated 12-bit output is the sum of all three input words multiplied by the appropriate coefficients (Table 1). The pipeline latency is five clock cycles. Therefore, the sum of
LF2272 BLOCK DIAGRAM
CLK CWEL1-0
2
DATA INPUTS
{ {
B11-0 C11-0
12 12
12 12
Y11-0 Z11-0
KA9-0 KB9-0 KC9-0
10 10 10
COEFFICIENT INPUTS
9-MULTIPLIER ARRAY
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{
A11-0
12
12
X11-0
DATA OUTPUTS
LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
TABLE 1. LATENCY EQUATIONS
X(n+4) = A(n)KA1(n) + B(n)KB1(n) Y(n+4) = A(n)KA2(n) + B(n)KB2(n) Z(n+4) = A(n)KA3(n) + B(n)KB3(n) + C(n)KC1(n) + C(n)KC2(n) + C(n)KC3(n)
products will be output five clock cycles after the input data has been registered. New output data is subsequently available every clock cycle thereafter. DATA FORMATTING The data input ports (A, B, C) and data output ports (X, Y, Z) are 12-bit integer two's complement format. The coefficient input ports (KA, KB, KC) are 10-bit fractional two's complement format. Refer to Figures 1a and 1b. BIT WEIGHTING The internal sum of products of the LF2272 can grow to 23 bits. However, in order to keep the output format identical to the input format, the X, Y, and Z outputs are rounded to 12-bit integer words. The rounding is done only at the final output stage to allow accuracy, with correct rounding and overflow, for applications requiring less than 12-bit integer words. The user may adjust the bit weighting by applying an identical scaling correction factor to both the input and output data streams.
DATA OVERFLOW Because the LF2272's matched input and output data formats accommodate unity gain (0 dB), input conditions that could lead to numeric overflow may exist. To ensure that no overflow conditions occur, the user must be aware of the maximum input data and coefficient word sizes allowable for each specific algorithm being performed.
SYSTEMS SMALLER THAN 12-BITS Using a data path less than 12-bits requires the input data to be right justified and sign extended to 12-bits because the LF2272 carries out all calculations to full precision. Since all least-significant bits are used, the desired X, Y, and Z outputs are rounded correctly and upper-order output bits are used for overflow.
FIGURE 1A.
INPUT FORMATS
Data Input
11 10 9 8 7 -211 210 29 28 27
(Sign)
6543210 26 25 24 23 22 21 20
Coefficient Input
9876543210 -20 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 2-9
(Sign)
Internal Sum
20 19 18 17 -211 210 29 28
(Sign)
3210 2-6 2-7 2-8 2-9
FIGURE 1B.
OUTPUT FORMAT
Result
11 10 9 8 7 -211 210 29 28 27
(Sign)
6543210 26 25 24 23 22 21 20
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LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
TABLE 2. COEFFICIENT INPUTS
INPUT PORT KA KB KC REG. AVAILABLE KA1, KA2, KA3 KB1, KB2, KB3 KC1, KC2, KC3
SIGNAL DEFINITIONS Power VCC and GND +5 V power supply. All pins must be connected. Clock CLK -- Master Clock The rising edge of CLK strobes all enabled registers. All timing specifications are referenced to the rising edge of CLK. Inputs A11-0, B11-0, C11-0 -- Data Inputs A, B, and C are the 12-bit registered data input ports. Data presented to these ports is latched into the multiplier input registers. KA9-0, KB9-0, KC9-0 -- Coefficient Inputs KA, KB, and KC are the 10-bit registered coefficient input ports. Data presented to these ports is latched into the corresponding internal coefficient register set defined by CWEL1-0 (Table 3) on the next rising edge of CLK. Table 2 shows which coefficient registers are available for each coefficient input port.
TABLE 3.
CWEL1-0 00 01 10 11
COEFF. REG. UPDATE
COEFFICIENT SET Hold All Registers KA1, KB1, KC1 KA2, KB2, KC2 KA3, KB3, KC3
Outputs X11-0, Y11-0, Z11-0 -- Data Outputs X, Y, and Z are the 12-bit registered data output ports. Controls CWEL1-0 -- Coefficient Write Enable The registered coefficient write enable inputs determine which internal coefficient register set to update (Table 3) on the next clock cycle.
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LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
FIGURE 2.
DETAILED FUNCTIONAL DIAGRAM
12
A
KA1 KA
10
KA2
KA3
21
21
21
B
12
KB1 KB
10
KB2
KB3
21
21
21
C
12
KC1 KC
10
KC2
KC3
21
21
21
CWEL
2
12 (MSB)
12 (MSB)
12 (MSB)
X
Y
Z
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LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
MAXIMUM RATINGS Above which useful life may be impaired (Notes 1, 2, 3, 8)
Storage temperature ........................................................................................................... -65C to +150C Operating ambient temperature ........................................................................................... -55C to +125C VCC supply voltage with respect to ground ............................................................................ -0.5 V to +7.0 V Input signal with respect to ground ............................................................................... -0.5 V to VCC + 0.5 V Signal applied to high impedance output ...................................................................... -0.5 V to VCC + 0.5 V Output current into low outputs ............................................................................................................. 25 mA Latchup current ............................................................................................................................... > 400 mA
OPERATING CONDITIONS To meet specified electrical and switching characteristics
Mode Active Operation, Commercial Active Operation, Military Temperature Range (Ambient) 0C to +70C -55C to +125C Supply Voltage 4.75 V VCC 5.25 V 4.50 V VCC 5.50 V
ELECTRICAL CHARACTERISTICS Over Operating Conditions (Note 4)
Symbol VOH VOL VIH VIL IIX IOZ ICC1 ICC2 CIN COUT Parameter Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Current Output Leakage Current VCC Current, Dynamic VCC Current, Quiescent Input Capacitance Output Capacitance
(Note 3)
Test Condition Vcc = Min., IOH = -2.0 mA Vcc = Min., IOL = 4.0 mA
Min 2.4
Typ
Max
Unit V
0.4 2.0 0.0 VCC 0.8 10 40 160 12 10 10
V V V A A mA mA pF pF
Ground VIN VCC (Note 12)
(Note 12) (Notes 5, 6) (Note 7)
TA = 25C, f = 1 MHz TA = 25C, f = 1 MHz
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432109876543210987654321 432109876543210987654321 432109876543210987654321
*DISCONTINUED SPEED GRADE
Symbol
Z11-0
2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321 2121098765432109876543210987654321
Min
876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321 876543210987654321
Min
DEVICES INCORPORATED
SWITCHING WAVEFORM
Symbol
SWITCHING CHARACTERISTICS
KA, KB, KC
MILITARY OPERATING RANGE (-55C to +125C) Notes 9, 10 (ns)
COMMERCIAL OPERATING RANGE (0C to +70C) Notes 9, 10 (ns)
tD
tH
tS
tPWH
tPWL
tCYC
tD
tH
tS
tPWH
tPWL
tCYC
CWEL1-0
A, B, C
Y11-0
X11-0
CLK
Parameter
Output Delay
Input Hold Time
Input Setup Time
Clock Pulse Width High
Clock Pulse Width Low
Cycle Time
Parameter
Output Delay
Input Hold Time
Input Setup Time
Clock Pulse Width High
Clock Pulse Width Low
Cycle Time
tS
01
Kx1
0
1
tH
Kx2
10
0
2
tPWH
Kx3
1.0
11
3
0
tPWL
6
4
10
15
33
0
8
00
33*
0
5
Max
18
0
Min
10
15
33
12
10
10
25
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0
6
0
6
LF2272- 25
Colorspace Converter/ Corrector (3 x 12-bits)
33*
Max
Max
25
16
LF2272-
7
KA3 + KB3 + KC3
KA2 + KB2 + KC2
KA1 + KB1 + KC1
tD
Min
Min
10
10
25
20
0
9
8
0
6
6
08/16/2000-LDS.2272-I
25*
20
LF2272
8
Max
Max
20
15
LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
NOTES
9. AC specifications are tested with input transition times less than 3 ns, output reference levels of 1.5 V (except tDIS test), and input levels of nominally 0 to 3.0 V. Output loading may be a resistive divider which provides for specified IOH and IOL at an output voltage of VOH min and VOL max 2. The products described by this spec- respectively. Alternatively, a diode ification include internal circuitry de- bridge with upper and lower current signed to protect the chip from damag- sources of IOH and IOL respectively, ing substrate injection currents and ac- and a balancing voltage of 1.5 V may be cumulations of static charge. Neverthe- used. Parasitic capacitance is 30 pF less, conventional precautions should minimum, and may be distributed. be observed during storage, handling, and use of these circuits in order to This device has high-speed outputs caavoid exposure to excessive electrical pable of large instantaneous current stress values. pulses and fast turn-on/turn-off times. As a result, care must be exercised in the 3. This device provides hard clamping of testing of this device. The following transient undershoot and overshoot. In- measures are recommended: put levels below ground or above VCC will be clamped beginning at -0.6 V and a. A 0.1 F ceramic capacitor should be VCC + 0.6 V. The device can withstand installed between VCC and Ground indefinite operation with inputs in the leads as close to the Device Under Test range of -0.5 V to +7.0 V. Device opera- (DUT) as possible. Similar capacitors tion will not be adversely affected, how- should be installed between device VCC ever, input current levels will be well in and the tester common, and device excess of 100 mA. ground and tester common. 4. Actual test conditions may vary from b. Ground and VCC supply planes those designated but operation is guar- must be brought directly to the DUT anteed as specified. socket or contactor fingers. 5. Supply current for a given applica- c. Input voltages should be adjusted to tion can be accurately approximated by: compensate for inductive ground and VCC noise to maintain required DUT input NCV2 F levels relative to the DUT ground pin. 4 where 10. Each parameter is shown as a minimum or maximum value. Input requirements are specified from the point of view of the external system driving the chip. Setup time, for example, is specified as a minimum since the exter6. Tested with all outputs changing ev- nal system must supply at least that ery cycle and no load, at a 20 MHz clock much time to meet the worst-case requirements of all parts. Responses from rate. the internal circuitry are specified from 7. Tested with all inputs within 0.1 V of the point of view of the device. Output VCC or Ground, no load. delay, for example, is specified as a 8. These parameters are guaranteed maximum since worst-case operation of any device always provides data within but not 100% tested. that time. N = total number of device outputs C = capacitive load per output V = supply voltage F = clock frequency 1. Maximum Ratings indicate stress specifications only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating conditions for extended periods may affect reliability. 11. For the tENA test, the transition is measured to the 1.5 V crossing point with datasheet loads. For the tDIS test, the transition is measured to the 200mV level from the measured steady-state output voltage with 10mA loads. The balancing voltage, VTH, is set at 3.5 V for Z-to-0 and 0-to-Z tests, and set at 0 V for Zto-1 and 1-to-Z tests. 12. These parameters are only tested at the high temperature extreme, which is the worst case for leakage current.
FIGURE A. OUTPUT LOADING CIRCUIT
DUT
S1 IOL CL IOH VTH
FIGURE B. THRESHOLD LEVELS
tENA OE
Z 0
1.5 V 1.5 V 1.5 V
tDIS
3.0V Vth VOL*
0.2 V
0 1
Z Z
1.5 V
VOH*
0.2 V
Z
1
0V Vth VOL* Measured VOL with IOH = -10mA and IOL = 10mA VOH* Measured VOH with IOH = -10mA and IOL = 10mA
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LF2272
DEVICES INCORPORATED
Colorspace Converter/ Corrector (3 x 12-bits)
ORDERING INFORMATION
X7 X8 VCC X9 X10 X11 GND GND GND C11 C10 C9 C8 C7 GND C6 C5 C4 VCC C3 C2 C1 C0 B11 B10 B9 B8 B7 B6 B5 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91
X6 X5 X4 X3 X2 X1 X0 GND Y11 Y10 Y9 VCC Y8 Y7 Y6 GND Y5 Y4 Y0 VCC Y1 Y2 Y3 GND Z0 Z1 Z2 Z3 Z4 Z5 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
120-pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Top View
B4 B3 CLK B2 B1 B0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 GND CWE0 CWE1 KA9 KA8 KA7 KA6 KA5 KA4 KA3 KA2 KA1
Speed
0C to +70C -- COMMERCIAL SCREENING
25 ns 20 ns LF2272QC25 LF2272QC20
-40C to +85C -- COMMERCIAL SCREENING
Z6 Z7 Z8 GND Z9 Z10 Z11 KC0 KC1 KC2 KC3 GND KC4 KC5 KC6 VCC KC7 KC8 KC9 KB0 KB1 KB2 KB3 KB4 KB5 KB6 KB7 KB8 KB9 KA0
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
Plastic Quad Flatpack (Q1)
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121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 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1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1 1210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
DEVICES INCORPORATED
Speed
-55C to +125C -- MIL-STD-883 COMPLIANT
-55C to +125C -- COMMERCIAL SCREENING
0C to +70C -- COMMERCIAL SCREENING
ORDERING INFORMATION
120-pin
M
G
N
H
D
C
K
E
B
A
F
L
J
Y11
Y3
Y1
Y4
Y5
Y7
Y9
X1
X4
X7
Z5
Z2
Z1
1
Y10
Y2
Y0
Y6
Y8
X0
X2
X5
X9
Z8
Z7
Z4
Z0
2
GND
GND
GND
VCC
VCC
X10
Z10
X3
X6
X8
Z3
Z9
Z6
3
GND KC0 GND VCC
GND C11
KC1
VCC GND C10 GND VCC
X11
Z11
4
Top View Through Package (i.e., Component Side Pinout)
Ceramic Pin Grid Array (G4)
Discontinued Package
GND
KC3
KC2
5
KEY
KC4
KC5
C9
C8
6
9
KC7
KC6
C6
C7
7
KC8
KC9
KB0
C4
C5
8
KB1
KB2
KB4
C0
C2
C3
9
KB3
KB5
KB8
B11
10
C1
B8
GND
CLK
KB6
KB9
KA1
KA4
KA8 CWEL1 CWEL0
A11
B10
11
A3
A7
B5
B9
Video Imaging Products Colorspace Converter/ Corrector (3 x 12-bits)
KB7 KA2 KA5 KA7
12
A0
A2
A6
A9
B0
B3
B6
B7
KA0
KA3
KA6
KA9
A10
13
A1
A4
A5
A8
B1
B2
B4
08/16/2000-LDS.2272-I
LF2272

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