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MB15ExxSL Series
Description
Single PLL Frequency Synthesizers with On-Chip Prescalers
Packages
The Fujitsu ExxSL series single PLLs are serial input frequency synthesizers operating up to 2.5 GHz. They have built-in dual-modulus prescalers enabling pulse swallow operation. The latest advanced BiCMOS technology is used resulting in a super low supply current. A refined charge pump design (Fujitsu's Super Charger) provides fast tuning along with low spurious noise and phase noise characteristics. The E-series is ideally suited for digital mobile communications, including GSM, DCS1800, PCS1900, IS-136, IS-95 and ISM applications.
16-pin plastic SSOP , FPT-16P-M05
(LCC-16P-M06) 16-pin plastic BCC, LCC-16P-M06
Features
* Very low spurious and phase noise characteristics * Excellent lock-up time performance * Low operating voltage: 2.4 to 3.6 volts * Super low operating current: 2.5 to 4.0 mA (typical) * Power-saving current: 0.1A (typical) * Selectable charge pump current (1.5 or 6.0 mA) * Wide operating temperature: -40 to +85C * Plastic 16-pin SSOP and 16-pin BCC packages * Reference counter: - 14-bit programmable divider: 3 to 16383 * 18-bit programmable divider: - Binary 7-bit swallow counter: 0 to 127 - Binary 11-bit programmable counter: 3 to 2047 * Evaluation kits available
Parameter RF Frequency of Operation Low Power Supply Voltage Low Power Supply Current Prescaler Divide Ratios Power-Saving Function
MB15E03SL 1.2 GHz 2.7V 2.0 mA 64/65 or 128/129
MB15E05SL 2.0 GHz 2.7V 3.0 mA
MB15E07SL 2.5 GHz 2.7V 3.5 mA 32/33 or 64/65
0.1A typ.
MB15ExxSL Series
Table of Contents
Pin Descriptions....................................................................................................................................................................2 Block Diagram......................................................................................................................................................................3 Absolute Maximum Ratings ....................................................................................................................................................4 Recommended Operating Conditions........................................................................................................................................4 Handling Precautions......................................................................................................................................................4 Electrical Characteristics ........................................................................................................................................................5 Measurement Circuit (fin, OSCin Input Sensitivity) ....................................................................................................................7 Typical Electrical Characteristics: MB15E03SL .........................................................................................................................8 Reference Information: MB15E03SL ...............................................................................................................................11 Typical Electrical Characteristics: MB15E05SL .......................................................................................................................12 Reference Information: MB15E05SL ...............................................................................................................................15 Typical Electrical Characteristics: MB15E07SL ...................................................................................................................... 16 Reference Information: MB15E07SL ...............................................................................................................................19 Functional Descriptions .......................................................................................................................................................20 Serial Data Input ..........................................................................................................................................................20 Table 1. Control Bit .....................................................................................................................................................20 Shift Register Configuration for the Programmable Reference Counter ..........................................................................20 Shift Register Configuration for the Programmable Counter ....................................................................................... 21 Table 2. Binary 14-Bit Programmable Reference Counter Data Setting ................................................................................21 Table 3. Binary 11-Bit Programmable Counter Data Setting ............................................................................................. 21 Table 4. Binary 7-Bit Swallow Counter Data Setting.........................................................................................................22 Table 5. Prescaler Data Setting ......................................................................................................................................22 Table 6. Phase Comparator Phase Switching Data Setting ................................................................................................ 22 Table 7. LD/fOUT Output Select Data Setting....................................................................................................................23 Table 8. Charge Pump Current Setting.............................................................................................................................23 Table 9. Do Output Impedance Pin Setting .......................................................................................................................23 Power-Saving Mode (Intermittent Mode Control Circuit) ..................................................................................................24 Table 10. Power-Save Pin Setting ....................................................................................................................................24 Serial Data Input Timing ...............................................................................................................................................25 Table 11. Timing Parameters ..........................................................................................................................................25 Phase Detector Output Waveform....................................................................................................................................26 Application Example ...........................................................................................................................................................27 Useage Precautions..............................................................................................................................................................28 Ordering Information ..........................................................................................................................................................28 Package Dimensions ............................................................................................................................................................29
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Pin Descriptions
Pin No. SSOP 1 2 3 4 5 6 7 8 9 10 11 12 13 BCC 16 1 2 3 4 5 6 7 8 9 10 11 12 Pin Name OSCIN OSCOUT VP VCC Do GND Xfin fin Clock Data LE PS ZC I/O I O -- -- O -- I I I I I I I Programmable reference divider input Oscillator input connection to a TCXO Oscillator output Power supply voltage input for the charge pump Power supply voltage input Charge pump output Phase of the charge pump can be selected via programming of the FC bit. Ground Prescaler complementary input which should be grounded via a capacitor. Prescaler input Connection to an external VCO should be done via AC coupling. Clock input for 19-bit shift register Data is shifted into shift register on rising edge of the clock. (Open is prohibited.) Serial data input using binary code Last bit of data is a control bit. (Open is prohibited.) Load enable signal input. (Open is prohibited.) When LE is set high, data in the shift register is transferred to a latch according to control bit in the serial data. Power-saving mode control. Pin must be set at "L" at Power-ON. (Open is prohibited.) PS = "H" sets normal mode. PS = "L" sets power-saving mode. Forced high-impedance control for the charge pump (with internal pull up resistor) ZC = "H" sets normal Do output. ZC = "L"; Do becomes high impedance. Lock detect signal output (LD)/phase comparator monitoring output (fOUT) The output signal is selected via programming of the LDS bit. LDS = "H" outputs fOUT (fr/fp monitoring output). LDS = "L" outputs LD ("H" = locked state, "L" = unlocked state). Phase comparator N-channel open drain output for an external charge pump. Phase can be selected via programming of the FC bit. Phase comparator CMOS output for an external charge pump. Phase can be selected via programming of the FC bit. Descriptions
14
13
LD/fOUT
O
15 16
14 15
P R
O O
16-pin SSOP
16-pad BCC
OSCIN R OSCOUT VP VCC DO GND Xfin 1 2 3 4 5 6 7 8 TOP VIEW 16 15 14 13 12 11 10 9 P LD/fOUT ZC PS LE Data
OSCIN OSCOUT VP VCC DO GND Xfin fin
1 2 3 4 5 6 7 8
16 15 14 TOP 13 VIEW 12 11 10 9
R P LD/fOUT ZC PS LE Data Clock
fin Clock
FPT-16P-M05
LCC-16P-M06
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Block Diagram
fr Crystal oscillator circuit
Phase comparator
(16) OSCIN 1
(15) 16 R
(1) OSCOUT 2
Binary 14-bit reference counter
(14) 15 P SW FC LDS CS
Lock detector
(2) VP 3
14-bit latch .. C N T
4-bit latch fp
LD/fr/fp selector
(13) 14 LD fOUT
(3) VCC 4
19-bit shift register
(12) 13 ZC
...
Current switch Charge pump
...
7-bit latch Binary 7-bit swallow counter
11-bit latch
Binary 11-bit programmable counter
(4) DO 5
Intermittent mode control (power save)
(11) 12 PS
(5) GND 6 1-bit control latch (6) Xfin 7 Prescaler
E03, E05: 64/65, 128/129
(10) 11 LE
MD
(9) 10 Data
(7) fin 8
E07: 32/33, 64/65
(8) 9 Clock
: SSOP ( ) : BCC
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Absolute Maximum Ratings
Parameter Power supply voltage Input voltage Output voltage Storage temperature Symbol VCC VP VI VO VO Tstg Condition - - - Except Do Do - Rating Min. -0.5 VCC -0.5 GND GND -55 Max. 4.0 6.0 VCC +0.5 VCC VP +125 Unit V V V V V C Remark
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Recommended Operating Conditions
Parameter Power supply voltage Input voltage Operating temperature Symbol VCC VP VI Ta Value Min. 2.4 VCC GND -40 Typ. 3.0 - - - Max. 3.6 5.5 VCC +85 Unit V V V C Remark
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device's electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their Fujitsu representative beforehand.
Handling Precautions
* This device should be transported and stored in anti-static containers. * This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded. Cover workbenches with grounded conductive mats. * Always turn the power supply off before inserting or removing the device from its socket. * Protect leads with a conductive sheet when handling or transporting PC boards with devices.
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Electrical Characteristics
Device Specifications
Parameter Power supply current Power-saving current Operating frequency Symbol ICCRF*1 IPSRF*2 finRF OSCin*3 MB15E03SL 2.0 mA 0.1A 0.1 - 1.2 GHz 3 - 40 MHz
VCC = 2.4 to 3.6 V, Ta = -40 to +85C
MB15E05SL 3.0 mA 0.1A 0.1 - 2.0 GHz 3 - 40 MHz MB15E07SL 3.5 mA 0.1A 0.1 - 2.5 GHz 3 - 40 MHz
General Specifications
Parameter Input sensitivity finRF OSCIN Input voltage Data, Clock, LE, PS, ZC Data, Clock, LE, PS Input current OSCIN ZC P Output voltage R, LD/fOUT Do High impedance cutoff current Do P R, LD/fOUT Output current Do IDOL IDOL/IDOH Charge pump current characteristics vs VDO vs Ta Note: See footnotes on next page. IDOMT*5 IDOVD*6 IDOTA*7 Symbol PfinRF VOSC VIH VIL IIH*4 IIL*4 IIH IIL*4 IIH IIL*4 Pull up input Open drain output VCC = VP = 3.0V, IOH = -1 mA VCC = VP = 3.0V, IOL = 1 mA VCC = VP = 3.0V, IOH = -0.5 mA VCC = VP = 3.0V, IOL = 0.5 mA VCC = VP = 3.0V VOFF = .5V to VP-0.5V Open drain output VCC = 3.0V VCC = 3.0V VCC = VP = 3.0 , VDOH = VP/2, Ta = +25C VCC = VP = 3.0V, VDOL= VP/2, Ta = +25C VDO = VCC/2 0.5V VDO VCC - 0.5V -40C Ta +85C, VDO = VCC/2 CS bit = "H" CS bit = "L" CS bit = "H" CS bit = "L" Condition 50 load system (Refer to measurement circuit.) - - - - - - - - Value Min. -15 0.5 VCC x 0.7 - -1.0 -1.0 0 -100 -1.0 -100 - VCC -0.4 - VCC -0.4 - - 1.0 - 1.0 - - - - - - - Typ. - - - - - - - - - - - - - - - - - - - -6.0 -1.5 6.0 1.5 3 10 10 Max. +2 VCC - VCC x 0.3 1.0 1.0 100 0 1.0 0 0.4 - 0.4 - 0.4 2.5 -1.0 - - - - - - - - - Unit dBm Vp-p V A A A V V
VOL
VOH
VOL
VDOH VDOL IOFF IOL IOH*4 IOL IDOH*4
V nA mA mA mA mA mA mA mA % % %
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Single PLL Frequency Synthesizers with On-Chip Prescalers
*1 *2 *3 *4 *5 *6 *7 Conditions: fosc = 12 MHz, Ta = +25C in locking state, VCC = 2.7 V VCCIF = VCCRF = 3.0 V, fosc = 12.8 MHz, Zc = "H" or open, Ta = +25C in power-saving mode AC coupling. 1000pF capacitor is connected under the condition of minimum operating frequency. The symbol "-" (minus) means direction of current flow. VCC = 3.0 V, Ta = +25C (|I3| - |I4|)/[(|I3| + |I4|)/2] x 100(%) VCC = 3.0 V, Ta = +25C [(|I2| - |I1|)/2]/[(|I1| + |I2|)/2] x 100(%) (Applied to each IDOL, IDOH) VCC = 3.0 V, [|IDO(85C) - IDO(-40C)|/2]/[|IDO(85C) + IDO(-40C)|/2] x 100(%) (applied to each IDOL, IDOH)
I1 IDOL
I3 I2
IDOH
I2
I4 I1 0.5 Vcc/2 Vcc - 0.5 V Vcc
Charge Pump Output Voltage (V)
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Measurement Circuit (For Measuring Input Sensitivity of fin and OSCIN)
1000 pF 1000 pF S*G 50 fin 8 Xfin GND 7 6 DO 5 VCC 4 VP OSCOUT OSCIN 3 2 1 50 0.1 F 0.1 F 1000 pF S*G
9
10
11
12 PS VCC
13
14
15
16 R Oscilloscope
Clock Data LE Controller (setting divide ratio) Note: 16-pin SSOP
ZC LD/fout P
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E03SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity - Input frequency (Prescaler 64/65)
10 Input sensitivity Vfin (dBm) Input sensitivity Pfin (dBm) 0 -10 -20 -30 -40 -50 0 500 1000 Input frequency fin (MHz) 1500 2000
;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;
SPEC
Ta = +25 C
VCC = 2.4 V VCC = 2.7 V VCC = 3.0 V VCC = 3.6 V
Input Sensivity of OSCIN versus Input Frequency
10
Input sensitivity VOSC (dBm) Input sensitivity Posc (dBm)
0 -10 -20 -30 -40 -50 -60
;;;;; ;;;;;
SPEC
Input sensitivity - Input frequency
Ta = +25 C
VCC = 2.4 V VCC = 3.0 V VCC = 3.6 V 0 50 Input frequency fOSC (MHz) 100
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Typical Electrical Characteristics: MB15E03SL
Input Impedance
1 : 297.63 -656.53 100 MHz 2 : 24.523 -185.55 400 MHz 3 : 9.3789 -77.168 800 MHz 4 : 10.188 -33.143 1.2 GHz
fin Pin
1
4
2
3
START 100.000 000 MHz
STOP 1 200.000 000 MHz
1:
9.063 k -3.113 k 3 MHz 3.8225 -4.6557 k 10 MHz 1.5735 -3.2154 k 20 MHz 405.69 -1.8251 k 40 MHz
2:
3:
OSCIN Pin
4 1 3 4: 3
START 3.000 000 MHz
STOP 40.000 000 MHz
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E03SL
Do ouput current: 1.5 mA mode
VDO - IDO
10.00 Charge pump output current IDO (mA)
Ta = +25 C
VCC = 3.0 V Vp = 3.0 V
2.000 /div 0
IOL
IOH
- 10.00
0
.6000/div Charge pump output voltage VDO (V)
4.800
Do ouput current: 6.0 mA mode
VDO - IDO
Ta = +25 C
10.00 Charge pump output current IDO (mA) IOL 2.000 /div 0
VCC = 3.0 V Vp = 3.0 V
IOH
- 10.00
0
.6000/div Charge pump output voltage VDO (V)
4.800
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Reference Information: MB15E03SL
Test Circuit S.G OSCIN fin Do LPF fVCO = 810.45 MHz KV = 17 MHz/V fr = 25 kHz fOSC = 14.4 MHz LPF VCC =VP = 3.0 V VVCO = 2.3 V Ta = +25 C CP : 6 mA mode 9.1 k
Spectrum Analyzer
4700 pF VCO
4.2 k 0.047 F
1500 pF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
PLL Reference Leakage @ 25 kHz offset = -79.8 dBc
ATTEN 10 dB RL - 5.0 dBm MKR - 79.83 dB 25.0 kHz
PLL Phase Noise @ max within loop band = -73.0 dBc/Hz
ATTEN 10 dB RL - 5.0 dBm MKR - 53.00 dB 2.23 kHz
79.8 dBc
73.0 dBc/Hz
* RBW
CENTER 810.42500 MHz 1.0 kHz VBW 1.0 kHz
* SWP
SPAN 200.0 kHz 1.00 sec
* RBW
CENTER 810.42500 MHz 100 Hz VBW 100 Hz
* SWP
SPAN 20.00 kHz 3.00 sec
PLL Lock Up Time = 1.4 ms (810.425 MHz 826.425 MHz, within 1kHz)
826.430 830.00500 MHz MHz
PLL Lock Up Time = 1.52 ms (826.425 MHz 810.425 MHz, within 1kHz)
810.430 830.00500 MHz MHz
2.00 2.00 KHz/div KHz/div
2.00 2.00 KHz/div KHz/div
829.99500 826.420 MHz MHz 5.0000000 ms
829.99500 810.420 MHz
MHz
5.0000000 ms
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E05SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity - Input frequency 10 0 -10 -20 -30 -40 -50 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400
Input sensitivity Pfin (dBm) Input sensitivity Vfin (dBm)
;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;
SPEC 2600
Ta = +25 C
VCC = 2.4 V VCC = 2.7 V VCC = 3.0 V VCC = 3.6 V 2800 3000
Input frequency fin (MHz)
Input Sensivity of OSCIN Versus Input Frequency
10 Input sensitivity VOSC (dBm) Input sensitivity Posc (dBm) 0 -10 -20 -30 -40 -50 -60
;;;;;; ;;;;;;
SPEC
Input sensitivity - Input frequency
Ta = +25 C
VCC = 2.4 V VCC = 3.0 V VCC = 3.6 V 0 50 100 Input frequency fOSC (MHz) 150 200
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Typical Electrical Characteristics: MB15E05SL
Input Impedance
1 : 20.219 -161.11 500 MHz 2: 9.625 -64.082 1 GHz
fin Pin
4
3 : 17.807 -23.918 1.5 GHz
4 : 30.647 -18.134 2.0 GHz
3 1
2 START 100.000 000 MHz STOP 2 000.000 000 MHz
1 : 8.0005 k -1.9708 k 3 MHz 2 : 4.1825 k -3.9273 k 10 MHz 3 : 1.8909 k -3.2791 k 20 MHz
OSCIN Pin
4
3 2 573 1 4: -1.9271 k 40 MHz
START
3.000 000 MHz
STOP
40.000 000 MHz
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E05SL
Do ouput current: 1.5 mA mode
VDO - IDO Ta = +25 C VCC = 3.0 V Vp = 3.0 V
10.00 Charge pump output current IDO (mA)
2.000 /div
IDOL
0 IDOH
-10.00 0 VO .6000/div (V) Charge pump output voltage VDO (V) 4.800
Do ouput current: 6.0 mA mode
VDO - IDO Ta = +25 C VCC = 3.0 V Vp = 3.0 V IDOL
10.00 Charge pump output current IDO (mA)
2.000 /div
0
IDOH -10.00 0 VO .6000/div (V) Charge pump output voltage VDO (V) 4.800
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Reference Information: MB15E05SL
Test Circuit S.G OSCIN fin Do LPF
ATTEN 10 dB RL fVCO = 1607 -10.0 dBm
VCC MHz 10 dB/ =VP = 3.0 V 25.0 kHz KV = 28 MHz/V VVCO = 2.1 V fr = 25 kHz Ta = +25 C fOSC = 14.4 MHz CP : 6 mA mode LPF 9.1 k
MKR -70.50 dB
Spectrum Analyzer
3300 pF VCO
5.6 k 33000 pF
1500 pF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
RF PLL Reference Leakage @ 25 kHz offset = -70.5 dBc
ATTEN 10 dB RL -10.0 dBm 10 dB/ MKR -70.50 dB 25.0 kHz
RF PLL Phase Noise 200.0 kHz CENTER 1.6070000 GHz SPAN RBW @ max1.0 kHz loopVBW 1.0 kHz -65 SWP 500 ms within band = dBc/Hz
ATTEN 10 dB RL -10.0 dBm 10 dB/ MKR -45.00 dB 2.20 kHz
-65 dBc/Hz -70.5 dBc
CENTER 1.6070000 GHz VBW 1.0 kHz RBW 1.0 kHz ATTEN 10 dB RL -10.0 dBm
SPAN 200.0 kHz SWP 500 ms
CENTER 1.6070000 GHz VBW 100 Hz RBW 100 Hz
SPAN 20.00 kHz SWP 1.60 sec
10 Up 2.20 kHz RF PLL LockdB/ Time = 1.46 ms 1607 MH1631 MHz within 1 kHz (1607.000 MHz 1631.000 MHz, within 1kHz) LchHch 1.46 ms
PLL Lock Up time MKR -45.00 dB
RF PLL Lock Up Time = 1.37 ms 1631 MH1607 MHz within 1 kHz (1631.000 MHz 1.37 ms 1607.000 MHz, within 1kHz) HchLch
1.607005000 GHz
PLL Lock Up time
1.631005000 GHz
1.631001000 GHz
1.607001000 GHz
1.630097000 GHz
CENTER 1.6070000 GHz VBW 100 Hz RBW 100 Hz
SPAN 20.00 kHz SWP 1.60 sec
1.606997000 GHz 500.0 s/div
500.0 s/div
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E07SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity - Input frequency (Prescaler: 64/65) 20 10 0 -10 -20 -30 -40 -50 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 Input frequency fin (MHz) VCC = 2.4 V VCC = 3.0 V VCC = 3.6 V SPEC Ta = +25 C
Input Sensivity of fIN Versus Input Frequency
Input sensitivity - Input frequency (Prescaler: 32/33) 10 0 Input sensitivity Pfin (dBm) SPEC -10 -20 -30 -40 -50 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 Ta = +25 C
Input sensitivity Pfin (dBm)
VCC = 2.7 V VCC = 3.0 V VCC = 3.6 V
Input frequency fin (MHz)
Input Sensivity of OSCIN Versus Input Frequency
Input sensitivity - Input frequency 10 SPEC Input sensitivity POSC (dBm) 0 -10 -20 -30 -40 -50 -60 0 50 100 Input frequency fOSC (MHz) 150 200 VCC = 2.4 V VCC = 3.0 V VCC = 3.6 V Ta = +25 C
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Typical Electrical Characteristics: MB15E07SL
Input Impedance
1 : 12.646 -57.156 1 GHz 2 : 22.156 -12.136 1.5 GHz 4 3 : 33.805 11.869 2 GHz
fin Pin
3 2
4 : 23.715 8.9629 2.5 GHz
1 START 500.000 000 MHz STOP 2 500.000 000 MHz
1:
9.917 -3.643 3 MHz
2 : 3.7903 -4.812 10 MHz 3: 1.574 -3.4046 20 MHz
OSCIN Pin
4
3 2 1 4 : 453.12 -1.9213 40 MHz
START
1.000 000 MHz
STOP
50.000 000 MHz
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E07SL
Do ouput current: 1.5 mA mode
VDO - IDO Ta = +25C VCC = 3.0 V Vp = 3.0 V
10.00
Charge pump output current IDO (mA)
2.000 /div
IDOL
0
IDOH
-10.00 0 .6000/div Charge pump output voltage VDO (V) 4.800
Do ouput current: 6.0 mA mode
VDO - IDO Ta = +25C VCC = 3.0 V Vp = 3.0 V IDOL 2.000 /div
10.00
Charge pump output current IDO (mA)
0
IDOH
-10.00 0 .6000/div Charge pump output voltage VDO (V) 4.800
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Reference Information: MB15E07SL
Test Circuit S.G OSCIN fin Do LPF fVCO = 810.45 MHz KV = 17 MHz/V fr = 25 kHz fOSC = 14.4 MHz LPF VCC =VP = 3.0 V VVCO = 2.3 V Ta = +25 C CP : 6 mA mode 9.1 k
Spectrum Analyzer
4700 pF VCO
4.2 k 0.047 F
1500 pF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
PLL Reference Leakage @ 25 kHz offset = -78 dBc
REF -5.0 dBm 10 dB/ ATT 10 dB MKR 25.0 kHz -78.0 dB
PLL Phase Noise @ max within loop band = -73.1 dBc/Hz
REF -5.0 dBm 10 dB/ ATT 10 dB MKR 2.28 kHz -53.1 dB
-73.1 dBc/Hz
RBW 1 kHz SAMPLE VBW 1 kHz
-78.0 dBc
RBW 100 Hz SAMPLE VBW 100 Hz
SWP 1.0 s
SPAN 200 kHz
CENTER 810.000 MHz
SWP 10 s
SPAN 20.0 kHz
CENTER 810.000 MHz
PLL Lock Up Time = 1.3 ms (810.000 MHz 826.000 MHz, within 1kHz)
826.004000 MHz
PLL Lock Up Time = 1.28 ms (826.000 MHz 810.000 MHz, within 1kHz)
810.004000MHz
826.000000 MHz
810.000000MHz
825.996000 MHz 500.0 s/div
809.996000MHz 500.0 s/div
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
The VCO output frequency can be calculated using the following equation: fVCO = {(M x N) + A} x fOSC / R (A < N) fVCO Output frequency of external voltage controlled ocillator (VCO) M Preset divide ratio of dual modulus prescaler (64 or 128 for MB15E03SL, MB15E05SL) (32 or 64 for MB15E07SL) N Preset divide ratio of binary 11-bit programmable counter (3 to 2,047) A Preset divide ratio of binary 7-bit swallow counter (0 A 127) fOSC Reference oscillation frequency R Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)
Serial Data Input
Serial data is entered using the Data, Clock and LE pins. The serial data controls the programmable reference counters and the programmable counters separately. Binary serial data is entered through the Data pin when the LE pin is held low. One bit of data is shifted into the shift register on the rising edge of the Clock. When the LE signal pin is taken high, entered data is latched into the appropriate counters according to the control bit settings as follows:
Table 1. Control Bits
Control Bit (CNT) H L Destination of Serial Data Programmable reference counter latch Programmable counter latch
Shift Register Configuration
Programmable Reference Counter
LSB Data Flow 1 C N T 2 R 1 3 R 2 4 R 3 5 R 4 6 R 5 7 R 6 8 R 7 9 R 8 10 R 9 11 R 10 12 R 11 13 R 12 14 R 13 15 R 14 16 17 18 19 MSB
SW
FC
LDS
CS
CNT R1 to R14 SW FC LDS CS
Control bit Divide ratio setting bits for the programmable reference counter (3 to 16,383) Divide ratio setting bit for the prescaler Phase control bit for the phase comparator LD/fOUT signal select bit Charge pump current select bit
[Table 1] [Table 2] [Table 5] [Table 6] [Table 7] [Table 8]
Note: Input data with MSB first.
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Functional Descriptions
Shift Register Configuration
Programmable Counter
LSB Data Flow 1 C N T 2 A 1 3 A 2 4 A 3 5 A 4 6 A 5 7 A 6 8 A 7 9 N 1 10 N 2 11 N 3 12 N 4 13 N 5 14 N 6 15 N 7 16 N 8 17 N 9 18 N 10 19 N 11 MSB
CNT N1 to N11 A1 to A7
Control bit Divide ratio setting bits for the programmable counter (3 to 2,047) Divide ratio setting bits for the swallow counter (0 to 127)
[Table 1] [Table 3] [Table 4]
Note: Input data with MSB first.
Table 2. Binary 14-Bit Programmable Reference Counter Data Setting
Divide ratio (R) 3 4 . 16383 R 14 0 0 . 1 R 13 0 0 . 1 R 12 0 0 . 1 R 11 0 0 . 1 R 10 0 0 . 1 R 9 0 0 . 1 R 8 0 0 . 1 R 7 0 0 . 1 R 6 0 0 . 1 R 5 0 0 . 1 R 4 0 0 . 1 R 3 0 1 . 1 R 2 1 0 . 1 R 1 1 0 . 1
Note: Divide ratio less than 3 is prohibited.
Table 3. Binary 11-Bit Programmable Counter Data Setting
Divide ratio (N) 3 4 . 2047 N 11 0 0 . 1 N 10 0 0 . 1 N 9 0 0 . 1 N 8 0 0 . 1 N 7 0 0 . 1 N 6 0 0 . 1 N 5 0 0 . 1 N 4 0 0 . 1 N 3 0 1 . 1 N 2 1 0 . 1 N 1 1 0 . 1
Note: Divide ratio less than 3 is prohibited.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
Table 4. Binary 7-Bit Swallow Counter Data Setting
Divide Ratio (A) 0 1 . 127 A 7 0 0 . 1 A 6 0 0 . 1 A 5 0 0 . 1 A 4 0 0 . 1 A 3 0 0 . 1 A 2 0 0 . 1 A 1 0 1 . 1
Note: Divide ratio (A) range = 0 to 127
Table 5. Prescaler Data Setting for MB15E03SL, MB15E05SL (SW Bit)
SW H L Prescaler Dived Ratio 64/65 128/129
Prescaler Data Setting for MB15E07SL (SW Bit)
SW H L Prescaler Dived Ratio 32/33 64/65
Relationship Between the FC Input and Phase Characteristics
The FC bit changes the phase characteristics of the phase comparator. Both the internal charge pump output level (D O) and the phase comparator output (fr, fp) are reversed according to the FC bit setting. Also, the monitor pin (f OUT) output is controlled by the FC bit. The relationship between the FC bit setting and each of DO, fr, and fp is shown below.
Table 6. FC Bit Data Setting (LDS = "H")
FC = High Do fr > fP fr < fP fr = fP H L Z* fR L H L fP L Z* Z* fout = fr LD/fout Do L H Z* fR H L L FC = Low fP Z* L Z* fout = fp LD/fout
* High impedance
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Functional Descriptions
PLL LPF VCO
(1)
VCO Output Frequency (2) LPF Output Voltage (1) When the LPF and VCO characteristics are similar to (1), set the FC bit high. (2) When the VCO characteristics are similar to (2), set the FC bit low.
Table 7. LD/fOUT Output Select Data Setting (LDS Bit)
LDS H L LD/fOUT Output Signal fOUT signals LD signals
Table 8. Charge Pump Current Setting (CS Bit)
CS H L Current Value 6.0 mA 1.5 mA
Table 9. Do Output Impedance Pin Setting (ZC Pin)
CS H L Do Output Normal output High impedance
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
Power-Saving Mode (Intermittent Mode Control)
The Intermittent Mode Control circuit greatly reduces the PLL power consumption by shutting down various internal functions, depending upon the settings of the power-save (PS) pins. (See the Electrical Characteristics chart for the specific value of current when the device is in the power-saving mode.) In this mode, the phase detector output, Do, becomes high impedance. Setting the PS pin high releases the power-saving mode, returning the selected PLL to normal operation.
When power (VCC) is first applied, the device must be in standby mode, PS = Low, for at least 1s.
The intermittent mode control circuit also ensures a smooth startup when the device returns to normal operation, at which time the phase comparator output signal is unpredictable due to the unknown relationship between the comparison frequency (fp) and the reference frequency (fr). This can cause a major change in the comparator output, resulting in a VCO frequency jump and an increase in lockup time. To prevent this the Intermittent Mode Control circuit limits the magnitude of the error signal from the phase detector when it returns to normal operation.
Table 10. Power Save Pin Setting (PS Pins)
PS Pins H L Status Normal mode Power saving mode
Power-ON Timing
VCC Clock Data LE PS
OFF tV 1 S
ON
tPS 100 nS
(1)
(2)
(3)
(1) PS = L (power-saving mode) at Power ON (2) Set serial data 1 s later after power supply remains stable (VCC > 2.2V). (3) Release power-saving mode (PS: L H) 100 ns later after setting serial data.
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Serial Data Input Timing
1st. data 2nd. data
Control bit
Invalid data
Data
MSB
LSB
Clock
t1 t7 t2 t5 t4
LE
t3 t6
Table 11. Timing Parameters
Parameter t1 t2 t3 t4 Min. 20 20 30 30 Typ. - - - - Max. - - - - Unit ns ns ns ns Parameter t5 t6 t7 Min. 100 20 100 Typ. - - - Max. - - - Unit ns ns ns
On the rising edge of the clock, one bit of the data is transferred into the shift register. Note: LE should be "L" when the data is transferred into the shift register.
Fujitsu Microelectronics, Inc.
25
Single PLL Frequency Synthesizers with On-Chip Prescalers
Phase Detector Output Waveform
fr
fp
tWU LD
tWL
(FC bit = High) H Do Z L
(FC bit = Low) Do Z
Notes:
1) Phase error detection range: -2 to +2 2) Pulses on Do signal during locked state are output to prevent dead zone. 3) LD output becomes low when phase is tWU or more. LD output becomes high when phase error is tWL or less and continues to be so for three cycles or more. 4) tWU and tWL depend on OSCIN input frequency. tWU > 2/fosc (s) (e. g. tWU > 156.3ns, fosc = 12.8MHz) tWU < 4/fosc (s) (e. g. tWL < 312.5ns, fosc = 12.8MHz) 5) LD becomes high during the power-saving mode (PS = "L").
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Application Example
VP 10 k 12 k 12 k LPF VCO
OUTPUT
10 k Lock Det. From a controller
R 16
P 15
LD/fout 14
ZC 13
PS 12
LE 11
Data 10
Clock 9
MB15ExxSL MB15E05SL
1 OSCIN
2 OSCOUT
3 VP
4 VCC
5 DO
6 GND
7 Xfin
8 fin 1000 pF
1000 pF 1000 pF TCXO 0.1 F 0.1 F
VP: 5.5V Max Notes: 1) 16-pin SSOP 2) In case of using a crystal resonator, it is necessary to optimize matching between the crystal and this device, and it is advised to perform a detailed system evaluation. It is also recommended to consult with the supplier of the crystal resonator. (The reference oscillator circuit provides its own bias)
Fujitsu Microelectronics, Inc.
27
Single PLL Frequency Synthesizers with On-Chip Prescalers
Usage Precautions
To protect against damage by electrostatic discharge, note the following handling precautions: * Store and transport devices in conductive containers. * Use properly grounded workstations, tools and equipment. * Turn off power before inserting or removing this device into or from a socket. * Protect leads with conductive sheet when transporting a board mounted device.
Ordering Information
Part Number MB15ExxSLPFV1 MB15ExxSLPV1 Package 16 pin, Plastic SSOP (FPT-16P-M05) 16 pin, Plastic BCC (LCC-16P-M06)
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Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Package Dimensions
* 5.000.10(.197.004)
1.25 -0.10 .049 -.004
+0.20 +.008
(Mounting height)
0.10(.004)
INDEX
* 4.400.10
(.173.004)
6.400.20 (.252.008)
5.40(.213) NOM
0.650.12 (.0256.0047)
0.22 -0.05 .009
+0.10 +.004 -.002
"A"
0.15 -0.02 .006 -.001
+0.05 +.002
Details of "A" part 0.100.10(.004.004) (STAND OFF)
4.55(.179)REF
0
10
0.500.20 (.020.008)
Dimensions in mm (inches)
Note: 16-pin, Plastic SSOP (FPT-16P-M05)
*These dimensions do not include resin protrusion.
Fujitsu Microelectronics, Inc.
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Single PLL Frequency Synthesizers with On-Chip Prescalers
Package Dimensions
4.550.10 (.179.004)
14 9
0.80(.031)MAX Mounting height 0.400.10 (.016.004) 0.80(.031) REF 0.65(.026) TYP
9
3.40(.134)TYP 0.3250.10 (.013.004)
14
INDEX AREA 3.400.10 (.134.004) 2.45(.096) TYP "A" "B" 1.15(.045) REF
1
6
0.0750.025 (.003.001) (Stand off)
6
1.725(.068) REF
1
Details of "A" part 0.750.10 (.030.004) 0.05(.002)
Details of "B" part 0.600.10 (.024.004)
0.400.10 (.016.004)
0.600.10 (.024.004)
Dimensions in mm (inches)
Note: 16-pad, Plastic BCC (LCC-16P-M06)
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Fujitsu Microelectronics, Inc.
(c)2001 Fujitsu Microelectronics, Inc. All rights reserved. All company and product names are trademarks or registered trademarks of their respective owners. With respect to any information contained in this document, Fujitsu makes no warranties, express, implied or otherwise, including but not limited to warranty of merchantability or of fitness for a particular purpose, or warranty that such information shall be free from errors or that such errors shall be corrected, or warranty that such information shall be free from infringement or patents, patent applications, copyrights, semiconductor chip protection rights, trade secrets and other proprietary or legal rights of a third party. In no event will Fujitsu be responsible for any incidental or consequential damages arising out of use of this information. The information in this document does not convey any license under the copyrights, patent rights, or trademarks claimed and owned by Fujitsu Limited, its subsidiaries, or Fujitsu Microelectronics, Inc.
FUJITSU MICROELECTRONICS, INC.
Corporate Headquarters 3545 North First Street, San Jose, California 95134-1804 Tel: (800) 866-8608 Fax: (408) 922-9179 E-mail: fmicrc@fmi.fujitsu.com Web Site: http://www.fmi.fujistu.com
Fujitsu Microelectronics, Inc. reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form, or by any means, or transferred to any third party without prior written consent of Fujitsu Microelectronics, Inc. Printed in U.S.A. TC-DS-20787-07/2001

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