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MK1413 MPEG Audio Clock Source Description The MK1413 is the ideal way to generate clocks for MPEG audio devices in computers. The device uses ICS's proprietary mixture of analog and digital Phase-Locked Loop (PLL) technology to synthesize one of four frequencies from the 14.31818 MHz reference. In an 8-pin SOIC, the MK1413 can save component count, board space, and cost over crystals and oscillators, and increase reliability by eliminating three expensive mechanical devices from the board. ICS offers many other clocks for computers and computer peripherals. Consult ICS when you need to remove crystals and oscillators from your board. Features * Packaged in 8-pin SOIC * Input crystal or clock frequency of 14.31818 MHz * Provides master MPEG clocks for 32 kHz, 44.1 kHz, and 48 kHz sampling rates * Output clock frequencies of 8.192 MHz, 11.2896 MHz, 12.288 MHz, and 16.9344 MHz * Low jitter * 25 mA drive capability at TTL levels (at 5.0 V) * 3.3 V or 5.0 V (10%) supply voltage * Advanced, low-power CMOS process Block Diagram VDD S1:0 2 X1 14.31818 MHz crystal or clock X2 input Crystal Buffer/ Crystal Oscillator Clock Synthesis and Control Circuitry CLK Optional crystal load capacitors (see page 3 for details) GND MDS 1413 C 1 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1413 MPEG Audio Clock Source Pin Assignment X1 VDD GND NC 1 2 3 4 8 7 6 5 X2 S0 S1 CLK Audio Clock Output Selection Table S1 S0 Audio Clock (pin 5) Accuracy (ppm) 0 0 1 1 0 1 0 1 8.192 MHz 11.2896 MHz 12.288 MHz 16.9344 MHz -2 ppm -24 ppm -2 ppm -24 ppm 8-pin SOIC Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name X1 VDD GND NC CLK S1 S0 X2 Pin Type Input Power Power -- Output Input Input Output Connect to 3.3 V or 5 V. Connect to ground. No connect. Pin Description Crystal connection. Connect this pin to a 14.31818 MHz crystal or clock. Audio clock output as per table above. Frequency Select 1 input. Determines CLK output as per table above. Frequency Select 0 input. Determines CLK output as per table above. Crystal connection to a 14.31818 MHz crystal or leave unconnected for clock input. MDS 1413 C 2 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1413 MPEG Audio Clock Source Application Information Series Termination Resistor Clock output traces should use series termination. For series terminating a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line and as close to the clock output pin as possible. The nominal impedance of the clock output is 20. 1) Each 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. 2) The external crystal should be mounted next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces. 3) To minimize EMI, and obtain the best signal integrity, the 33 series termination resistor should be placed close to the clock output. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the MK1413. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Crystal Load Capacitors The device crystal connections should include pads for capacitors from X1 to ground and from X2 to ground, and a parallel rsonant 14.31818 MHz crystal is recommended. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. To reduce possible noise pickup, use very short PCB traces (and no vias) been the crystal and device. The value (in pF) of each crystal load capacitor should equal (CL -4) x2, where CL is the crystal's load (correlation) capacitance in pF. The frequency tolerance of the crystal should be 50 ppm or better.For a clock input, connect X1 and leave X2 unconnected. Because these capacitors adjust the stray capacitance of the PCB, check the output frequency using your final layout to see if the value of C should be changed. PCB Layout Recommendations Observe the following guidelines for optimum device performance and lowest output phase noise: MDS 1413 C 3 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1413 MPEG Audio Clock Source Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1413. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature (max of 10 seconds) 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 125C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +3.0 Typ. Max. +70 +5.5 Units C V DC Electrical Characteristics Unless stated otherwise, VDD = 5.0 V 10%, Ambient Temperature 0 to +70C Parameter Operating Voltage Input High Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Supply Current Supply Current Input Capacitance Synthesize Frequency Error Symbol VDD VIH VIL VOH VOH VOL IDD IDD CIN Conditions input clock only input clock only IOH = -4 mA IOH = -25 mA IOL = 25 mA 5 V, no Load 3.3 V, no Load S0, S1 pins With exact crystal Min. 3.0 (VDD/2)+1 VDD-0.4 2.4 Typ. VDD/2 VDD/2 Max. 5.5 (VDD/2)-1 Units V V V V V 0.4 12 7 7 25 V mA mA pF ppm MDS 1413 C 4 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1413 MPEG Audio Clock Source AC Electrical Characteristics Unless stated otherwise, VDD = 5.0 V 10%, Ambient Temperature 0 to +70 C Parameter Input Clock or Crystal Frequency Input Crystal Accuracy Input Clock Duty Cycle Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle Absolute Clock Period Jitter One Sigma, Clock Period Jitter Symbol Conditions Min. Typ. 14.31818 Max. Units MHz 50 Time above VDD/2 tOR tOF 0.8 to 2.0 V 2.0 to 0.8 V Time above VDD/2 40 50 200 70 20 80 1.5 1.5 60 ppm % ns ns % ps ps Note: Typical values are at 25C Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Symbol JA JA JA JC Conditions Still air 1 m/s air flow 3 m/s air flow Min. Typ. 150 140 120 40 Max. Units C/W C/W C/W C/W Thermal Resistance Junction to Case MDS 1413 C 5 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com MK1413 MPEG Audio Clock Source Package Outline and Package Dimensions (8-pin SOIC, 150 mil Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Inches Min Max Symbol Min Max E INDEX AREA H 12 D A A1 B C D E e H h L 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 A A1 h x 45 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number MK1413S MK1413STR Marking MK1413S MK1413S Shipping packaging Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 1413 C 6 Revision 020604 Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com |
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