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LT3471 Dual 1.3A, 1.2MHz Boost/Inverter in 3mm x 3mm DFN
FEATURES

DESCRIPTIO
1.2MHz Switching Frequency Low VCESAT Switches: 330mV at 1.3A High Output Voltage: Up to 40V Wide Input Range: 2.4V to 16V Inverting Capability 5V at 630mA from 3.3V Input 12V at 320mA from 5V Input -12V at 200mA from 5V Input Uses Tiny Surface Mount Components Low Shutdown Current: < 1A Low Profile (0.75mm) 10-Lead 3mm x 3mm DFN Package
The LT(R)3471 dual switching regulator combines two 42V, 1.3A switches with error amplifiers that can sense to ground providing boost and inverting capability. The low VCESAT bipolar switches enable the device to deliver high current outputs in a small footprint. The LT3471 switches at 1.2MHz, allowing the use of tiny, low cost and low profile inductors and capacitors. High inrush current at start-up is eliminated using the programmable soft-start function, where an external RC sets the current ramp rate. A constant frequency current mode PWM architecture results in low, predictable output noise that is easy to filter. The LT3471 switches are rated at 42V, making the device ideal for boost converters up to 40V as well as SEPIC and flyback designs. Each channel can generate 5V at up to 630mA from a 3.3V supply, or 5V at 510mA from four alkaline cells in a SEPIC design. The device can be configured as two boosts, a boost and inverter or two inverters. The LT3471 is available in a low profile (0.75mm) 10-lead 3mm x 3mm DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S

Organic LED Power Supply Digital Cameras White LED Power Supply Cellular Phones Medical Diagnostic Equipment Local 5V or 12V Supply TFT-LCD Bias Supply xDSL Power Supply
TYPICAL APPLICATIO
VIN 3.3V CONTROL 1 4.7k SHDN/SS1 0.33F 2.2H
OLED Driver
VOUT1 7V 350mA
90.9k SW1 FB1N FB1P VREF 0.1F 15k 15k
4.7F
EFFICIENCY (%)
VIN 10F CONTROL 2
VIN
LT3471 FB2N
4.7k 0.33F SHDN/SS2 GND 10H VIN 10F
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FB2P SW2 105k 1F 15H 75pF VOUT2 -7V 250mA
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OLED Driver Efficiency
95 90 85 80 75 70 65 60 55 50 0 100 200 IOUT (mA)
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VOUT1 = 7V
VOUT1 = -7V
300
400
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LT3471
ABSOLUTE
(Note 1)
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RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW FB1N FB1P VREF FB2P FB2N 1 2 3 4 5 11 10 SW1 9 SHDN/SS1 8 VIN 7 SHDN/SS2 6 SW2
VIN Voltage .............................................................. 16V SW1, SW2 Voltage ....................................- 0.4V to 42V FB1N, FB1P, FB2N, FB2P Voltage ....... 12V or VIN - 1.5V SHDN/SS1, SHDN/SS2 Voltage .............................. 16V VREF Voltage ........................................................... 1.5V Maximum Junction Temperature ......................... 125C Operating Temperature Range (Note 2) .. - 40C to 85C Storage Temperature Range ................. - 65C to 125C
ORDER PART NUMBER LT3471EDD
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 43C/ W, JC = 3C/ W EXPOSED PAD (PIN 11) IS GND MUST BE SOLDERED TO PCB
DD PART MARKING LBHM
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VIN = VSHDN = 3V unless otherwise noted.
PARAMETER Minimum Operating Voltage Reference Voltage
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN 0.991 0.987 1
TYP 2.1 1.000 1.4 0.1 0.03 2
MAX 2.4 1.009 1.013 0.2 0.08 3 100 4 1 1.4
UNITS V V V mA %/100A %/V mV nA mA A MHz % % %
Reference Voltage Current Limit Reference Voltage Load Regulation Reference Voltage Line Regulation Error Amplifier Offset FB Pin Bias Current Quiescent Current Quiescent Current in Shutdown Switching Frequency Maximum Duty Cycle
(Note 3) 0mA IREF 100A (Note 3) 2.6V VIN 16V Transition from Not Switching to Switching, VFBP = VFBN = 1V (Note 3) VSHDN = 1.8V, Not Switching VSHDN = 0.3V, VIN = 3V
60 2.5 0.01 1 1.2 94 15 90 86 1.5 0.9
Minimum Duty Cycle Switch Current Limit Switch VCESAT Switch Leakage Current SHDN/SS Input Voltage High SHDN Input Voltage Low SHDN Pin Bias Current Quiescent Current 1A VSHDN = 3V, VIN = 4V VSHDN = 0V At Minimum Duty Cycle At Maximum Duty Cycle (Note 4) ISW = 1.3A (Note 5) VSW = 5V 1.8
2.05 1.45 330 0.01
2.6 2.0 440 1 0.3
22 0
36 0.1
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT3471E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 3: Current flows out of the pin. Note 4: See Typical Performance Characteristics for guaranteed current limit vs duty cycle. Note 5: VCESAT is 100% tested at wafer level.
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LT3471 TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current vs Temperature
2.6 1.010
QUIESCENT CURRENT (mA)
2.4
VREF (V)
2.2
2.0
1.8
1.6 -50
-25
50 25 0 75 TEMPERATURE (C)
SHDN/SS Current vs SHDN/SS Voltage
2.2 VIN = 3.3V CURRENT LIMIT (A) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 SHDN/SS VOLTAGE 1V/DIV
3741 G04
VCESAT (mV)
SHDN/SS CURRENT 20V/DIV VIN > VSHDN/SS
Oscillator Frequency vs Temperature
1.50 1.45 1.40
FREQUENCY (MHz)
2.0 1.8 1.6
1.35 1.30 1.25 1.20 1.15 1.10 1.05 1.00 -50 -25 50 25 0 75 TEMPERATURE (C) 100 125
SWITCH CURRENT (A)
UW
100
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VREF Voltage vs Temperature
VREF Voltage vs VREF Current
1.005
1.000
VREF VOLTAGE 100mV/DIV
0.995
125
0.990 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
VREF CURRENT 200A/DIV
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Current Limit vs Duty Cycle
TA = 25C TYPICAL
800 700 600
Switch Saturation Voltage vs Switch Current
GUARANTEED
90C 500 25C 400 300 200 100 0
0
0
20
60 40 DUTY CYCLE (%)
80
100
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0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 SW CURRENT (A)
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Peak Switch Current vs SHDN/SS Voltage
TA = 25C
Start-Up Waveform (Figure 2 Circuit)
ISUPPLY 1A/DIV VOUT1 2V/DIV VOUT2 5V/DIV CONTROL 1 AND 2 5V/DIV 0.5ms/DIV
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1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2.0 VSHDN/SS (V)
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PI FU CTIO S
FB1N (Pin 1): Negative Feedback Pin for Switcher 1. Connect resistive divider tap here. Minimize trace area at FB1N. Set VOUT = VFB1P(1 + R1/R2), or connect to ground for inverting topologies. FB1P (Pin 2): Positive Feedback Pin for Switcher 1. Connect either to VREG or a divided down version of VREG, or connect to a resistive divider tap for inverting topologies. VREF (Pin 3): 1.00V Reference Pin. Can supply up to 1mA of current. Do not pull this pin high. Must be locally bypassed with no less than 0.01F and no more than 1F. A 0.1F ceramic capacitor is recommended. Use this pin as the positive feedback reference or connect a resistor divider here for a smaller reference voltage. FB2P (Pin 4): Same as FB1P but for Switcher 2. FB2N (Pin 5): Same as FB1N but for Switcher 2. SW2 (Pin 6): Switch Pin for Switcher 2 (Collector of internal NPN power switch). Connect inductor/diode here and minimize the metal trace area connected to this pin to minimize EMI. SHDN/SS2 (Pin 7): Shutdown and Soft-Start Pin. Tie to 1.8V or more to enable device. Ground to shut down. Softstart function is provided when the voltage at this pin is ramped slowly to 1.8V with an external RC circuit. VIN (Pin 8): Input Supply. Must be locally bypassed. SHDN/SS1 (Pin 9): Same as SHDN/SS2 but for Switcher 1. Note: taking either SHDN/SS pin high will enable the part. Each switcher is individually enabled with its respective SHDN/SS pin. SW1 (Pin 10): Same as SW2 but for Switcher 1. Exposed Pad (Pin 11): Ground. Connect directly to local ground plane. This ground plane also serves as a heat sink for optimal thermal performance.
BLOCK DIAGRA
2
FB1P
A1 1 FB1N
-
RC CC
8
VIN
1.00V REFERENCE
VREF
3
-
RAMP GENERATOR
9
SHDN/SS1
LEVEL SHIFTER
4
FB2P
+
A3 DRIVER A4 R Q
5
FB2N
-
LEVEL SHIFTER
RC CC
7
SHDN/SS2
-
RAMP GENERATOR
1.2MHz OSCILLATOR
Figure 1. Block Diagram
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-
+
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DRIVER A2 R Q
10 SW1
Q1
S
+
0.01
11 GND
6 SW2
Q2
S
+
0.01
GND
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LT3471
OPERATIO
The LT3471 uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Refer to the Block Diagram. At the start of each oscillator cycle, the SR latch is set, which turns on the power switch, Q1 (Q2). A voltage proportional to the switch current is added to a stabilizing ramp and the resulting sum is fed into the positive terminal of the PWM comparator A2 (A4). When this voltage exceeds the level at the negative input of A2 (A4), the SR latch is reset, turning off the power switch Q1 (Q2). The level at the negative input of A2 (A4) is set by the error amplifier A1 (A3) and is simply an amplified version of the difference between the negative feedback voltage and the positive feedback voltage, usually tied to the reference voltage VREG. In this manner, the error amplifier sets the correct peak current level to keep the output in regulation. If the error amplifier's output increases, more current is delivered to the output. Similarly, if the error decreases, less current is delivered. Each switcher functions independently but they share the same oscillator and thus the switchers are always in phase. Enabling the part is done by
APPLICATIONS INFORMATION
Duty Cycle The typical maximum duty cycle of the LT3471 is 94%. The duty cycle for a given application is given by:
DC = | VOUT | + | VD | - | VIN | | VOUT | + | VD | - | VCESAT |
Where VD is the diode forward voltage drop and VCESAT is in the worst case 330mV (at 1.3A) The LT3471 can be used at higher duty cycles, but it must be operated in the discontinuous conduction mode so that the actual duty cycle is reduced. Setting Output Voltage Setting the output voltage depends on the topology used. For normal noninverting boost regulator topologies: R1 VOUT = VFBP 1 + R2
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taking either SHDN/SS pin above 1.8V. Disabling the part is done by grounding both SHDN/SS pins. The soft-start feature of the LT3471 allows for clean start-up conditions by limiting the amount of voltage rise at the output of comparator A1 and A2, which in turn limits the peak switching current. The soft-start feature for each switcher is enabled by slowly ramping that switcher's SHDN/SS pin, using an RC network, for example. Typical resistor and capacitor values are 0.33F and 4.7k, allowing for a start-up time on the order of milliseconds. The LT3471 has a current limit circuit not shown in the Block Diagram. The switch current is constantly monitored and not allowed to exceed the maximum switch current (typically 1.6A). If the switch current reaches this value, the SR latch is reset regardless of the state of the comparator A2 (A4). Also not shown in the Block Diagram is the thermal shutdown circuit. If the temperature of the part exceeds approximately 160C, both latches are reset regardless of the state of comparators A2 and A4. The current limit and thermal shutdown circuits protect the power switch as well as the external components connected to the LT3471. where VFBN is connected between R1 and R2 (see the Typical Applications section for examples). Select values of R1 and R2 according to the following equation:
V R1 = R2 OUT VREF - 1
A good value for R2 is 15k which sets the current in the resistor divider chain to 1.00V/15k = 67A. VFBP is usually just tied to VREF = 1.00V, but VFBP can also be tied to a divided down version of VREF or some other voltage as long as the absolute maximum ratings for the feedback pins are not exceeded (see Absolute Maximum Ratings). For inverting topologies, VFBN is tied to ground and VFBP is connected between R1 and R2. R2 is between VFBP and
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LT3471
APPLICATIONS INFORMATION
VREF and R1 is between VFBP and VOUT (see the Applications section for examples). In this case: R1 VOUT = VREF R2 Select values of R1 and R2 according to the following equation:
V R1 = R2 OUT VREF
A good value for R2 is 15k, which sets the current in the resistor divider chain to 1.00V/15k = 67A. Switching Frequency and Inductor Selection The LT3471 switches at 1.2 MHz, allowing for small valued inductors to be used. 4.7H or 10H will usually suffice. Choose an inductor that can handle at least 1.4A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I2R power losses. Note that in some applications, the current handling requirements of the inductor can be lower, such as in the SEPIC topology where each inductor only carries one half of the total switch current. For better efficiency, use similar valued inductors with a larger volume. Many different sizes and shapes are available from various manufacturers. Choose a core material that has low losses at 1.2 MHz, such as ferrite core.
Table 1. Inductor Manufacturers
Sumida TDK Murata (847) 956-0666 (847) 803-6100 (714) 852-2001 www.sumida.com www.tdk.com www.murata.com
Soft-Start and Shutdown Features To shut down the part, ground both SHDN/SS pins. To shut down one switcher but not the other one, ground that switcher's SHDN/SS pin. The soft-start feature provides a way to limit the inrush current drawn from the supply upon start-up. To use the soft-start feature for either switcher, slowly ramp up that switcher's SHDN/SS pin. The rate of voltage rise at the output of the switcher's comparator (A1 or A3 for switcher 1 or switcher 2 respectively) tracks the rate of voltage rise at the SHDN/SS pin once the SHDN/SS
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pin has reached about 1.1V. The soft-start function will go away once the voltage at the SHDN/SS pin exceeds 1.8V. See the Peak Switch Current vs SHDN/SS Voltage graph in the Typical Performance Characteristics section. The rate of voltage rise at the SHDN/SS pin can easily be controlled with a simple RC network connected between the control signal and the SHDN/SS pin. Typical values for the RC network are 4.7k and 0.33F, giving start-up times on the order of milliseconds. This RC time constant can be adjusted to give different start-up times. If different values of resistance are to be used, keep in mind the SHDN/SS Current vs SHDN/SS voltage graph along with the Peak Switch Current vs SHDN/SS Voltage graph, both found in the Typical Performance Characteristics section. The impedance looking into the SHDN/SS pin depends on whether the SHDN/SS is above or below VIN. Normally SHDN/SS will not be driven above VIN, and thus the impedance looks like 100k in series with a diode. If the voltage of the SHDN/SS pin is above VIN, the impedance looks more like 50k in series with a diode. This 100k or 50k impedance can have a slight effect on the start-up time if you choose the R in the RC soft-start network too large. Another consideration is selecting the soft-start time so that the soft-start feature is dominated by the RC network and not the capacitor on VREF. (See VREF voltage reference section of the Applications Information for details.) CAPACITOR SELECTION Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multi-layer ceramic capacitors are an excellent choice, as they have extremely low ESR and are available in very small packages. X5R dielectrics are preferred, followed by X7R, as these materials retain the capacitance over wide voltage and temperature ranges. A 4.7F to 15F output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1F or 2.2F output capacitor. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a sufficient voltage rating. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the LT3471. A 4.7F to 10F input capacitor is
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APPLICATIONS INFORMATION
L1 2.2H VIN CONTROL 1 1.8V 0V RSS1 4.7k CSS1 0.33F 8 10F RSS2 4.7k CSS2 0.33F VIN LT3471 FB2N 7 SHDN/SS2 GND 11 L2 10H VIN D2 C4 10F
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SHDN/SS1
VIN 2.6V TO 4.2V Li-Ion CONTROL 2 1.8V 0V
Figure 2. Li-Ion OLED Driver Supply Current of Figure 2 During Start-Up without Soft-Start RC Network Supply Current of Figure 2 During Start-Up with Soft-Start RC Network
ISUPPLY 0.5A/DIV
VOUT1 2V/DIV
0.1ms/DIV
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sufficient for most applications. Table 2 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts.
Table 2. Ceramic Capacitor Manufacturers
Taiyo Yuden AVX Murata (408) 573-4150 (803) 448-9411 (714) 852-2001 www.t-yuden.com www.avxcorp.com www.murata.com
The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors can
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D1 10 SW1 FB1N FB1P VREF 1 2 3 C2 0.1F 5 4 R2 15k CPL 33pF R3 90.9k R4 15k VOUT1 7V C3 4.7F
FB2P SW2 6 C5 1F
L3 15H
R1 105k
C6 75pF VOUT2 -7V
C1, C2: X5R OR X7R 6.3V C3, C4: X5R OR X7R 10V C5: XR5 OR X7R 16V CPL: OPTIONAL
D1, D2: ON SEMICONDUCTOR MBRM-120 L1: SUMIDA CR43-2R2 L2: SUMIDA CDRH4D18-100 L3: SUMIDA CDRH4D18-150
ISUPPLY 0.5A/DIV
VOUT1 2V/DIV
0.2ms/DIV
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affect the stability of the overall system. The ESR of any capacitor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OS-CON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor (CPL) in parallel with the resistor (R3) between VOUT and VFB as shown in Figure 2. The frequency of the zero is determined by the following equation.
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LT3471
APPLICATIONS INFORMATION
Z = 1 2 * R3 * CPL
By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 35kHz to 55kHz. Figure 3 shows the transient response of the stepup converter from Figure 2 without the phase lead capacitor CPL. Although adequate for many applications, phase margin is not ideal as evidenced by 2-3 "bumps" in both the output voltage and inductor current. A 33pF capacitor for CPL results in ideal phase margin, which is revealed in Figure 4 as a more damped response and less overshoot.
VOUT 200mV/DIV AC COUPLED
IL1 0.5A/DIV AC COUPLED LOAD CURRENT 100mA/DIV AC COUPLED 50s/DIV
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Figure 3. Transient Response of Figure 2's Step-Up Converter without Phase Lead Capacitor
VOUT 200mV/DIV AC COUPLED
IL1 0.5A/DIV AC COUPLED LOAD CURRENT 100mA/DIV AC COUPLED 50s/DIV
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Figure 4. Transient Response of Figure 2's Step-Up Converter with 33pF Phase Lead Capacitor
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VREG VOLTAGE REFERENCE Pin 3 of the LT3471 is a bandgap voltage reference that has been divided down to 1.00V and buffered for external use. This pin must be bypassed with at least 0.01F and no more than 1F. This will ensure stability as well as reduce the noise on this pin. The buffer has a built-in current limit of at least 1mA (typically 1.4mA). This not only means that you can use this pin as an external reference for supplemental circuitry, but it also means that it is possible to provide a soft-start feature if this pin is used as one of the feedback pins for the error amplifier. Normally the softstart time will be dominated by the RC time constant discussed in the soft-start and shutdown section. However, because of the finite current limit of the buffer for the VREG pin, it will take some time to charge up the bypass capacitor. During this time, the voltage at the VREG pin will ramp up, and this action provides an alternate means for soft-starting the circuit. If the largest recommended bypass capacitor is used, 1F, the worst-case (longest) softstart function that would be provided from the VREF pin is: 1F * 1.00 V = 1.0ms 1.0mA Choose the RC network such that the soft-start time is longer than this time, or choose a smaller bypass capacitor for the VREF pin (but always larger than 0.01F) so that the RC network dominates the soft-starting of the LT3471. The voltage at the VREF pin can also be divided down and used for one of the feedback pins for the error amplifier. This is especially useful in LED driver applications, where the current through the LEDs is set using the voltage reference across a sense resistor in the LED chain. Using a smaller or divided down reference leads to less wasted power in the sense resistor. See the Typical Applications section for an example of LED driving applications. DIODE SELECTION A Schottky diode is recommended for use with the LT3471. For high efficiency, a diode with good thermal characteristics at high currents should be used such as the On
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LT3471
APPLICATIONS INFORMATION
Semiconductor MBRM120. This is a 20V diode. Where the switch voltage exceeds 20V, use the MBRM140, a 40V diode. These diodes are rated to handle an average forward current of 1.0A. In applications where the average forward current of the diode is less than 0.5A, use the Philips PMEG 2005, 3005, or 4005 (a 20V, 30V or 40V diode, respectively). LAYOUT HINTS The high speed operation of the LT3471 demands careful attention to board layout. You will not get advertised performance with careless layout. Figure 5 shows the recommended component placement.
CONTROL 1 CSS1 GND RSS1 GND CSS2 RSS2 GND C4 C1 L1 VOUT1 D1 SW1 10 C3 GND LT3471 PIN 11 GND VCC L2 L3 VOUT2 CONTROL 2
*
SW2 6
C5
9 SHDN/SS1
8
7 SHDN/SS2
FB1N 1 R4
FB1P 2
VREF 3 R2
FB2P 4
FB2N 5
R3 VOUT1
R1 VOUT2
C2
Figure 5. Suggested Layout Showing a Boost on SW1 and an Inverter on SW2. Note the Separate Ground Returns for All High Current Paths (Using a Multilayer Board)
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Compensation--Theory Like all other current mode switching regulators, the LT3471 needs to be compensated for stable and efficient operation. Two feedback loops are used in the LT3471: a fast current loop which does not require compensation, and a slower voltage loop which does. Standard Bode plot analysis can be used to understand and adjust the voltage feedback loop. As with any feedback loop, identifying the gain and phase contribution of the various elements in the loop is critical. Figure 6 shows the key equivalent elements of a boost converter. Because of the fast current control loop, the power stage of the IC, inductor and diode have been replaced by the equivalent transconductance amplifier gmp. gmp acts as a current source where the output current is proportional to the VC voltage. Note that the maximum output current of gmp is finite due to the current limit in the IC. From Figure 6, the DC gain, poles and zeroes can be calculated as follows:
*
D2 GND
2 2 * * RL * COUT 1 Error Amp Pole: P2 = 2 * * RO * CC 1 Error Amp Zero: Z1= 2 * * RC * CC 1 V DC GAIN: A = REF * gma * RO * gmp * RL * 2 VOUT 1 ESR Zero: Z2 = 2 * * RESR * COUT Output Pole: P1= RHP Zero: Z3 = VIN2 * RL 2 * * VOUT2 * L f High Frequency Pole: P3 > S 3 1 Phase Lead Zero: Z 4 = 2 * * R1 * CPL 1 Phase Lead Pole: P4 = R1 * R2 2 * * CPL * R1 + R2
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APPLICATIONS INFORMATION
Table 3. Bode Plot Parameters -
gmp VOUT CPL RESR COUT R1 RL VC RC CC RO CC: COMPENSATION CAPACITOR COUT: OUTPUT CAPACITOR CPL: PHASE LEAD CAPACITOR gma: TRANSCONDUCTANCE AMPLIFIER INSIDE IC gmp: POWER STAGE TRANSCONDUCTANCE AMPLIFIER RC: COMPENSATION RESISTOR RL: OUTPUT RESISTANCE DEFINED AS VOUT DIVIDED BY ILOAD(MAX) RO: OUTPUT RESISTANCE OF gma R1, R2: FEEDBACK RESISTOR DIVIDER NETWORK RESR: OUTPUT CAPACITOR ESR
+
gma
1.00V REFERENCE
-
R2
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Figure 6. Boost Converter Equivalent Model
The Current Mode zero is a right half plane zero which can be an issue in feedback control design, but is manageable with proper external component selection. Using the circuit of Figure 2 as an example, Table 3 shows the parameters used to generate the Bode plot shown in Figure 7.
70 60 50 40
GAIN (dB)
30 20 10 0 -10 -20 -30 100 GAIN PHASE 1k 10k 100k FREQUENCY (Hz) 1M
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Figure 7. Bode Plot of 3.3V to 7V Application
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Parameter RL COUT RESR RO CC CPL RC R1 R2 VOUT VIN gma gmp L fS
Value 20 4.7 10 0.9 90 33 55 90.9 15 7 3.3 50 9.3 2.2 1.2
Units F m M pF pF k k k V V mho mho H MHz
Comment Application Specific Application Specific Application Specific Not Adjustable Not Adjustable Adjustable Not Adjustable Adjustable Adjustable Application Specific Application Specific Not Adjustable Not Adjustable Application Specific Not Adjustable
+
From Figure 7, the phase is -115 when the gain reaches 0dB giving a phase margin of 65. This is more than adequate. The crossover frequency is 50kHz.
0 -50 -100 -150 -200 -250 -300 -350 -400
PHASE (DEG)
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TYPICAL APPLICATIO S
Li-Ion OLED Driver
L1 2.2H VIN CONTROL 1 1.8V 0V RSS1 4.7k CSS1 0.33F 8 C1 10F RSS2 4.7k CSS2 0.33F 7 VIN LT3471 FB2N SHDN/SS2 GND 11 FB2P SW2 6 C5 1F C6 75pF C4 10F
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SHDN/SS1
VIN 2.6V TO 4.2V Li-Ion CONTROL 2 1.8V 0V
EFFICIENCY (%)
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D1 10 SW1 FB1N FB1P VREF 1 2 3 VCONTROL C2 0.1F 0V TO 1V R5 20k R6 10k C6 33pF R3 90.9k R4 15k C3 4.7F VOUT1 7V 500mA WHEN VIN = 4.2V 350mA WHEN VIN = 3.3V 250mA WHEN VIN = 2.6V
5 4
R2 15k
L2 15H VIN
L3 15H D2
R1 105k
C1, C2: X5R OR X7R 6.3V C3, C4: X5R OR X7R 10V C5: XR5 OR X7R 16V C6: OPTIONAL
D1, D2: ON SEMICONDUCTOR MBRM-120 L1: SUMIDA CR43-2R2 L2: SUMIDA CDRH4D18-100 L3: SUMIDA CDRH4D18-150
VOUT2 -7V TO -4V -7V WHEN VCONTROL = 0V -4V WHEN VCONTROL = 1 -7V, 300mA WHEN VIN = 4.2V -7V, 250mA WHEN VIN = 3.3V -7V, 200mA WHEN VIN = 2.6V
Li-Ion OLED Driver Efficiency
95 90 85 80 75 70 65 60 55 50 0 100 300 200 IOUT (mA) 400 500 VOUT = -7V VIN = 2.6V VOUT = 7V VIN = 4.2V VIN = 3.3V VIN = 2.6V VIN = 4.2V VIN = 3.3V
3471 TA02b
3471f
11
LT3471
TYPICAL APPLICATIO S
Single Li-Ion Cell to 5V, 12V Boost Converter
L1 3.3H VIN CONTROL 1 1.8V OV RSS1 4.7k CSS1 0.33F 8 C1 4.7F 7 CSS2 0.33F SHDN/SS2 GND 11 VIN L2 6.8H VIN LT3471 FB2P FB2N SW2 6 D2 C6 220pF R3 54.9k R4 4.99k
3471 TA03
VIN 2.6V TO 4.2V CONTROL 2 1.8V 0V RSS2 4.7k
12
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D1 10 C5 100pF R1 20k R2 4.99k C2 0.1F 4 5 C3 10F
9
SW1 SHDN/SS1 FB1N FB1P VREF
1 2 3
VOUT1 5V 900mA IF VIN = 4.2V 630mA IF VIN = 3.3V 425mA IF VIN = 2.6V
C4 10F
VOUT2 12V 300mA IF VIN = 4.2V 210mA IF VIN = 3.3V 145mA IF VIN = 2.6V
C1-C3: X5R OR X7R 6.3V C4: X5R OR X7R 16V D1, D2: ON SEMICONDUCTOR MBRM-120
L1: SUMIDA CR43-3R3 L2: SUMIDA CR43-6R8
3471f
LT3471
TYPICAL APPLICATIO S
Li-Ion 20 White LED Driver
L1 2.2H VIN CONTROL 1 1.8V OV RSS1 4.7k CSS1 0.33F 8 C1 4.7F 7 CSS2 0.33F SHDN/SS2 GND 11 VIN LT3471 FB2P FB2N SW2 6 4 5 10 9 SW1 SHDN/SS1 FB1N FB1P VREF 1 2 3 C2 0.1F R1 90.9k R2 10k 10 WHITE LEDs D1 C3 0.22F IOUT1 20mA
VIN 2.6V TO 4.2V CONTROL 2 1.8V OV RSS2 4.7k
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4.99 L2 2.2H VIN C1, C2: X5R OR X7R 6.3V C3, C4: X5R OR X7R 50V D1, D2: ON SEMICONDUCTOR MBRM-140 L1, L2: SUMIDA CDRH2D-2R2 10 WHITE LEDs D2 C4 0.22F IOUT2 20mA
4.99
3471 TA04
3471f
13
LT3471
TYPICAL APPLICATIO S
Li-Ion or 4-Cell Alkaline to 3.3V and 5V SEPIC
L1 10H VIN L2 10H 1 2 3 C2 0.1F FB2P 7 SHDN/SS2 GND 11 L3 10H VIN C1, C3, C5: X5R OR X7R 10V C4, C6: X5R OR X7R 6.3V D1, D2: ON SEMICONDUCTOR MBRM-120 L1-L4: MURATA LQH43CN100K032 L4 10H C8 R3 56pF 60.4k R4 15k
3471 TA05
CONTROL 1 1.8V OV
RSS1 4.7k CSS1 0.33F
VIN 2.6V TO 6.5V CONTROL 2 1.8V OV RSS2 4.7k
C1 4.7F
CSS2 0.33F
14
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9 8
C3 4.7F
D1 C4 15F R1 34.8k R2 15k
10 SW1 SHDN/SS1 FB1N FB1P VREF VIN LT3471
C7 56pF
VOUT1 3.3V 640mA AT VIN = 6.5V 550mA AT VIN = 5V 470mA AT VIN = 4V 410mA AT VIN = 3.3V 340mA AT VIN = 2.6V
4 5
FB2N SW2 6
C5 10F
D2 C6 15F
VOUT2 5V 500mA AT VIN = 6.5V 420mA AT VIN = 5V 360mA AT VIN = 4V 300mA AT VIN = 3.3V 250mA AT VIN = 2.6V
3471f
LT3471
PACKAGE DESCRIPTIO
3.50 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 6 0.38 0.10 10
PIN 1 TOP MARK (SEE NOTE 6) 5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES) 1
NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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DD Package 10-Lead Plastic DFN (3mm x 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 0.05 3.00 0.10 (4 SIDES) 1.65 0.10 (2 SIDES)
(DD10) DFN 1103
0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD
3471f
15
LT3471
TYPICAL APPLICATIO
CONTROL 1 1.8V OV
4.7k 0.33F
VIN 5V CONTROL 2 1.8V OV 4.7k
RELATED PARTS
PART NUMBER LT1611 LT1613 LT1614 LT1615/LT1615-1 LT1617/LT1617-1 LT1930/LT1930A LT1931/LT1931A LT1943 (Quad) LT1945 (Dual) LT1946/LT1946A LT3436 LT3462/LT3462A LT3463/LT3463A DESCRIPTION 550mA (ISW), 1.4MHz, High Efficiency Micropower Inverting DC/DC Converter 550mA (ISW), 1.4MHz, High Efficiency Step-Up DC/DC Converter 750mA (ISW), 600kHz, High Efficiency Micropower Inverting DC/DC Converter COMMENTS VIN: 1.1V to 10V, VOUT(MAX) = -34V, IQ = 3mA, ISD < 1A, ThinSOT Package VIN: 0.9V to 10V, VOUT(MAX) = 34V, IQ = 3mA, ISD < 1A, ThinSOT Package VIN: 1V to 12V, VOUT(MAX) = -24V, IQ = 1mA, ISD < 10A, MS8, S8 Packages
300mA/80mA (ISW), High Efficiency Step-Up DC/DC Converters VIN = 1V to 15V, VOUT(MAX) = 34V, IQ = 20A, ISD < 1A, ThinSOT Package 350mA/100mA (ISW), High Efficiency Micropower Inverting DC/DC Converters 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converters VIN = 1.2V to 15V, VOUT(MAX) = -34V, IQ = 20A, ISD < 1A, ThinSOT Package VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1A, ThinSOT Package
1A (ISW), 1.2MHz/2.2MHz High Efficiency Micropower Inverting VIN = 2.6V to 16V, VOUT(MAX) = -34V, IQ = 5.8mA, ISD < 1A, DC/DC Converters ThinSOT Package Quad Boost, 2.6A Buck, 2.6A Boost, 0.3A Boost, 0.4A Inverter 1.2MHz TFT DC/DC Converter Dual Output, Boost/Inverter, 350mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converter 1.5A (ISW), 1.2MHz/2.7MHz, High Efficiency Step-Up DC/DC Converters 3A (ISW), 1MHz, 34V Step-Up DC/DC Converter 300mA (ISW), 1.2MHz/2.7MHz, High Efficiency Inverting DC/DC Converters with Integrated Schottkys Dual Output, Boost/Inverter, 250mA (ISW), Constant Off-Time, High Efficiency Step-Up DC/DC Converters with Integrated Schottkys 85mA (ISW), High Efficiency Step-Up DC/DC Converter with Integrated Schottky and PNP Disconnect VIN = 4.5V to 22V, VOUT(MAX) = 40V, IQ = 10A, ISD < 35A, TSSOP28E Package VIN = 1.2V to 15V, VOUT(MAX) = 34V, IQ = 40A, ISD < 1A, 10-Lead MS Package VIN: 2.45V to 16V, VOUT(MAX) = 34V, IQ = 3.2mA, ISD < 1A, MS8 Package VIN: 3V to 25V, VOUT(MAX) = 34V, IQ = 0.9mA, ISD < 6A, TSSOP16E Package VIN = 2.5V to 16V, VOUT(MAX) = -38V, IQ = 2.9mA, ISD < 1A, ThinSOT Package VIN = 2.3V to 15V, VOUT(MAX) = 40V, IQ = 40A, ISD < 1A, DFN Package VIN = 2.3V to 10V, VOUT(MAX) = 34V, IQ = 25A, ISD < 1A, ThinSOT Package
3471f LT/TP 0804 1K * PRINTED IN USA
LT3464
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507 www.linear.com
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5V to 12V Dual Supply Boost/Inverting Converter
L1 10H VIN 10 9 SW1 SHDN/SS1 FB1N FB1P 8 C1 4.7F 7 SHDN/SS2 GND 11 VREF VIN LT3471 FB2P FB2N SW2 6 R4 182k L3 10H C4 4.7F
3471 TA06
D1 R1 C6 56pF 54.9k R2 4.99k C2 0.1F 4 5 C7 56pF R3 15k C3 4.7F
VOUT1 12V 320mA
1 2 3
0.33F
*
VIN L2 10H C5 1F D2
*
VOUT2 -12V 200mA
C1, C2: X5R OR X7R 6.3V C3, C4: X5R OR X7R 16V C5: X5R OR X7R 25V D1, D2: ON SEMICONDUCTOR MBRM-120
L1: SUMIDA CR43-10 L2, L3: SUMIDA CLS63-10
(c) LINEAR TECHNOLOGY CORPORATION 2004

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