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IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT TRANSPARENT LATCH IDT74FCT163373A/C * 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended Range * CMOS power levels (0.4 W typ. static) * Rail-to-rail output swing for increased noise margin * Low Ground Bounce (0.3V typ.) * Inputs (except I/O) can be driven by 3.3V or 5V components * Available in SSOP and TSSOP packages FEATURES: DESCRIPTION: The FCT163373 16-bit transparent D-type latches are built using advanced dual metal CMOS technology. These high-speed, low-power latches are ideal for temporary storage of data. They can be used for implementing memory address latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls are organized to operate each device as two 8-bit latches or one 16-bit latch. Flow-through organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The inputs of FCT163373 can be driven from either 3.3V or 5V devices. This feature allows the use of these transparent latches as translators in a mixed 3.3V/5V supply system. With xLE inputs high, the FCT163373 can be used as a buffer to connect 5V components to a 3.3V bus. FUNCTIONAL BLOCK DIAGRAM 1 1OE 48 1LE 47 1D1 2LE 2OE 24 25 36 2D1 2 1O1 D D 13 2O1 C C TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE 1 (c) 2002 Integrated Device Technology, Inc. MAY 2002 DSC-5416/2 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM(2) 1LE 1D1 1D2 Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to +4.6 -0.5 to 7 -0.5 to VCC+0.5 -65 to +150 -60 to +60 Unit V V V C mA 1OE 1O1 1O2 VTERM(3) VTERM(4) TSTG IOUT GND 1O3 1O4 GND 1D3 1D4 VCC 1O5 1O6 VCC 1D5 1D6 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Vcc terminals. 3. Input terminals. 4. Outputs and I/O terminals. GND 1O7 1O8 2O1 2O2 GND 1D7 1D8 2D1 2D2 CAPACITANCE (TA = +25C, F = 1.0MHz) Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF NOTE: 1. This parameter is measured at characterization but not tested. GND 2O3 2O4 GND 2D3 2D4 PIN DESCRIPTION Pin Names xDx xLE xOE xOx Description Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) 3-State Outputs VCC 2O5 2O6 VCC 2D5 2D6 GND 2O7 2O8 2OE GND 2D7 2D8 2LE FUNCTION TABLE(1) xDx H L X X Inputs xLE H H L X xOE L L L H Outputs xBx H L O(2) Z SSOP/ TSSOP TOP VIEW NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance 2. Output level before the indicated steady-state input conditions were established. 2 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 2.7V to 3.6V Symbol VIH VIL IIH IIL IOZH IOZL VIK IODH IODL VOH Parameter Input HIGH Level (Input pins) Input HIGH Level (I/O pins) Input LOW Level (Input and I/O pins) Guaranteed Logic LOW Level Input HIGH Current (Input pins) Input HIGH Current (I/O pins) Input LOW Current (Input pins) Input LOW Current (I/O pins) High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Output HIGH Voltage VCC = Min., IIN = -18mA VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V VCC = Min. VIN = VIH or VIL VCC = 3V VIN = VIH or VIL VOL Output LOW Voltage VCC = Min. VIN = VIH or VIL VCC = 3V VIN = VIH or VIL IOS VH ICCL ICCH ICCZ Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max. VIN = GND or VCC (4) (3) (3) Test Conditions(1) Guaranteed Logic HIGH Level Min. 2 2 -0.5 Typ.(2) -- -- -- -- -- -- -- -- -- -0.7 -60 90 -- 3 3 -- 0.2 0.3 0.3 -135 150 0.1 Max. 5.5 VCC+0.5 0.8 1 1 1 1 1 1 -1.2 -110 200 -- -- -- 0.2 0.4 0.55 0.5 -240 -- 10 Unit V V A VCC = Max. VI = 5.5V VI = VCC VI = GND VI = GND -- -- -- -- -- -- -- -36 50 VCC-0.2 2.4 2.4 (5) VCC = Max. VO = VCC VO = GND A V mA mA V IOH = -0.1mA IOH = -3mA IOH = -8mA IOL = 0.1mA IOL = 16mA IOL = 24mA IOL = 24mA -- -- -- -- -60 V VCC = Max., VO = GND(3) -- mA mV A -- -- NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC-0.6V at rated current. 3 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = VCC -0.6V(3) VCC = Max. Outputs Open xOE = GND One Input Toggling 50% Duty Cycle VCC = Max., Outputs Open fi = 10MHz 50% Duty Cycle xOE = GND xLE = VCC One Bit Toggling VCC = Max., Outputs Open fi = 2.5MHz 50% Duty Cycle xOE = GND xLE = VCC Sixteen Bits Toggling VIN = VCC VIN = GND Min. -- -- Typ.(2) 2 50 Max. 30 75 Unit A A/ MHz IC Total Power Supply Current(6) VIN = VCC VIN = GND VIN = VCC -0.6V VIN = GND VIN = VCC VIN = GND VIN = VCC -0.6V VIN = GND -- 0.5 0.8 mA -- -- -- 0.5 2 2 0.8 3(5) 3.3(5) NOTES: 1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + DICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi 4 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1) Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(o) Parameter Propagation Delay xDx to xOx Propagation Delay xLE to xOx Output Enable Time Output Disable Time Set-up Time HIGH or LOW, xDx to xLE Hold Time HIGH or LOW, xDx to xLE xLE Pulse Width HIGH Output Skew(4) Condition(2) CL = 50pF RL = 500 FCT163373A Min.(3) Max. 1.5 5.2 2 1.5 1.5 2 1.5 5 -- 8.5 6.5 5.5 -- -- -- 0.5 FCT163373C Min.(3) Max. 1.5 4.2 2 1.5 1.5 2 1.5 5 -- 5.5 5.5 5 -- -- -- 0.5 Unit ns ns ns ns ns ns ns ns NOTES: 1. Propagation Delays and Enable/Disable times are with VCC = 3.3V 0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 2. See test circuit and waveforms. 3. Minimum limits are guaranteed but not tested on Propagation Delays. 4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design. 5 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 VOUT 6v Open GND SWITCH POSITION Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch 6V GND Open DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. Test Circuits for All Outputs DATA INPUT TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tSU tH tREM 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE 1.5V 1.5V tSU tH Pulse Width Set-up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH 6V tPZH SWITCH GND 3V 1.5V tPHZ 0.3V 1.5V 0V 0V VOH tPLZ DISABLE 3V 1.5V 0V 3V 0.3V VOL Propagation Delay Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 3. if VCC is below 3V, input voltage swings should be adjusted not to exceed VCC. 6 IDT74FCT163373A/C 3.3V CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT FCT XXX XX Family Temp. Range XXXX Device Type X Package PV PA Shrink Small Outline Package Thin Shrink Small Outline Package 373A 373C 163 74 Non-Inverting 16-Bit Transparent Latch Double-Density 3.3Volt - 40C to +85C DATA SHEET DOCUMENT HISTORY 4/22/2002 5/21/2002 Removed blank speed grade Removed TVSOP package CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com for Tech Support: logichelp@idt.com (408) 654-6459 7 |
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