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bq25010 bq25011 bq25012
SLUS615 - DECEMBER 2004
SINGLE-CHIP CHARGER AND DC/DC CONVERTER IC FOR BLUETOOTH HEADSETS AND OTHER PORTABLE APPLICATIONS (bqHYBRIDTM)
FEATURES
* Li-Ion Or Li-Pol Charge Management and Synchronous DC-DC Power Conversion In a Single Chip Optimized for Powering Bluetooth Headsets and Accessories Charges and Powers the System from Either the AC Adapter or USB with Autonomous Power Source Selection Integrated USB Charge Control with Selectable 100 mA and 500 mA Charge Rates Integrated Power FET and Current Sensor for Up to 500 mA Charge Applications AND 100 mA 1.8 V DC-DC Controller with Integrated FET Reverse Leakage Protection Prevents Battery Drainage Automatic Power Save Mode For High Efficiency at Low Current, or Forced PWM for Frequency Sensitive Applications
DESCRIPTION
The bqHYBRIDTM series are highly integrated charge and power management devices targeted at space-limited bluetooth applications. The bqHYBRID series offer integrated power FET and current sensor for charge control, reverse blocking protection, high accuracy current and voltage regulation, charge status, charge termination, and a highly efficient and low-power dc-dc converter in a small package. The bqHYBRID charges the battery in three phases: conditioning, constant current and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety feature for charge termination. The bqHYBRID automatically re-starts the charge if the battery voltage falls below an internal threshold. The bqHYBRID automatically enters sleep mode when VCC supply is removed. The integrated low-power high-efficiency dc-dc converter is designed to operate directly from a single-cell Li-Ion or Li-Pol battery pack. The output voltage is either adjustable from 0.7 V to VBAT (bq25010), fixed at 3.3 V (bq25011), or fixed at 1.8 V (bq25012), and is capable of delivering up to 150-mA of load current. The dc-dc converter operates at a synchronized 1 MHz switching frequency allowing for the use of small inductors.
* *
* *
* *
APPLICATIONS
* * * Bluetooth Headsets Bluetooth Accessories Low-Power Handheld Devices
TYPICAL APPLICATION
Bluetooth Chipset AC Adapter VDC GND 5 3 9 D+ D- VBUS 18 6 7 8 GND USB Port 4 bq25012RHL AC VSS VSS VSS USB STAT1 STAT2 EN PG 14 SW 19 FB 2 Battery Pack PACK+ BAT/OUT 16 + ISET1 ISET2 FPWM 12 13 20
UDG-04070
1.8 V DSP
CE 15 BAT/OUT 17
Processor
RSET
PACK-
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. bqHYBRID is a trademark of Benchmark.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2004, Texas Instruments Incorporated
bq25010 bq25011 bq25012
SLUS615 - DECEMBER 2004
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION
TA OUTPUT VOLTAGE (V) Adjustable -40C to 125C 3.3 1.8 (1) (2) (3) PART NUMBER (1) (2) BQ25010RHLR bq25011RHLR (3) bq25012RHLR (3) PACKAGE MARKING ANC ANE ANF
The RHL package is available taped and reeled only in quantities of 3,000 devices per reel. This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. Advanced Information, contact factory for availability.
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
bq25010 bq25011 bq25012 Supply voltage Input voltage Output sink/source current Output source current Storage temperature range, Tstg Junction temperature range, TJ Lead temperature (solderig, 10 seconds) (1) AC, USB (wrt VSS) PG, OUT, ISET1, ISET2, STAT1, STAT2, TS (wrt VSS) EN, FB, FPWM, SW (wrt VSS) PG, STAT1, STAT2 TS OUT -0.3 V to 7 V -0.3 V to 7 V VOUT + 0.3 V 15 mA 200 A 1.5 A -65C to 150C 0C to 125C 260C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted.
RECOMMENDED OPERATING CONDITIONS
MIN VCC VCC TJ Supply voltage (from AC input) Supply voltage (from USB input) Operating junction temperature range 4.5 4.35 -40 MAX 6.5 6.5 125 UNIT V C
DISSIPATION RATINGS
PACKAGE 20-pin (1) RHL (1) TA < 40C POWER RATING 1.81 W DERATING FACTOR ABOVE TA = 40C 21 mW/C JA 46.87C/W
This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. This is connected to the ground plane by a 2x3 via matrix.
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ELECTRICAL CHARACTERISTICS
over junction temperature range (0C TJ 125C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER INPUT CURRENT ICC(VCC) ICC(SLP) ICC(STDBY) IIB(OUT) IIB VREG(BAT) Supply current 1, VCC Sleep current Standyby current Input current, OUT Input current, CE Charger output voltage Charge voltage regulation accuracy (V(AC)- V(OUT)) (V(USB)- V(OUT)) AC dropout voltage USB dropout voltage TA = 25C VOUT (BAT) = VREG (BAT), IOUT(BAT)= 0.5 A VOUT (BAT) = VREG (BAT), ISET2 = High VOUT (BAT) = VREG (BAT), ISET2 = Low VVCC 4.5 V, VOUT (BAT) = V(LOWV), VVCC- VOUT (BAT) > V(DO-MAX), IOUT(BAT) = (K(SET)x V(SET) / RSET) VVCC(min) 4.5 V, VOUT (BAT) = V(LOWV), VVCC- VOUT (BAT) > V(DO-MAX), ISET2= Low VVCC(min) 4.5 V, VOUT (BAT) = V(LOWV), VVCC- VOUT (BAT) > V(DO-MAX), ISET2 = High Voltage on ISET1, VVCC 4.5 V, VOUT (BAT) = V(LOWV), VVCC- VOUT (BAT) > V(DO-MAX), ISET2 = High 50 mA IOUT(OUT) 500 mA K(SET) Output current set factor 10 mA IOUT(OUT) 50 mA 10 mA IOUT(OUT) 10 mA PRECHARGE and SHORT-CIRCUIT CURRENT REGULATION V(LOWV) tPRECHG_DG IOUT(PRECHG) V(PRECHG) Precharge to fast-charge transition threshold Voltage on OUT/BAT 2.8 250 5 240 255 3.0 375 3.2 500 100 270 V ms mA mV -0.35% -1% 175 350 60 4.2 0.35% 1% 250 500 100 mV VVCC > VVCC(min) Sum of currents into OUT/BAT, VVCC < V(SLP) CE = High, 0C TJ 85C Charge DONE, VVCC > VVCC(min), IOUT(SW) = 0 mA, Converter not switching 15 1.2 2 2.0 5 150 35 1 V A mA TEST CONDITIONS MIN TYP MAX UNIT
CHARGE VOLTAGE REGULATION (VBAT(REG) + V(DO-MAX) VVCC, I(TERM) < IOUT(BAT) 0.5 A)
CHARGE CURRENT REGULATION IOUT
(BAT)
AC output current range
50 80 400 2.436 307 296 246 2.500 322 320 320
500 100 500 2.538 337 346 416 V mA
IOUT
(BAT)
USB output current range
V(SET)
Output current set voltage
V 4.5 V, tFALL = 100 ns, Deglitch time for fast-charge to VCC(min) 10 mV overdrive, precharge transition VIN(BAT) decreasing below threshold Precharge range Precharge set voltage 0 V < VIN(BAT) < V(LOWV), t < t(PRECHG), IOUT(PRECHG) = (K(SET)x V(PRECHG))/ RSET Voltage on ISET1, VREG(BAT) = 4.2 V, 0 V < VIN(BAT) < V(LOWV), t < t(PRECHG) VIN(BAT) > V(RCH), t < t(PRECHG), I(TAPER) = (K(SET)x V(TAPER))/ RSET Voltage on ISET1, VREG(BAT) = 4.2 V, VIN(BAT) > V(RCH), t < t(PRECHG) Voltage on ISET1, VREG(BAT) = 4.2 V, VIN(BAT) > V(RCH), t < t(PRECHG), I(TERM) = (K(SET)x V(TERM))/ RSET
CHARGE TAPER and TERMINATION DETECTION I(TAPER) V(TAPER) V(TERM) Charge taper detection range Charge taper detection set voltage Charge termination detection set voltage 5 235 11 250 18 100 265 mV 25 mA
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ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0C TJ 125C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER tTPRDET_DG Deglitch time for taper detection Deglitch time for termination detection TEST CONDITIONS VVCC(min) 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG increasing above or decreasong below threshold VVCC(min) 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG decreasing below threshold MIN 250 TYP 375 MAX UNIT 500 ms 350 375 500
tTERMDET_DG
BATTERY RECHARGE THRESHOLD VRCH tRCHDET Recharge threshold voltage Deglitch time for recharge detect VVCC(min) 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG decreasing below or increasing above threshold IOL = 5 mA IIL= 10 A IIL= 20 A 0 1.4 -1 1 VISET2 = 0 V VISET2 = High-Z 1620 1620 16200 1800 1800 18000 200 VVCC VIN(BAT) +80 mV VVCC VIN(BAT) +190 mV 250 375 500 -20 40 1 1930 1930 19300 A s A VREG(BAT) VREG(BAT) - 0.115 - 0.10 250 375 VREG(BAT) - 0.085 500 V ms
STAT1, STAT2 and PG OUTPUTS VOL VIL VIH IIL IIH IIL IIH IIHZ TIMERS t(PRECHG) t(TAPER) t(CHG) I(FAULT) Precharge time Taper time Charge time Timer fault recovery current Low-level output voltage Low-level input voltage High-level input voltage Low-level input current, CE High-level input current, CE Low-level input current, ISET2 High-Z input current, ISET2 High-level input current, ISET2 VISET2 = VCC 0.25 0.4 V ISET2 and CE INPUTS V
SLEEP COMPARATOR for CHARGER V(SLP) Sleep mode entry threshold 2.3 V VIN(BAT) VREG(BAT)
V
V(SLP_DG) t(DEGL)
Sleep mode exit threshold Deglitch time for sleep mode
2.3 V VIN(BAT) VREG(BAT) VCC decreasing below threshold, tFALL = 100 ns, 10 mV overdrive,
ms
THERMAL SHUTDOWN T(SHTDWN) Thermal trip threshold temperature Thermal hysteresis UNDERVOLTAGE LOCKOUT AND POR V(UVLO_CHG) Undervoltage lockout threshold voltage Hysteresis VPOR POR threshold voltage (1) Input power absent Input power present 2.3 V(LOWV) V(UVLO) DC-DC INPUT/OUTPUT CURRENT V(BAT) V(UVLO) (1) 4 Input voltage range Undervoltage lockout 4.2 4.2 2.0 V Decreasing VCC 2.4 2.5 27 2.4 2.5 2.6 V mV V 165 15 C
Ensured by design. Not production tested.
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bq25010 bq25011 bq25012
SLUS615 - DECEMBER 2004
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0C TJ 125C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER IOUT_L FPWM - bq25010 VIH(FPWM) VIL(FPWM) VIH(FPWM) VIL(FPWM) IFPWM ENABLE VIH(EN) VIL(EN) IEN POWER SWITCH Internal P-channel MOSFET on-resistance RDS(on) Internal N-channel MOSFET on-resistance P-channel leakage current N-channel leakage current P-channel current limit Switching frequency Reference voltage Feedback voltage (2) Adjustable output voltage range VDC-DC Fixed output voltage bq25010 bq25010 3.6 V VBAT 4.2 V, 0 mA IOUT 150 mA bq25010 bq25011 3.6 V VBAT 4.2 V, 0 mA IOUT 150 mA bq25012 3.6 V VBAT 4.2 V, 0 mA IOUT 150 mA -3% 0.7 3.2 1.746 3.3 1.8 VIN = VGS = 3.6 V VIN = VGS = 2.5 V VIN = VGS = 3.6 V VIN = VGS = 2.5 V VDS = 6.0 V VDS = 6.0 V 2.5 V < VBAT < 4.2 V 190 0.65 0.97 1.27 0.68 0.86 0.1 0.1 230 1.00 0.5 +3% VBAT 3.4 1.854 V 1.52 2.00 1.19 1.45 1.0 1.0 350 A mA High-level input voltage Low-level input voltage Input bias current VEN = GND or VBAT, VFPWM = GND or VBAT 0.01 1.3 0.4 0.1 V A High-level input voltage Low-level input voltage High-level input voltage Low-level input voltage Input bias current VEN = GND or VBAT, VFPWM = GND or VBAT 0.01 1.3 0.4 0.1 2.0 0.4 Maximum output current TEST CONDITIONS MIN TYP MAX UNIT 150 mA
FPWM bq25011 and bq25012 V A
ILEAK(P) ILEAK(N) I(LIM) OSCILLATOR fSW OUTPUT VREF VFB
1.50 MHz
(2)
For output voltages 1.2 V a 22-F output capacitor value is required to achieve a maximum output voltage accuracy of +3% while operating in power save mode (PFM).
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DEVICE INFORMATION
bq25010, bq25011, bq25012 RHL PACKAGE (BOTTOM VIEW)
FPWM
SW VSS BAT/OUT BAT/OUT CE PG ISET2 ISET1
19 20 18 17 16 15 14 13 12 11
N/C
2 3 4 5 6 7 8 10 9
1
FB VSS EN AC USB STAT1 STAT2 VSS
N/C
TERMINAL FUNCTIONS
TERMINAL NAME AC BAT/OUT BAT/OUT CE EN FB FPWM ISET1 ISET2 NC PG STAT1 STAT2 SW USB VSS NO. 5 16 17 15 4 2 20 12 13 1, 10, 11 14 7 8 19 6 3, 9, 18 I/O I I/O I I I I I I I - O O O O I - Charge input voltage from AC adapter Charge current output Battery input to DC-DC converter Charge enable input (active low) Enable input for DC-DC converter Feedback pin for DC-DC converter PWM control input for the DC-DC converter Charge current set point for AC input and precharge and taper set point for both AC and USB Charge current set point for USB port (High = 500 mA, Low = 100 mA, High-Z = disable USB charge) No connect. These pins must be left floating. Power good status output (active low) Charge status output 1 (open-drain) Charge status output 2 (open-drain) Output of the DC/DC converter Charge input voltage from USB adapter Ground Input. Also note that there is an internal electrical connection between the exposed thermal pad and VSS pins of the device. The exposed thermal pad must be connected to the same potential as the Vss pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. All VSS pins must be connected to ground at all times. DESCRIPTION
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N/C
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SLUS615 - DECEMBER 2004
FUNCTIONAL BLOCK DIAGRAM
AC BAT/OUT VI(AC) AC 5 VI(ISET) VI(BAT) VO(REG) Sense FET VI(ISET) VI(SET) AC/USB USB 6 Sense FET + + 12 VI(OUT) 16 ISET1
17 BAT/OUT
EN FPWM
4 20
DC-DC Controller
19 SW
VSS VSS
3 9
VCC
Reference and Bias VO(REG)
VI(FB) 2 FB
VSS 18 VI(BAT) Deglitch VI(SLP) VO(REG) VI(OUT) Deglitch VI(OUT) Precharge Thermal Shutdown Suspend Sleep
AC/USB CHG ENABLE 500 mA/ 100 mA 15 CE 500 mA/ 100 mA Recharge Charge Control, Timer and Display Logic 13 ISET2 USB Charge 14 PG
V(ISET1) V(ISET2) Deglitch Taper
7
STAT1
8 V(ISET2) Deglitch Term
STAT2
UDG-04072
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FUNCTIONAL DESCRIPTIONS BATTERY CHARGER
The bqHYBRID supports a precision Li-Ion or Li-Pol charging system suitable for single-cell battery packs and a low-power DC-DC converter for providing power to system processor. See a typical charge profile, application circuit and an operational flow chart in Figure 1 through Figure 3 respectively.
Regulation Voltage Regulation Current Pre-Conditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase
Charge Voltage Minimum Charge Voltage Charge Complete
Pre-Conditioning and Taper Detect
Charge Current
t(PRECHG)
t(CHG) t(TAPER)
Figure 1. Typical Charger Profile
LOUT AC Adapter VDC GND D+ D- VBUS FB 2 R2 6 7 8 GND USB Port 4 3 9 USB BAT/OUT 17 STAT1 STAT2 EN VSS VSS BAT/OUT 16 CCHG ISET1 12 ISET2 13 CE 15 PG 14 RSET 0.1 F PACK- PACK+ + Battery Pack System 5 bq25010RHL AC SW 19 R1 COUT 10 F 10 H
18 VSS
Control and Status Signals
UDG-04095
Figure 2. Typical Application Circuit
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FUNCTIONAL DESCRIPTIONS (continued)
POR
SLEEP MODE
checked at all times
Vcc > VI(BAT)
No
Indicate SLEEP MODE
Yes Regulate IO(PRECHG) Indicate Charge- In-Progress
VI(BAT)Yes
Reset and Start t(PRECHG) timer
No
Reset all timers, Start t(CHG) timer
Regulate Current or Voltage Indicate Charge- In-Progress No Suspend charge Tj < T (SHTDWN) No Indicate CHARGE SUSPEND Yes VI(BAT)Yes Yes
t(PRECHG) Expired? Tj < T (SHTDWN) No Yes
No
t(CHG) Expired?
No
Yes Fault Condition
Yes
VI(BAT)I(TERM) detection?
VI(BAT) > V(RCH)?
No t(TAPER) Expired?
Yes No No
I(TAPER) detection? No Yes Turn off charge
Enable I(FAULT) current Yes No
Yes
VI(BAT) > V(RCH)?
Yes Indicate DONE Disable I(FAULT) current No
VI(BAT) < V(RCH)?
Yes
Figure 3. Operational Flow Chart
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FUNCTIONAL DESCRIPTIONS (continued)
Autononous Power Source Selection As default, the bqHYBRID attempts to charge the battery from the AC input. If AC input is not present, the USB input is selected. If both inputs are available, the AC adapter has the priority. Refer to Figure 4 for details.
AC > BATTERY AC MODE AC < BATTERY USB > BATTERY USB MODE
Figure 4. Power Source Selection Battery Pre-Conditioning During a charge cycle if the battery voltage is below the V(LOWV) threshold, the bqHYBRID applies a precharge current, IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET1 and VSS pins, RSET, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the specifications table. V(PRECHG) ) K(SET) I O (PRECHG) * RSET (1) The bqHYBRID activates a safety timer, t(PRECHG), during the conditioning phase. If V(LOWV) threshold is not reached within the timer period, the bqHYBRID turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Please refer to Timer Fault Recovery section for additional details. Battery Charge Current The bqHYBRID offers on-chip current regulation with programmable set point. The resistor connected between the ISET1 and VSS pins, RSET, determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications table. V(SET) ) K(SET) I O (OUT) * RSET (2) When charging from a USB port, the host controller has the option of selecting either 100 mA or 500 mA charge rate using the ISET2 pin. A low-level signal sets the current at 100 mA and a high-level signal sets the current at 500 mA. A high-Z input disables USB charging. Battery Voltage Regulation The voltage regulation feedback is through the BAT/OUT pin. This input is tied directly to the positive side of the battery pack. The bqHYBRID monitors the battery-pack voltage between the BAT/OUT and VSS pins. When the battery voltage rises to VO(REG) threshold, the voltage regulation phase begins and the charging current begins to taper down. As a safety backup, the bqHYBRID also monitors the charge time in the charge mode. If taper threshold is not detected within this time period, t(CHG), the bqHYBRID turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Please refer to section titled Timer Fault Recoverysection for additional details. Charge Taper Detection, Termination and Regharge The bqHYBRID monitors the charging current during the voltage regulation phase. Once the taper threshold, I(TAPER), is detected the bqHYBRID initiates the taper timer, t(TAPER). Charge is terminated after the timer expires. The resistor connected between the ISET1 and VSS pins, RSET, determines the taper detection level. The V(TAPER) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging.
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FUNCTIONAL DESCRIPTIONS (continued)
I (TAPER) * V(TAPER) ) K(SET) RSET
(3)
The bqHYBRID resets the taper timer in the event that the charge current returns above the taper threshold, I(TAPER). In addition to the taper current detection, the bqHYBRID terminates charge in the event that the charge current falls below the I(TERM) threshold. This feature allows for quick recognition of a battery removal condition or insertion of a fully charged battery. Note that taper timer is not activated. The resistor connected between the ISET1 and VSS pins, RSET, determines the taper detection level. The V(TERM) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(TERM) ) K(SET) I (TERM) * R SET (4) After charge termination, the bqHYBRID restarts the charge once the voltage on the BAT/OUT pin falls below the V(RCH) threshold. This feature keeps the battery at full capacity at all times. Sleep Mode for Charger The bqHYBRID enters the low-power sleep mode if both AC and USB are removed from the circuit. This feature prevents draining the battery during the absence of VCC. Operation Modes Operational modes of the bqHYBRID are summarized in Table 1. Operation of DC-DC is not recommended while charger is in precharge mode. Table 1. Operation Modes
BATTERY VOLTAGE VI(BAT) > V(LOWV) 0 V < VI(BAT) < V(LOWV) VI(BAT) < V(UVLO) AC or USB ADAPTER STATUS Present Present Both absent CHARGER STATUS Fast Precharge Off DC-DC STATUS EN EN Off
Status Outputs The STAT1 and STAT2 open-drain outputs indicate various charger and battery conditions as shown in Table 2. These status pins can be used to communicate to the host processor. Note that OFF indicates the open-drain transistor is turned off. Table 2. Status Pins Summary
CHARGE STATE Precharge in progress Fast charge in progress Charge done Timer fault Speel mode INPUT POWER STATE Present Present Not reported Not reported Absent STAT1 ON ON OFF OFF OFF STAT2 ON OFF ON OFF OFF
PG Output (Power Good) The open-drain PG output indicates when the AC adapter is present. The output turns ON when a valid voltage is detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED or communicate to the host processor.
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CE Input (Charge Enable) The CE digital input is used to enable or disable the charge process. A low-level signal on this pin enables the charge and a high-level signal disables the charge and places the device into a low-power mode. A high-to-low transition on this pin also resets all timers and timer fault conditions. Note that this applies to both AC and USB charging. Thermal Shutdown and Protection The bqHYBRID monitors the junction temperature, TJ, of the die and suspends charging if TJ exceeds T(SHTDWN). Charging resumes when TJ falls below T(SHTDWN) by approximately 15C. TImer Fault Recovery As shown in Figure 3, bqHYBRID provides a recovery method to deal with timer fault conditions. The following summarizes this method: Condition 1: Charge voltage above recharge threshold (V(RCH)) and timeout fault occurs. Recovery method: bqHYBRID waits for the battery voltage to fall below the recharge threshold. This could happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the recharge threshold, the bqHYBRID clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault. Condition 2: Charge voltage below recharge threshold (V(RCH)) and timeout fault occurs. Recovery method: Under this scenario, the bqHYBRID applies the I(FAULT) current. This small current is used to detect a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the battery voltage goes above the recharge threshold, then the bqHYBRID disables the I(FAULT) current and executes the recovery method described for Condition 1. Once the battery falls below the recharge threshold, the bqHYBRID clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault.
DC-DC CONVERTER
The bqHYBRID provides a low quiescent-current synchronous DC-DC converter. The internally compensated converter is designed to operate over the entire voltage range of a single-cell Li-Ion or Li-Pol battery. Under nominal load current, the device operates with a fixed PWM switching frequency of typically 1 MHz. At light load currents, the device enters the power save mode of operation; the switching frequency is reduced and the quiescent current drawn by the converter from the BAT/OUT pin is typically only 15 A. During PWM operation the converter uses a unique fast-response voltage mode controller scheme with input voltage feedforward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channnel MOSFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is exceeded. After the dead time preventing current shoot through the N-channnel MOSFET rectifier is turned on and the inductor current ramps down. The next cycle is initiated by the clock signal again turning off the N-channel rectifier and turning on the on the P-channel switch. The gM amplifier as well as the input voltage determines the rise time of the saw-tooth generator and therefore any change in input voltage or output voltage directly controls the duty cycle of the converter giving a very good line and load transient regulation. Power Save Mode Operation As the load current decreases the converter enters the power save mode operation. During power save mode the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. Two conditions allow the converter to enter the power save mode operation. One is the detection of discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as:
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I SKIP * 66 mA )
VIN 160 q
(5)
During the power save mode the output voltage is monitored with the comparator by the thresholds comp low and comp high. As the output voltage falls below the comp low threshold (set to typically 0.8% above VOUT nominal) the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached. The typical peak switch current can be calculated as: V I PEAK * 66 mA ) IN 80 q (6) The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches zero the N-channel rectifier is turned off and the P-channel switch is turned on again starting the next pulse. The converter continues these pulses until the comp high threshold (set to typically 1.6% above VOUT nominal) is reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again as the output voltage falls below the comp low threshold again. This control method reduces the quiescent current to typically to 15 A and the switching frequency to a minimum, thereby achieving high converter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load transient changes. This allows the converter to operate with a small output capacitor of only 10 F and still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 5 as well for detailed operation of the power save mode.
PFM Mode at Light Load 1.6% 0.8% VOUT Comparator High Comparator Low Comparator Low 2 PWM Mode at Medium to Full Load
Figure 5. Power Save Mode Thresholds and Dynamic Voltage Positioning The converter enters the fixed-frequency PWM mode again as soon as the output voltage drops below the comp low 2 threshold. Dynamic Voltage Positioning As described in the power save mode operation section and as detailed in Figure 5, the output voltage is typically 0.8% above the nominal output voltage at light load currents as the device is in power save mode. This gives additional headroom for the voltage drop during a load transient from light load to full load. During a load transient from full load to light load the voltage overshoot is also minimized due to active regulation turning on the N-Channel rectifier switch. Soft-Start The bqHYBRID has an internal soft-start circuit that limits the inrush current during startup. This soft-start is implemented as a digital circuit increasing the switch current in steps of typically 30 mA, 60 mA, 120 mA and then the typical switch current limit of 230 mA. Therefore the starup time depends mainly on the output capacitor and load current. Typical startup time with a 10-F output capacitor and a 100-mA load current is 1.6 ms.
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100% Duty Cycle Low Dropout Operation The bqHYBRID offers a low input-to-output voltage difference while still maintaining operation with the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain regulation depends on the load current and output voltage and can be calculated as:
V IN(min) VOUT(max) * I OUT(max) ) RDS(on)MAX * R L
(7)
where IOUT(max) = maximum output current plus indicator ripple current RDS(on)MAX = maximum P-channel switch RDS(on) RL = DC resistance of the inductor VOUT(max) = nominal output voltage plus maximum output voltage tolerance Enable Pulling the enable pin (EN) low forces the DC-DC converter into shutdown mode, with a shutdown quiescent current of typically 0.1 A. In this mode the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is disconnected, and the converter enters shutdown mode. If an output voltage, which could be an external voltage source or a super capacitor, is present during shut down, the reverse leakage current is specified under electrical characteristics. For proper operation the EN pin must be terminated and should not be left floating. Pulling the EN pin high starts up the DC-DC converter with the soft-start as previously described. Undervoltage Lockout The undervoltage lockout circuit prevents the converter from turning on the switch or rectifier MOSFET at low input voltages or under undefined conditions. Forced PWM Mode The FPWM input pin allows the host system to override the power save mode by driving the FPWM pin high. In this state, the DC-DC converter remains in the PWM mode of operation with continuous current conduction regardless of the load conditions. Tying the FPWM pin low allows the device to enter power save mode automatically as previously described.
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APPLICATION INFORMATION ADJUSTABLE OUTPUT VOLTAGE VERSION (bq25010)
When the adjustable output voltage version of the bqHYBRID is being used (bq25010), the output is set by the external resistor divider, as shown in Figure 2. The output voltage can be calculated as:
V OUT 0.5 V ) 1 * R1 R2
(8)
where R1 + R2 1 M Internal reference voltage VREF(typ) = 0.5 V C1 and C2 should be selected as: 1 C1 * 2q ) 10 kHz ) R1 where R1 = upper resistor of the voltage divider C1 = upper capacitor of the voltage divider For C1, a value should be chosen that comes closest to the calculated result. C2 * R1 ) C1 R2 where R2 = lower resistor of the voltage divider C2 = lower capacitor of the voltage divider For C2, the selected capacitor value should always be selected larger than the calculated result. For example, in Figure 2, a 100-pF capacitor is selected for a calculated result of C2 = 86.17 pF. If quiescent current is not a key design parameter, C1 and C2 can be omitted and a low-impedance feedback divider must be used with R1 + R2 < 100 k. This design reduces the noise available on the feedback pin (FB) as well, but increases the overall quiescent current during operation.
(9)
(10)
FIXED OUTPUT VOLTAGE VERSION (bq25011, bq25012)
When a fixed output voltage version of the device is being used, no external resistive divider network is necessary. In this case, the output of the inductor should be connected directly the FB pin, as shown in Figure 2.
INPUT CAPACITOR SELECTION
In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.1-F ceramic, placed in close proximity to AC/USB and VSS pins, works fine. The bqHYBRID is designed to work with both regulated and unregulated external DC supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance has to be added to the input of the charger.
CHARGER OUTPUT CAPACITOR (DC-DC CONVERTER INPUT CAPACITOR) SELECTION
Because the buck converter has a pulsating input current, a low ESR input capacitor is required. This results in the best input voltage filtering and minimizes the interference with other circuits caused by high input voltage spikes. Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For good input voltage filtering, usually a 4.7-F input capacitor is sufficient and can be increased without any limit for better input voltage filtering. If ceramic output capacitors are used, the capacitor RMS ripple current rating ensures the application requirements. For completeness, the RMS ripple current is calculated as:
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APPLICATION INFORMATION (continued)
I RMS I OUT(max) ) VOUT V ) 1 * OUT V IN VIN
(11)
The worst case RMS ripple current occurs at D=0.5 and is calculated as: I I RMS ) OUT 2
(12)
Ceramic capacitors perform well because of the low ESR value, and they are less sensitive to voltage transients and spikes compared to tantalum capacitors. The input capacitor should be placed as close as possible to the BAT/OUT pin of the device for best performance. Refer to Table 1for recommended components.
DC-DC CONVERTER OUTPUT CAPACITOR SELECTION
The advanced fast response voltage mode control scheme of the bqHYBRID allows the use of tiny ceramic capacitors with a minimum value of 10 F without having large output voltage under and overshoots during heavy load transients. Ceramic capacitors having low ESR values have the lowest output voltage ripple and are therefore recommended. If required, tantalum capacitors may be used as well (refer to Table 1 for recommended components). If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the application requirements. For completeness, the RMS ripple current is calculated as: V 1 * OUT VIN I RMS(Cout) VOUT ) )1 L)f 2) 3 (13) At nominal load current the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: V OUT 1 VIN 1 qV OUT VOUT ) ) * ESR L)f 8 ) COUT ) f
(14)
where the output voltage ripple occurs at the highest input voltage VIN. At light load currents the device operates in power save mode, and the output voltage ripple is independent of the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical output voltage ripple is 1% of the output voltage VOUT.
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DC-DC CONVERTER OUTPUT INDUCTOR SELECTION
The bqHYBRID is optimized to operate with a typical inductor value of 10 H. For high efficiencies, the inductor should have a low DC resistance to minimize conduction losses. Although the inductor core material has less effect on efficiency than its DC resistance, an appropriate inductor core material must be used. The inductor value determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current, and the lower the conduction losses of the converter. On the other hand, larger inductor values causes a slower load transient response. Usually the inductor ripple current, as calculated below, should be around 30% of the average output current. In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current that is calculated as: V 1 * OUT VIN qI L VOUT ) L)f (15) where f = switching frequency (1 MHz typical, 650 kHz minimal) L = inductor value IL = peak-to-peak inductor ripple current IL(max) = maximum inductor current The highest inductor current occurs at maximum VIN. A more conservative approach is to select the inductor current rating just for the maximum switch current of 350 mA. Table 3. Recommended Inductor and Capacitor Values
TYPICAL OUTPUT CURRENT (mA) 30 60 80 120 150 INDUCTOR VALUE (H) 100 48 33 22 10 CAPACITOR VALUE (F) 1 2.2 3.3 4.7 10 APPLICATION For low current, smallest capacitor For low current, small capacitor For medium current, small capacitor For medium current For highest current, smallest inductor
CHARGING WHILE UNDER LOAD
The bqHYBRID is designed such that maximum charging safety and efficiency can be obtained by suspending normal operation while the device is actively charging the battery. In this mode of operation, the timeout function prevents a defective battery from being charged indefinitely. If charging does not terminate normally within five hours, the device annunciates a fault condition on the STAT1 and STAT2 pins as indicated in Table 2. If a load is applied to the device while it is being used to charge a battery, a false fault condition may result due to a slower rate of charge being applied to the battery. For this reason it is recommended that the load be disconnected from the bqHYBRID while it is charging a battery.
THERMAL CONSIDERATIONS
The bqHYBRID is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal performance is thermal impedance (JA) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for JA is: T ) TA q JA * J P (16) where TJ = chip junction temperature
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TA = ambient temperature P = device power dissipation Factors that can greatly influence the measurement and calculation of JA include: * Whether or not the device is board mounted * Trace size, composition, thickness, and geometry * Orientation of the device (horizontal or vertical) * Volume of the ambient air surrounding the device under test and airflow * Whether other surfaces are in close proximity to the device being tested The device power dissipation (P) is a function of the charge rate and the voltage drop across the internal power FET. It can be calculated from the following equation:
P V IN * V IN(BAT) ) I OUT(OUT)
(17)
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest.
PCB LAYOUT CONSIDERATIONS
For all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies. If the layout is not carefully done the regulator could exhibit stability problems as well as EMI problems. With this in mind, one should lay out the PCB using wide, short traces for the main current paths. The input capacitor, as well as the inductor and output capacitors, should be placed as close as possible to the IC pins. The feedback resistor network (bq25010) must be routed away from the inductor and switch node to minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network and feedback pin, the ground plane or ground traces must be used for shielding. This becomes very important especially at high switching frequencies. The following are some additional guidelines that should be observed: * To obtain optimal performance, the decoupling capacitor from AC to VSS (and from USB to VSS) and the output filter capacitors from BAT/OUT to VSS should be placed as close as possible to the bqHYBRID, with short trace runs to both signal and VSS pins. * All low-current VSS connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. * The BAT/OUT pin provides voltage feedback to the IC for the charging function and should be connected with its trace as close to the battery pack as possible. * The high current charge paths into AC and USB and from the BAT/OUT and SW pins must be sized appropriately for the maximum charge or output current in order to avoid voltage drops in these traces. * The bqHYBRID is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note QFN/SON PCB Attachment (SLUA271).
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