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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-28319-2E
ASSP
CMOS
50 MSPS 3ch 8-bit D/A Converter
MB40C958V
s DESCRIPTION
The MB40C958V is a high-speed CMOS process based D/A converter provided with the three-channel I/O for RGB, allowing for independent control of the three channels.
s FEATURES
* * * * * * * * * * Resolution Linearity error Differential linearity error Maximum conversion rate Supply voltage Digital input voltage range Analog output voltage range Dissipation power Additional capabilities Package : : : : : : : : : : 8 bits 0.5 LSB (max) 1.0 LSB (max) 50 MSPS (min) single +5 V TTL level 2 Vp-p (0 to 2 V) 220 mW (standard: analog output for RL = 200 , 2 Vp-p output) Reference voltage generator, power saving function, independent 3-ch VREF LQFP48
s PACKAGE
48-pin Plastic LQFP
(FPT-48P-M05)
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MB40C958V
s PIN ASSIGNMENT
DVDD GVRIN 37 36 35 34 33 32 31 (TOP VIEW) 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 GIREF 39 AVDD AVDD AVSS AVSS GOUT ROUT BOUT GVB 38 CE 47
48
46
45
44
43
42
41
RVRIN RIREF RVB (LSB) R0 R1 R2 R3 R4 R5 R6 (MSB) R7 (LSB) G0
1 2 3 4 5 6 7 8 9 10 11 12
40
VROUT BVRIN BIREF BVB VA DVSS BCLK GCLK RCLK B7 (MSB) B6 B5
(MSB) G7
(LSB) B0
G1
G2
G3
G4
G5
G6
B1
B2
B3
2
B4
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MB40C958V
s PIN DESCRIPTION
Pin No. 4 to 11 12 to 19 20 to 27 28 29 30 47 48 40, 46 31 42, 44 36 1 37 35 2 39 34 3 38 33 32 45 43 41 Symbol R0 to R7 G0 to G7 B0 to B7 RCLK GCLK BCLK CE DVDD AVDD DVSS AVSS VROUT RVRIN GVRIN BVRIN RIREF GIREF BIREF RVB GVB BVB VA ROUT GOUT BOUT I/O I Description Data signal incoming terminal for Rch, Gch and Bch LSB: R0, G0, B0 MSB: R7, G7,B7 Clock signal incoming terminal for Rch, Gch and Bch (TTL compatible)
I
I -- -- -- -- O I
Power saving signal incoming terminal. Power saving enabled for High Digital power supply terminal (standard 5 V) Analog power supply terminal (standard 5 V) Digital ground terminal Analog ground terminal Rererence voltage output terminal (standard: 2 V) Reference voltage incoming terminal for Rch, Gch and Bch (standard: 2 V)
--
Reference resistor connection terminal for Rch, Gch and Bch
--
Connect >0.1 F capacitor to the AVDD terminal
-- O
Connect >0.1 F capacitor to the AVSS terminal Analog signal output terminals for Rch, Gch and Bch
3
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MB40C958V
s BLOCK DIAGRAM
RCLK
R0 to R7
Decorder and latch circuit
Current cell
ROUT
RVB GCLK Reference current generator circuit Decorder and latch circuit Current cell RVRIN RIREF GOUT
G0 to G7
GVB BCLK Reference current generator circuit Decorder and latch circuit Current cell GVRIN GIREF BOUT
B0 to B7
BVB CE Reference current generator circuit BVRIN BIREF
AVDD DVDD REF circuit AVSS DVSS Reference voltage generator circuit
VA
VROUT
4
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MB40C958V
s ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Digital input voltage Analog output voltage Analog output current Storage temperature Symbol VDD VID VO IO Tstg Rating Min. -0.3 -0.3 -0.3 0 -55 Max. +7.0 VDD+0.3 VDD+0.3 12 +125 Unit V V V mA C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter Analog power supply voltage Digital power supply voltage Power supply voltage difference Reference input voltage Full-scale current*1 Full-scale output voltage*
2
Symbol AVDD DVDD AVDD - DVDD VRIN IFS VFS VIHD VILD fCLK ts th tWH tWL Top
Value Min. 4.75 4.75 -0.2 1.0 0 -- 2.4 0 -- 6 3 6.5 6.5 -20 Typ. 5.0 5.0 -- 2.0 -- 2.0 -- -- -- -- -- -- -- -- Max. 5.25 5.25 0.2 2.2 12 2.3 DVDD 0.5 50 -- -- -- -- +85
Unit V V V V mA V V V MHz ns ns ns ns C
Digital "H" level input voltage Digital "L" level input voltage Clock frequency Setup time Hold time "H" level minimum pulse width "L" level minimum pulse width Operating ambient temperature *1: IFS = VRIN/RREF x 15.9 *2: VFS = IFS x RL
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
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MB40C958V
s ELECTRICAL CHARACTERISTICS
1. DC Characteristics
(AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 k, RL = 200 , Ta = -20C to +85C) Parameter Resolution Linearity error Differential linearity error Digital input current Reference output voltage Full-scale output voltage Zero-scale output voltage Analog power supply current Digital power supply current Symbol -- LE DLE IID VROUT VOFS VOZS AIDD DIDD Condition -- DC Accuracy -- AVDD = DVDD = 5.00 V -- -- -- -- Value Min. -- -- -- -5 1.95 1.85 0 -- -- Typ. 8 -- -- -- 2.0 1.94 -- 30 13 Max. -- 0.5 1.0 5 2.05 2.03 10 35 20 Unit bit LSB LSB A V V mV mA mA
2. AC Characteristics
(AVDD = DVDD = 4.75 V to 5.25 V, VRIN = 2 V, RREF = 3.3 k, RL = 200 , CL = 15 pF, Ta = -20C to +85C) Parameter Maximum conversion rate Output propagation delay time Output rising time Output falling time Setting time Symbol fS tpd tr tf tset -- Condition Value Min. 50 -- -- -- -- Typ. -- 10 11 11 30 Max. -- -- -- -- -- Unit MSPS ns ns ns ns
6
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MB40C958V
s EQUIVALENT CIRCUIT
* Digital input
DVDD R0 to R7 G0 to G7 B0 to B7 RCLK GCLK BCLK DVSS AVDD
CE
AVSS
* Reference voltage input
AVDD
RVRIN GVRIN BVRIN
- +
AVSS
AVDD
RIREF GIREF BIREF
RVB GVB BVB
AVSS
* VA pin
DVDD
Current cell DVDD
VA
REF circuit
DVSS
7
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MB40C958V
* Analog output
AVDD
AVDD
ROUT GOUT BOUT
AVSS
* Reference voltage output
AVDD
30 k
VROUT
20 k AVSS
8
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MB40C958V
s TIMING DIAGRAM
ts
th
Data input
1.5 V
twH
twL
CLK input
1.5 V
1/2LSB 90% Analog output 50% 50% 1/2LSB 90%
10% VOZS tr tset tpd tpd tf
10%
tset
9
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MB40C958V
s TYPICAL APPLICATION
+5 V 0.1 F
DVDD
AVDD
+5 V 0.1 F
0.1 F RVB RCLK R0 to R7 8 RCLK R0 to R7 RVRIN Rout RIREF RREF 3.3 k RL +2 V 0 to 2 V(2 VP-P) 200
0.1 F GVB GCLK G0 to G7 8 GCLK G0 to G7 GIREF RREF 3.3 k RL 200 GVRIN Gout +2 V 0 to 2 V(2 VP-P)
0.1 F BVB BCLK B0 to B7 8 BCLK B0 to B7 BVRIN Bout BIREF RREF 3.3 k RL +2 V 0 to 2 V(2 VP-P) 200
CE
VA 0.1 F
DVSS VROUT
AVSS
10
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MB40C958V
s ORDERING INFORMATION
Part number MB40C958VPFV Package 48-pin Plastic LQFP (FPT-48P-M05) Remarks
11
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MB40C958V
s PACKAGE DIMENSION
48-pin Plastic LQFP (FPT-48P-M05)
9.000.20(.354.008)SQ 7.000.10(.276.004)SQ
36 25
1.50 -0.10 .059 -.004
+.008
+0.20
(Mounting height)
37
24
5.50 (.217) REF INDEX
8.00 (.315) NOM
Details of "A" part
48 1 12 13
LEAD No. 0.500.08 (.0197.0031) 0.18 -0.03 .007 -.001
+.003 +0.08
"A" 0.127 -0.02 .005 -.001
+.002 +0.05
0.100.10 (STAND OFF) (.004.004)
0.500.20 (.020.008) 0.10(.004) 0 10
C
1995 FUJITSU LIMITED F48013S-2C-5
Dimensions in mm (inches).
12
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MB40C958V
FUJITSU LIMITED
For further information please contact:
Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: 81(44) 754-3763 Fax: 81(44) 754-3329
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan.
http://www.fujitsu.co.jp/
North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179
http://www.fujitsumicro.com/
Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122
http://www.fujitsu-ede.com/
Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220
http://www.fmap.com.sg/
F9809 (c) FUJITSU LIMITED Printed in Japan
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