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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
FEATURES
D Low-Noise Operation Antiringing Switch D D D D D
and PFM/PWM Operation Mode Internal Softstart 50-A Quiescent Current (TYP) Available in the 10-Pin Microsmall Outline Package (MSOP) Evaluation Module Available Available in a Ultra-Small, 12-Pin NanoStarE (Wafer Chip-Scale) Package
D High-Efficiency Synchronous Step-Down D D D D D D D D
Converter With Greater Than 95% Efficiency 2 V to 5.5 V Operating Input Voltage Range Adjustable Output Voltage Range From 0.8 V to VI Fixed Output Voltage Options Available in 0.9 V, 1 V, 1.2 V, 1.5 V, 1.8 V, 1.9 V, 2.5 V, and 3.3 V Synchronizable to External Clock Signal up to 1 MHz Up to 600 mA Output Current Pin-Programmable Current Limit High Efficiency Over a Wide Load Current Range in Power Save Mode 100% Maximum Duty Cycle for Lowest Dropout
APPLICATIONS
D D D D D D
Low-Power CPUs and DSPs Cellular Phones Organizers, PDAs, and Handheld PCs MP-3 Portable Audio Players Digital Cameras USB-Based DSL Modems and Other Network Interface Cards
description
The TPS6200x devices are a family of low-noise synchronous step-down dc-dc converters that are ideally suited for systems powered from a 1-cell Li-ion battery or from a 2- to 3-cell NiCd, NiMH, or alkaline battery. The TPS6200x operates typically down to an input voltage of 1.8 V, with a specified minimum input voltage of 2 V.
EFFICIENCY vs LOAD CURRENT
100 90 80 70 Efficiency - % 60 50 40 30 20 10 0 0.1 VI = 3.6 V, VO = 2.5 V 1 10 100 IO - Load Current - mA 1000 SYNC = High
7 10 F 8 VI = 2 V to 5.5 V 1 VIN L 9 10 H VO = 0.8 V to VI
SYNC = Low
6
EN
FB
5 10 F 10 4
TPS6200x ILIM SYNC GND 3 PGND PG FC 2 0.1 F
PG
With VO 1.8 V; Co = 10 F, VO <1.8 V; Co = 47 F
Figure 1
Figure 2. Typical Application Circuit for Fixed Output Voltage Option
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2002-2003, Texas Instruments Incorporated
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
description (continued)
The TPS6200x is a synchronous current-mode PWM converter with integrated N- and P-channel power MOSFET switches. Synchronous rectification is used to increase efficiency and to reduce external component count. To achieve the highest efficiency over a wide load current range, the converter enters a power-saving pulse-frequency modulation (PFM) mode at light load currents. Operating frequency is typically 750 kHz, allowing the use of small inductor and capacitor values. The device can be synchronized to an external clock signal in the range of 500 kHz to 1 MHz. For low-noise operation, the converter can be operated in the PWM mode and the internal antiringing switch reduces noise and EMI. In the shutdown mode, the current consumption is reduced to less than 1 A. The TPS6200x is available in the 10-pin (DGS) microsmall outline package (MSOP). The TPS62000 is also available in a 12-pin, 1,85 mm x 1,3 mm NanoStar chip scale package (YEG). The devices operate over a free-air temperature range of -40C to 85C.
MSOP (DGS) PACKAGE (TOP VIEW) YEG PACKAGE (BOTTOM VIEW)
VIN FC GND PG FB
1 2 3 4 5
10 9 8 7 6
PGND L EN SYNC ILIM
1 2 3 A B C D
AVAILABLE OPTIONS TA VOLTAGE OPTIONS Adjustable 0.9 V 1V 1.2 V -40 C 85 C -40C to 85C 1.5 V 1.8 V 1.9 V 2.5 V PACKAGE MSOP WCSP TPS62000DGS TPS62001DGS TPS62002DGS TPS62003DGS TPS62004DGS TPS62005DGS TPS62008DGS TPS62006DGS TPS62000YEG MARKING DGS AIH AII AIJ AIK AIL AIM AJI AIN YEG TPS62000
3.3 V TPS62007DGS AIO Without the suffix indicates deliveries in tubes of 80 units. The YEG package is available taped and reeled. Add R suffix to device type (e.g. TPS62000YEGR) to order 3000 devices per reel. Add T sufix to device type (e.g., TPS62000YEGT) to order 250 devices per reel.
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
functional block diagram
PG FC (See Note B) VIN
Undervoltage Lockout Bias Supply EN Power Good + _ Slope Compensation PFM/PWM Mode Select PFM/PWM Comparator _ +
10
Current Sense
P-Channel Power MOSFET
R1 FB (See Note A)
Error Amplifier _ + Soft Start
PFM/PWM Control Logic Current Limit Logic
Driver Shoot-Through Logic
L
Compensation N-Channel Power MOSFET Sync + Oscillator Load Comparator + _ Current Sense + Offset PGND Antiringing FB
R2 R1 + R2 1 M + _ EN Vref = 0.45 V
GND
SYNC
ILIM
NOTES: A. The adjustable output voltage version does not use the internal feedback resistor divider. The FB pin is directly connected to the error amplifier. B. Do not connect the FC pin to an external power source
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
Terminal Functions
TERMINAL NO. NAME EN FB FC GND ILIM L PG DGS 8 5 2 3 6 9 4 YEG B3 A2 C1 A1 A3 C2, C3 B1 I I/O O I I Enable. A logic high enables the converter, logic low forces the device into shutdown mode reducing the supply current to less than 1 A. Feedback pin for the fixed output voltage option. For the adjustable version an external resistive divider is connected to FB. The internal voltage divider is disabled for the adjustable version. Supply bypass pin. A 0.1 F coupling capacitor should be connected as close as possible to this pin for good high frequency input voltage supply filtering. Ground Switch current limit. Connect ILIM to GND to set the switch current limit to typically 600 mA, or connect this pin to VIN to set the current limit to typically 1200 mA. Connect the inductor to this pin. L is the switch pin connected to the drain of the internal power MOSFETS. Power good comparator output. This is an open-drain output. A pullup resistor should be connected between PG and VO. The output goes active high when the output voltage is greater than 92% of the nominal value. Power ground. Connect all power grounds to PGND. I Input for synchronization to external clock signal. Synchronizes the converter switching frequency to an external clock signal with CMOS level: SYNC = HIGH: Low-noise mode enabled, fixed frequency PWM operation is forced SYNC = LOW (GND): Power save mode enabled, PFM/PWM mode enabled. Supply voltage input Not connected I/O DESCRIPTION
PGND SYNC
10 7
D2 D3
VIN NC
1
D1 B2
I
detailed description
operation The TPS6200x is a step down converter operating in a current mode PFM/PWM scheme with a typical switching frequency of 750 kHz. At moderate to heavy loads, the converter operates in the pulse width modulation (PWM) and at light loads the converter enters a power save mode (pulse frequency modulation) to keep the efficiency high. In the PWM mode operation, the part operates at a fixed frequency of 750 kHz. At the beginning of each clock cycle, the high side P-channel MOSFET is turned on. The current in the inductor ramps up and is sensed via an internal circuit. The high side switch is turned off when the sensed current causes the PFM/PWM comparator to trip when the output voltage is in regulation or when the inductor current reaches the current limit (set by ILIM). After a minimum dead time preventing shoot through current, the low side N-channel MOSFET is turned on and the current ramps down again. As the clock cycle is completed, the low side switch is turned off and the next clock cycle starts. In discontinuous conduction mode (DCM), the inductor current ramps to zero before the end of each clock cycle. In order to increase the efficiency the load comparator turns off the low side MOSFET before the inductor current becomes negative. This prevents reverse current flowing from the output capacitor through the inductor and low side MOSFET to ground that would cause additional losses. As the load current decreases and the peak inductor current does not reach the power save mode threshold of typically 120 mA for more than 15 clock cycles, the converter enters a pulse frequency modulation (PFM) mode.
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
operation (continued) In the PFM mode, the converter operates with:
D Variable frequency D Constant peak current that reduces switching losses D Quiescent current at a minimum
Thus maintaining the highest efficiency at light load currents. In this mode, the output voltage is monitored with the error amplifier. As soon as the output voltage falls below the nominal value, the high side switch is turned on and the inductor current ramps up. When the inductor current reaches the peak current of typical: 150 mA + 50 mA/V x (VI - VO), the high side switch turns off and the low side switch turns on. As the inductor current ramps down, the low side switch is turned off before the inductor current becomes negative which completes the cycle. When the output voltage falls below the nominal voltage again, the next cycle is started. The converter enters the PWM mode again as soon as the output voltage can not be maintained with the typical peak inductor current in the PFM mode. The control loop is internally compensated reducing the amount of external components. The switch current is internally sensed and the maximum current limit can be set to typical 600 mA by connecting ILIM to ground or to typically 1.2 A connecting ILIM to VIN. 100% duty cycle operation As the input voltage approaches the output voltage and the duty cycle exceeds typical 95%, the converter turns the P-channel high side switch continuously on. In this mode, the output voltage is equal to the input voltage minus the voltage drop across the P-channel MOSFET. synchronization, power save mode and forced PWM mode If no clock signal is applied, the converter operates with a typical switching frequency of 750 kHz. It is possible to synchronize the converter to an external clock within a frequency range from 500 kHz to 1000 kHz. The device automatically detects the rising edge of the first clock and is synchronizes immediately to the external clock. If the clock signal is stopped, the converter automatically switches back to the internal clock and continues operation without interruption. The switch over is initiated if no rising edge on the SYNC pin is detected for a duration of four clock cycles. Therefore, the maximum delay time can be 8 s in case the internal clock has a minimum frequency of 500 kHz. In case the device is synchronized to an external clock, the power save mode is disabled and the device stays in forced PWM mode. Connecting the SYNC pin to the GND pin enables the power save mode. The converter operates in the PWM mode at moderate to heavy loads and in the PFM mode during light loads maintaining high efficiency over a wide load current range. Connecting the SYNC pin to the VIN pin forces the converter to operate permanently in the PWM mode even at light or no load currents. The advantage is the converter operates with a fixed switching frequency that allows simple filtering of the switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared to the power save mode during light loads (see Figure 1). It is possible to switch from forced PWM mode to the power save mode during operation. The flexible configuration of the SYNC pin during operation of the device allows efficient power management by adjusting the operation of the TPS6200x to the specific system requirements. low noise antiringing switch An antiringing switch is implemented in order to reduce the EMI radiated from the converter during discontinuous conduction mode (DCM). In DCM, the inductor current ramps to zero before the end of each switching period. The internal load comparator turns off the low side switch at that instant thus preventing the
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current flowing backward through the inductance which increases the efficiency. An antiringing switch across the inductor prevents parasitic oscillation caused by the residual energy stored in the inductance (see Figure 12).
NOTE: The antiringing switch is only activated in the fixed output voltage versions. It is not enabled for the adjustable output voltage version TPS62000.
soft start As the enable pin (EN) goes high, the soft-start function generates an internal voltage ramp. This causes the start-up current to slowly rise preventing output voltage overshoot and high inrush currents. The soft-start duration is typical 1 ms (see Figure 13). When the soft-start function is completed, the error amplifier is connected directly to the internal voltage reference. enable Logic low on EN forces the TPS6200x into shutdown. In shutdown, the power switch, drivers, voltage reference, oscillator, and all other functions are turned off. The supply current is reduced to less than 1 A in the shutdown mode. undervoltage lockout An undervoltage lockout circuit provides the save operation of the device. It prevents the converter from turning on when the voltage on VIN is less than typically 1.6 V power good comparator The power good (PG) comparator has an open drain output capable of sinking typically 10 A. The PG is only active when the device is enabled (EN = high). When the device is disabled (EN = low), the PG pin is high impedance. The PG output is only valid after a 100 s delay after the device is enabled and the supply voltage is greater than 1.2 V. This is only important in cases where the pullup resistor of the PG pin is connected to an external voltage source which might cause an initial spike (false high signal) within the first 100 s after the input voltage exceeds 1.2 V. This initial spike can be filtered with a small R-C filter to avoid false power good signals during start-up. If the PG pin is connected to the output of the TPS62000 with a pullup resistor, no initial spike (false high signal) occurs and no precautions have to be taken during start-up. The PG pin becomes active high when the output voltage exceeds typically 94.5% of its nominal value. Leave the PG pin unconnected when not used. no load operation In case the converter operates in the forced PWM mode and there is no load connected to the output, the converter will regulate the output voltage by allowing the inductor current to reverse for a short period of time.
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltages on pin VIN and FC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 6 V Voltages on pins EN, ILIM, SYNC, PG, FB, L (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VIN + 0.3 V Peak switch current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 A Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Lead temperature (soldering, 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE 10 pin MSOP 12 pin YEG TA 25C POWER RATING 555 mW 588 mW DERATING FACTOR ABOVE TA = 25C 5.56 mW/C 5.87 mW/C TA = 70C POWER RATING 305 mW 324 mW TA = 85C POWER RATING 221 mW 235mW
NOTE: The thermal resistance junction to ambient of the 10-pin MSOP is 180C/W. The thermal resistance junction to ambient of the 12-pin YEG is 170C/W and RJC = 21C/W. The device will not run into thermal limitations provided it is operated within the specified range.
recommended operating conditions
MIN Supply voltage, VI Output voltage range for adjustable output voltage version, VO Output current for 3-cell operation, IO (VI 2.5 V; L = 10 H, f = 750 kHz) Output current for 2-cell operation, IO (VI 2 V; L = 10 H, f = 750 kHz) Inductor, L (see Note 2) Input capacitor, Ci (see Note 2) Output capacitor, Co (see Note 2) VO 1.8 V) Output capacitor, Co (see Note 2) VO < 1.8 V) Operating ambient temperature, TA Operating junction temperature, TJ NOTE 2: Refer to application section for further information. 10 10 47 -40 -40 85 125 10 2 0.8 TYP MAX 5.5 VI 600 200 UNIT V V mA mA H F F F C C
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electrical characteristics over recommended operating free-air temperature range, VI = 3.6 V, VO = 2.5 V, IO = 300 mA, EN = VIN, ILIM = VIN, TA = -40C to 85C (unless otherwise noted)
supply current
PARAMETER VI I(Q) I(SD) Input voltage range Operating quiescent current Shutdown current TEST CONDITIONS IO = 0 mA to 600 mA IO = 0 mA to 200 mA IO = 0 mA, SYNC = GND (PFM-mode enabled) EN = GND MIN 2.5 2 50 0.1 TYP MAX 5.5 5.5 75 1 A A UNIT V
enable
PARAMETER VIH VIL Ilkg V(UVLO) EN high-level input voltage EN low level input voltage EN input leakage current Undervoltage lockout threshold EN = GND or VIN 1.2 0.01 1.6 TEST CONDITIONS MIN 1.3 0.4 0.1 1.95 TYP MAX UNIT V V A V
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
electrical characteristics over recommended operating free-air temperature range, VI = 3.6 V, VO = 2.5 V, IO = 300 mA, EN = VIN, ILIM = VIN, TA = -40C to 85C (unless otherwise noted) (continued)
power switch and current limit
PARAMETER P-channel MOSFET on-resistance P-channel leakage current rDS(on) N-channel MOSFET on-resistance N-channel leakage current I(LIM) VIH VIL Ilkg P-channel current limit ILIM high-level input voltage ILIM low-level input voltage ILIM input leakage current ILIM = GND or VIN 0.01 TEST CONDITIONS VI = VGS = 3.6 V, VI = VGS = 2 V, VDS = 5.5 V VI = VGS = 3.6 V, VI = VGS = 2 V, VDS = 5.5 V 2.5 V VI 5.5 V, 2 V VI 5.5 V, I = 200 mA I = 200 mA IO = 200 mA IO = 200 mA ILIM = VIN ILIM = GND 200 MIN 200 TYP 280 480 1 280 500 1 800 390 1.3 0.4 0.1 1200 600 1600 900 mA V V A 410 m A MAX 410 m A UNIT
power good output (see Note 3)
PARAMETER V(PG) Power good threshold Power good hysteresis VOL Ilkg PG output low voltage PG output leakage current V(FB) = 0.8 x VO nominal, I(sink) = 10 A V(FB) = VO nominal 1.2 TEST CONDITIONS Feedback voltage falling MIN 88% VO TYP 92% VO 2.5% VO 0.3 0.01 1 MAX 94% VO UNIT V V V A V
Minimum supply voltage for valid power good signal
NOTE 3: Power good is not valid for the first 100 s after EN goes high. Please refer to the application section for more information.
oscillator
PARAMETER fs f(SYNC) VIH VIL Oscillator frequency Synchronization range SYNC high level input voltage SYNC low level input voltage SYNC = GND or VIN 20% 0.01 CMOS-logic clock signal on SYNC pin TEST CONDITIONS MIN 500 500 1.3 0.4 0.1 60% TYP 750 MAX 1000 1000 UNIT kHz kHz V V A
Ilkg SYNC input leakage current Duty cycle of external clock signal
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
electrical characteristics over recommended operating free-air temperature range, VI = 3.6 V, VO = 2.5 V, IO = 300 mA, EN = VIN, ILIM = VIN, TA = -40C to 85C (unless otherwise noted) (continued)
output
PARAMETER VO Vref Adjustable output voltage range Reference voltage TPS62000 TPS6200x TPS62000 adjustable TPS62001 0.9 V TPS62002 1V TPS62003 1.2 V VO Fixed output voltage (see Note 4) TPS62004 1.5 V TPS62005 1.8 V TPS62008 1.9 V TPS62006 2.5 V TPS62007 3.3 V Line regulation Load regulation Efficiency VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.5 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 2.7 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = 3.6 V to 5.5 V; 0 mA IO 600 mA 10 mA < IO 600 mA VI = VO + 0.5 V (min. 2 V) to 5.5 V, IO = 10 mA VI = 5.5 V; IO = 10 mA to 600 mA VI = 5 V; VO = 3.3 V; IO = 300 mA VI = 3.6 V; VO = 2.5 V; IO = 200 mA IO = 0 mA, time from active EN to VO 0.4 -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% -3% 0.05 0.6% 95% 2 ms TEST CONDITIONS MIN 0.8 0.45 4% 3% 4% 3% 4% 3% 4% 3% 4% 3% 4% 3% 4% 3% 4% 3% 4% 3% %/V V TYP MAX 5.5 UNIT V V
Start-up time
NOTE 4: The output voltage accuracy includes line and load regulation over the full temperature range, TA = -40C to 85C.
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS Table of Graphs
FIGURE V(drop) IQ fosc Efficiency Dropout voltage Operating quiescent current Oscillator frequency Load transient response Line transient response Power save mode operation Start-up VO Output voltage vs Time vs Load current vs Load current vs Load current vs Input voltage (power save mode) vs Input voltage (forced PWM) vs Free-air temperature 3, 4, 5 6 7 8 9 10 11 12 13 14
EFFICIENCY vs LOAD CURRENT
100 VO = 3.3 V 100 VO = 2.5 V
EFFICIENCY vs LOAD CURRENT
90 VI = 3.6 V Efficiency - % 80 VI = 5 V Efficiency - %
90
80
VI = 3.6 V
70
70 VI = 5 V 60
60
50 40 0.1
50 40 0.1
1 10 100 IO - Load Current - mA
1000
1 10 100 IO - Load Current - mA
1000
Figure 3
Figure 4
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
TYPICAL CHARACTERISTICS
EFFICIENCY vs LOAD CURRENT
100 300 VO = 1.8 V 250 Dropout Voltage - mV
DROPOUT VOLTAGE vs LOAD CURRENT
90
Efficiency - %
80 VI = 3.6 V 70 VI = 5 V 60
200
150
VO = 2.5 V
100
VO = 3.3 V
50 40 0.1
50
0 1 10 100 IO - Load Current - mA 1000 0 100 200 300 400 IO - Load Current - mA 500 600
Figure 5
OPERATING QUIESCENT CURRENT vs INPUT VOLTAGE (POWER SAVE MODE)
60 I (Q)- Operating Quescent Current - A I (Q)- Operating Quescent Current - A Power-Save Mode, SYNC = Low 55 TA = 80C 50 TA = 20C 4000
Figure 6
OPERATING QUIESCENT CURRENT vs INPUT VOLTAGE (FORCED PWM)
Forced PWM, SYNC = High TA = 80C TA = 20C
3500
3000
45 TA =-40C
2500 TA =-40C
40
2000
35
1500
30
2
2.5
3
3.5
4
4.5
5
5.5
1000 2 2.5 3 3.5 4 4.5 5 VI - Input Voltage (Forced PWM) - V 5.5
VI - Input Voltage (Power Save Mode) - V
Figure 7
Figure 8
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY vs FREE-AIR TEMPERATURE
790 770 750 VI = 3.6 V 730 710 690 670 650 -40 IO 500 mA/div VI = 5 V
LOAD TRANSIENT RESPONSE
I(Load) = 60 mA to 540 mA, VI = 3.6 V, VO = 2.5 V VO 25 mV/div
f - Oscillator Frequency - kHz
VI = 2 V
-20
20 40 60 TA - Free-Air Temperature - C
0
80 200 s/div
Figure 9
LINE TRANSIENT RESPONSE
Figure 10
POWER SAVE MODE OPERATION
VL 2 V/div VI 3.6 V to 4.6 V
VO 100 mV/div
IL 200 mA/div
400 s/div
10 s/div
Figure 11
Figure 12
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SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
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TYPICAL CHARACTERISTICS
START-UP vs TIME
EN 2 V/div
VO 1 V/div Power Good 1 V/div
II 200 mA/div 250 s/div
Figure 13
OUTPUT VOLTAGE vs LOAD CURRENT
2.55 2.54 2.53 VO - Output Voltage - V 2.52 2.51 2.50 2.49 2.48 2.47 2.46 2.45 0 100 200 300 400 500 600
IO - Load Current - mA
Figure 14
14
POST OFFICE BOX 655303
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
APPLICATION INFORMATION adjustable output voltage version
When the adjustable output voltage version (TPS62000DGS) is used, the output voltage is set by the external resistor divider (see Figure 15). The output voltage is calculated as: V O + 0.45 V 1 ) R1 R2
With R1 + R2 1 M R1 + R2 should not be greater than 1 M because of stability reasons. For stability reasons, a small bypass capacitor (Cff) is required in parallel to the upper feedback resistor, refer to Figure 15. The bypass capacitor value can be calculated as: C (ff) + C (ff) + 1 for C o t 47 F 2 x 30000 x R1 1 for C o 47 F 2 x 5000 x R1
R1 is the upper resistor of the voltage divider. For C(ff), choose a value which comes closest to the computed result.
VI = 2.7 V to 5.5 V + Ci = 10 F 8 EN TPS62000 6 ILIM 4 PG 10 PGND FC 2 C3 = 0.1 F PG Co = 10 F 7 SYNC GND 3 R2 = 180 k FB 5 R1 = 820 k C(ff) = 6.8 pF + 1 VIN L 9 L1 = 10 H R3 = 320 k VO = 2.5 V/600 mA
Figure 15. Typical Application Circuit for Adjustable Output Voltage Option inductor selection A 10 H minimum output inductor is used with the TPS6200x. Values larger than 22 H or smaller than 10 H may cause stability problems because of the internal compensation of the regulator. For output voltages greater than 1.8 V, a 22 H inductance might be used in order to improve the efficiency of the converter. After choosing the inductor value of typically 10 H, two additional inductor parameters should be considered: first the current rating of the inductor and second the dc resistance. The dc resistance of the inductance influences directly the efficiency of the converter. Therefore, an inductor with lowest dc resistance should be selected for highest efficiency.
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15
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
APPLICATION INFORMATION
inductor selection (continued) In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current plus the inductor ripple current which is calculated as: V 1- O V I L DI L 2
DI L + V Where:
O
I L(max) + I O(max) )
= Switching frequency (750 kHz typical) L = Inductor value IL = Peak-to-peak inductor ripple current IL(max) = Maximum inductor current The highest inductor current occurs at maximum VI. A more conservative approach is to select the inductor current rating just for the maximum switch current of the TPS6200x which is 1.6 A with ILIM = VIN and 900 mA with ILIM = GND. See table 1 for recommended inductors. Table 1. Tested Inductors
OUTPUT CURRENT 0 mA to 600 mA INDUCTOR VALUE 10 H COMPONENT SUPPLIER Coilcraft DO3316P-103 Coilcraft DT3316P-103 Sumida CDR63B-100 Sumida CDRH5D28-100 Coilcraft DO1608C-103 Sumida CDRH4D28-100 0 mA to 300 mA 10 H Coilcraft DS1608C-103 muRata LQH4C100K04 COMMENTS High efficiency
Smallest solution High efficiency Smallest solution
output capacitor selection For best performance, a low ESR output capacitor is needed. At output voltages greater than 1.8 V, ceramic output capacitors can be used to show the best performance. Output voltages below 1.8 V require a larger output capacitor and ESR value to improve the performance and stability of the converter.
Capacitor Selection
OUTPUT VOLTAGE RANGE 1.8 V VI 5.5 V 0.8 V VI < 1.8 V OUTPUT CAPACITOR Co 10 F Co 47 F OUTPUT CAPACITOR ESR ESR 120 m ESR > 50 m
See Table 2 for recommended capacitors.
16
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
APPLICATION INFORMATION
output capacitor selection (continued) If an output capacitor is selected with an ESR value 120 m, its RMS ripple current rating always meets the application requirements. Just for completeness, the RMS ripple current is calculated as: V 1- O V I L
I RMS(C ) + V O o
1 2 3
The overall output ripple voltage is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charge and discharging the output capacitor: V 1- O V I L
DV
O
+V
O
8
1 Co
) ESR
Where the highest output voltage ripple occurs at the highest input voltage VI. Table 2. Tested Capacitors
CAPACITOR VALUE 10 F 47 F 68 F ESR/m 50 100 100 COMPONENT SUPPLIER Taiyo Yuden JMK316BJ106KL Sanyo 6TPA47M Spraque 594D686X0010C2T COMMENTS Ceramic POSCAP Tantalum
input capacitor selection Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is required for best input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. The input capacitor should have a minimum value of 10 F and can be increased without any limit for better input voltage filtering. The input capacitor should be rated for the maximum input ripple current calculated as: I RMS + I V O(max) O V I V 1- O V I
IO The worst case RMS ripple current occurs at D = 0.5 and is calculated as: I RMS + . 2
Ceramic capacitor show a good performance because of their low ESR value, and they are less sensitive against voltage transients compared to tantalum capacitors. Place the input capacitor as close as possible to the input pin of the IC for best performance.
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17
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
APPLICATION INFORMATION
layout considerations As for all switching power supplies, the layout is an important step in the design especially at high peak currents and switching frequencies. If the layout is not carefully done, the regulator might show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current paths as indicted in bold in Figure 16. The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output capacitor. Place the bypass capacitor, C3, as close as possible to the FC pin. The analog ground, GND, and the power ground, PGND, need to be separated. Use a common ground node as shown in Figure 16 to minimize the effects of ground noise.
VI + 8 Ci 6 EN TPS62000 ILIM 4 PG 10 PGND FC 2 C3 PG Co 7 R2 SYNC GND 3 FB 5 1 VIN L 9 L1 VO R3 R1 C(ff) +
Figure 16. Layout Diagram typical application
L1 22 H VO = 3.3 V/600 mA
VI = 5 V C1 10 F
1
VIN
L
9
8
EN
FB
5 680 k 10 C2 10 F
TPS62007DGS 6 ILIM PGND
7
SYNC GND 3
PG FC 2
4
Power Good L1: Sumdia CDRH5D28-220 C1, C2: 10 F Ceramic Taiyo Yuden JMK316BJ106KL C3: 0.1 F Ceramic
C3 0.1 F
Figure 17. Standard 5 V to 3.3 V/600 mA Conversion; High Efficiency
18
POST OFFICE BOX 655303
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TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
APPLICATION INFORMATION
typical application (continued)
L1 10 H VO = 2.5 V/600 mA
VI = 2.7 V to 4.2 V C1 10 F
1
VIN
L
9
8
EN
FB
5 470 k 10 C2 10 F
TPS62006DGS 6 ILIM PGND
7
SYNC GND 3
PG FC 2
4
Power Good L1: C1,C2: C3: Sumdia CDRH5D28-100 10 F Ceramic Taiyo Yuden JMK316BJ106KL 0.1 F Ceramic
C3 0.1 F
Figure 18. Single Li-on to 2.5 V/600 mA Using Ceramic Capacitors Only
L1 10 H VO = 1.8 V/300 mA
VI = 2.5 V to 4.2 V C1 10 F
1
VIN
L
9
8
EN
FB
5 C2 10 F 10
TPS62005DGS 6 ILIM PGND
7
SYNC GND 3
PG FC 2
4
C3 0.1 F
L1: C1,C2: C3:
Murata LQH4C100K04 10 F Ceramic Taiyo Yuden JMK316BJ106KL 0.1 F Ceramic
NOTE: For low noise operation connect SYNC to VIN
Figure 19. Single Li-on to 1.8 V/300 mA; Smallest Solution Size
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19
SLVS294C - SEPTEMBER 2000 - REVISED SEPTEMBER 2003
TPS62000, TPS62001, TPS62002, TPS62003 TPS62004, TPS62005, TPS62006, TPS62007, TPS62008 HIGH EFFICIENCY STEP DOWN LOW POWER DC DC CONVERTER
APPLICATION INFORMATION
typical application (continued)
L1 10 H VO = 1.2 V/200 mA
VI = 2 V to 3.8 V C1 10 F
1
VIN
L
9
8
EN TPS62003
FB
5 C2 47 F 10 +
6
ILIM
PGND
7
SYNC GND 3
PG FC 2
4
C3 0.1 F
L1: C1: C2: C3:
Murata LQH4C100K04 10 F Ceramic Taiyo Yuden JMK316BJ106KL Sanyo 6TPA47M 0.1 F Ceramic
Figure 20. Dual Cell NiMH or NiCd to 1.2 V/200 mA; Smallest Solution Size
L1 10 H
VI = 2.5 V to 5.5 V C1 10 F
1
VIN
L
9
8
EN TPS62000
FB
R4 5 820 k
VO = 1.1 V or 1.5 V/600 mA R1 470 k C(ff) 150 pF +
6
ILIM
PG
4
PG
C2 47 F R3 524 k
7
SYNC GND 3
PGND FC 2
10 R2 326 k
C3 0.1 F Sumida CDRH5D28-100 Q1 10 F Ceramic Taiyo Yuden BSS138 JMK316BJ106KL C2: Sanyo 6TPA47M C3: 0.1 F Ceramic Use a small R-C filter to filter wrong reset signals during output voltage transitions. A large value is used for C(ff) to compensate for the parasitic capacitance introduced into the regulation loop by Q1. L1: C1:
Logic Input Hi VO = 1.5 V Low VO = 1.1 V
Figure 21. Dynamic Output Voltage Programming As Used in Low Power DSP Applications
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2005
PACKAGING INFORMATION
Orderable Device TPS62000DGS TPS62000DGSG4 TPS62000DGSR TPS62000DGSRG4 TPS62000YEGR TPS62000YEGT TPS62001DGS TPS62001DGSG4 TPS62001DGSR TPS62002DGS TPS62002DGSG4 TPS62002DGSR TPS62002DGSRG4 TPS62003DGS TPS62003DGSG4 TPS62003DGSR TPS62003DGSRG4 TPS62004DGS TPS62004DGSG4 TPS62004DGSR TPS62004DGSRG4 TPS62005DGS TPS62005DGSG4 TPS62005DGSR TPS62005DGSRG4 TPS62006DGS Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type MSOP MSOP MSOP MSOP XCEPT XCEPT MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP Package Drawing DGS DGS DGS DGS YEG YEG DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS Pins Package Eco Plan (2) Qty 10 10 10 10 12 12 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 3000 250 80 80 TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 Green (RoHS &
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2005
Orderable Device
Status (1)
Package Type MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP MSOP
Package Drawing DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS DGS
Pins Package Eco Plan (2) Qty no Sb/Br) 10 10 10 10 10 10 10 10 10 10 10 80 Green (RoHS & no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
TPS62006DGSG4 TPS62006DGSR TPS62006DGSRG4 TPS62007DGS TPS62007DGSG4 TPS62007DGSR TPS62007DGSRG4 TPS62008DGS TPS62008DGSG4 TPS62008DGSR TPS62008DGSRG4
(1)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 80 80 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

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