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19-3044; Rev 0; 10/03
Overvoltage Protection Controllers with Status FLAG
General Description
The MAX4838-MAX4841 are overvoltage protection ICs that protect low-voltage systems against voltages of up to 28V. If the input voltage exceeds the overvoltage trip level, the MAX4838-MAX4841 turn off the low-cost external N-channel FET(s) to prevent damage to the protected components. An internal charge pump eliminates the need for external capacitors and drives the FET gate for a simple, robust solution. The MAX4838/MAX4839 have a 7.4V overvoltage threshold, and the MAX4840/MAX4841 have a 5.8V overvoltage threshold. All devices have an undervoltage lockout threshold of 3.25V. In addition to the single FET configuration, the devices can be configured with back-to-back external FETs to prevent currents from being back-driven into the adapter. On power-up, the device waits for 50ms before driving GATE high. FLAG is held low for an additional 50ms after GATE goes high before deasserting. The MAX4838/MAX4840 have an open-drain FLAG output, and the MAX4839/MAX4841 have a push-pull FLAG output. The FLAG output asserts immediately to an overvoltage fault. Additional features include a 15kV ESD-protected input (when bypassed with a 1F capacitor) and a shutdown pin (EN) to turn off the device (MAX4838/MAX4840). All devices are offered in a small 6-pin SC70 package and are specified for operation from -40C to +85C. o Overvoltage Protection Up to 28V o Preset 7.4V or 5.8V Overvoltage Trip Level o Drive Low-Cost NMOS FET o Internal 50ms Startup Delay o Internal Charge Pump o Undervoltage Lockout o 15kV ESD-Protected Input o Voltage Fault FLAG Indicator o 6-Pin SC70 Package
Features
MAX4838-MAX4841
Ordering Information
PART MAX4838EXT-T MAX4839EXT-T MAX4840EXT-T MAX4841EXT-T TEMP RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PINPACKAGE 6 SC70-6 6 SC70-6 6 SC70-6 6 SC70-6 TOP MARK ABW ABY ABX ABZ
Applications
Cell Phones Digital Still Cameras PDAs and Palmtop Devices MP3 Players
INPUT +1.2V TO +28V
Typical Operating Circuit
OUTPUT NMOS
Selector Guide
1F
1
IN
GATE
4 VIO
PART
OV UVLO TRIP EN THRESHOLD LEVEL INPUT (V) (V) 3.25 3.25 3.25 3.25 7.4 7.4 5.8 5.8 Yes No Yes No
FLAG OUTPUT Open-Drain Push-Pull Open-Drain Push-Pull
MAX4838- MAX4841
6 2 EN GND FLAG 3 NOTE: EN AND PULLUP RESISTOR ON MAX4838/ MAX4840 ONLY.
MAX4838EXT-T MAX4839EXT-T MAX4840EXT-T MAX4841EXT-T
Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
ABSOLUTE MAXIMUM RATINGS
IN to GND ..............................................................-0.3V to +30V GATE to GND ........................................................-0.3V to +12V EN, FLAG to GND ....................................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) 6-Pin SC70 (derate 3.1mW/C above +70C) .............245mW Operating Temperature Range ..........................-40C to +85C Junction Temperature .................................................... +150C Storage Temperature Range ............................-65C to +150C Lead Temperature (soldering, 10s) ................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER Input Voltage Range Undervoltage Lockout Threshold Undervoltage Lockout Hysteresis Overvoltage Trip Level Overvoltage Trip Level Hysteresis IN Supply Current UVLO Supply Current GATE Voltage GATE Pulldown Current FLAG Output Low Voltage FLAG Output High Voltage FLAG Output High Leakage EN Input High Voltage EN Input Low Voltage EN Input Leakage IN ESD rating VGATE IPD VOL VOH IOH VIH VIL ILKG IIN OVLO MAX4838/MAX4839 MAX4840/MAX4841 MAX4838/MAX4839 MAX4840/MAX4841 No load, EN = GND or 5.5V, VIN = 5.4V VIN = 2.9V IGATE sourcing 1A VIN > VOVLO, VGATE = 5.5V 1.2V VIN < UVLO, ISINK = 50A VIN OVLO, ISINK = 1mA ISOURCE = 100A, FLAG deasserted, MAX4839/MAX4841 VFLAG = 5.5V, FLAG deasserted, MAX4838/MAX4840 MAX4838/MAX4840 MAX4838/MAX4840 MAX4838/MAX4840, EN = GND or 5.5V CIN 1F Human Body Model IEC 1000-4-2 15 15 1.47 0.65 1 2.4 1 9 60 0.4 0.4 7.0 5.5 SYMBOL VIN UVLO VIN falling CONDITIONS MIN 1.2 3.0 3.25 50 7.4 5.8 100 80 140 240 150 10 7.8 6.1 TYP MAX 28.0 3.5 UNITS V V mV V mV A A V mA V V A V V A kV
2
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Overvoltage Protection Controllers with Status FLAG
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +5V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1)
PARAMETER TIMING Startup Delay FLAG Blanking Time GATE Turn-On Time GATE Turn-Off Time FLAG Assertion Delay Initial Overvoltage Fault Delay Disable Time tSTART tBLANK tGON tGOFF tFLAG tOVP tDIS VIN > VUVLO, VGATE > 0.3V, Figure 1 VGATE = 0.3V,VFLAG = 2.4V, Figure 1 VGATE = 0.3V to 8V, CGATE = 1500pF, Figure 1 VIN increasing from 5V to 8V at 3V/s, VGATE = 0.3V, CGATE = 1500pF, Figure 2 VIN increasing from 5V to 8V at 3V/s, VFLAG = 0.4V, Figure 2 VIN increasing from 0 to 8V, IGATE = 80% of IPD, Figure 3 VEN = 2.4V, VGATE = 0.3V, MAX4838/MAX4840, Figure 4 20 20 50 50 7.0 6 5.8 100 580 20 80 80 ms ms ms s s ns ns SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX4838-MAX4841
Note 1: All parts are 100% tested at +25C. Electrical limits across the full temperature range are guaranteed by design and correlation.
Typical Operating Characteristics
(VIN = +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA = +25C, unless otherwise noted.)
REVERSE CURRENT vs. OUTPUT VOLTAGE
MAX4838 toc01 MAX4838 toc02
SUPPLY CURRENT vs. INPUT VOLTAGE
600 500 SUPPLY CURRENT (A) 400 300 200 100 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 0.1 3.5 1000
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838 toc03
12
SINGLE MOSFET REVERSE CURRENT (A) 100
9 GATE VOLTAGE (V)
10
6 MAX4840 MAX4841 3 MAX4838 MAX4839
1
BACK-TO-BACK MOSFETS
0 4.0 4.5 5.0 5.5 3 4 5 6 7 8 OUTPUT VOLTAGE (V) INPUT VOLTAGE (V)
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Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
Typical Operating Characteristics (continued)
(VIN = +5V, MAX4838; Si9936DY external MOSFET in back-to-back configuration; TA = +25C, unless otherwise noted.)
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838 toc04
POWER-UP RESPONSE
MAX4838 toc05
11.0 IGATE = 0 10.5 GATE VOLTAGE (V) IGATE = 4A
5V 0V 10V
IN
GATE
10.0
IGATE = 8A
0V 5V OUT
9.5
0V 5V ROUT = COUT = 0 20ms/div FLAG
9.0 5.0 5.1 5.2 5.3 5.4 5.5 INPUT VOLTAGE (V)
POWER-UP RESPONSE
MAX4838 toc06
OVERVOLTAGE RESPONSE
MAX4838 toc07
5V IN 0V 10V 0V 1A IIN 0A 5V 0V 20ms/div ROUT = 5 FLAG GATE
8V 5V 10V 0V 40mA
IN
GATE
0A 5V 0V CGATE = 1500pF 400ns/div
IGATE FLAG
POWER-UP OVERVOLTAGE RESPONSE
MAX4838 toc08
POWER-DOWN RESPONSE
MAX4838 toc09
8V 0V 5V GATE PULLED UP TO IN WITH 100
IN
5V 0V 10V
RLOAD = 50 RFLAG = 100k TO +5V
IN
GATE 0V 50mA IGATE 0A 5V FLAG 0V 1s/div 0V 5V 0V 5V
GATE
OUT
FLAG 0V 10ms/div
4
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Overvoltage Protection Controllers with Status FLAG
Pin Description
PIN MAX4838/ MAX4840 1 2 3 MAX4839/ MAX4841 1 2 3 NAME FUNCTION Input. IN is both the power-supply input and the overvoltage sense input. Bypass IN to GND with a 1F capacitor or larger. Ground Fault Indication Output, Active Low. FLAG is asserted low during undervoltage lockout and overvoltage lockout conditions. FLAG is deasserted during normal operation. FLAG is open-drain on the MAX4838/MAX4840, and push-pull on the MAX4839/MAX4841. Gate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN < VOVLO, GATE is driven high to turn on the external N-channel MOSFET(s). No Connection. Can be connected to GND. Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal device operation. Drive EN high to turn off the external MOSFET.
MAX4838-MAX4841
IN GND FLAG
4 5 6
4 5, 6 --
GATE N.C. EN
VIN 0V
5V VUVLO tGON 8V tSTART
VIN 5V
8V VOVLO tFLAG tGOFF
VGATE 0.3V tBLANK VFLAG 2.4V
VGATE 0.3V
VFLAG 0.4V
Figure 1. Startup Timing Diagram
Figure 2. Shutdown Timing Diagram
VIN 0V
8V VOVLO tOVP 80%
VEN
1.47V tDIS
VGATE 0.3V
IGATE
Figure 3. Power-Up Overvoltage Timing Diagram
Figure 4. Disable Timing Diagram
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5
Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
IN GND
5.5V REGULATOR
2x CHARGE PUMP
GATE DRIVER
GATE
UVLO AND OVLO DETECTOR EN
CONTROL LOGIC AND TIMER MAX4838- MAX4841
FLAG
Figure 5. Functional Diagram
Detailed Description
The MAX4838-MAX4841 provide up to 28V overvoltage protection for low-voltage systems. When the input voltage exceeds the overvoltage trip level, the MAX4838- MAX4841 turn off a low-cost external N-channel FET(s) to prevent damage to the protected components. An internal charge pump (Figure 5) drives the FET gate for a simple, robust solution.
enable normal device operation. Drive EN high to force the external MOSFET(s) off. EN does not override an OVLO or UVLO fault.
GATE Driver
An on-chip charge pump is used to drive GATE above IN, allowing the use of low-cost N-channel MOSFETS. The charge pump operates from the internal 5.5V regulator. The actual GATE output voltage tracks approximately two times VIN until VIN exceeds 5.5V or the OVLO trip level is exceeded, whichever comes first. The MAX4838/MAX4839 have a 7.4V typical OVLO, therefore GATE remains relatively constant at about 10.5V for 5.5V < VIN < 7.4V. The MAX4840/MAX4841 have a 5.8V typical OVLO, but this can be as low as 5.5V. The MAX4840/MAX4841 in practice may never actually achieve the full 10.5V GATE output. The GATE output voltage as a function of input voltage is shown in the Typical Operating Characteristics.
Undervoltage Lockout (UVLO)
The MAX4838-MAX4841 have a fixed 3.25V typical undervoltage lockout level (UVLO). When VIN is less than the UVLO, the GATE driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)
The MAX4838/MAX4839 have a 7.4V typical overvoltage threshold (OVLO), and the MAX4840/MAX4841 have a 5.8V typical overvoltage threshold. When VIN is greater than OVLO, the GATE driver is held low and FLAG is asserted.
FLAG Output
The FLAG output is used to signal the host system there is a fault with the input voltage. FLAG asserts immediately to an overvoltage fault. FLAG is held low for 50ms after GATE turns on before deasserting. The MAX4839 and MAX4841 have a push-pull FLAG output. The output high voltage is proportional to VIN for VIN up to 5.5V, and fixed at 5.5V when VIN > 5.5V. The MAX4838 and MAX4840 have an open-drain FLAG output. Connect a pullup resistor from FLAG to the logic I/O voltage of the host system.
Device Operation
The MAX4838-MAX4841 have an on-board state machine to control device operation. A flowchart is shown in Figure 6. On initial power-up, if VIN < UVLO or if VIN > OVLO, GATE is held at 0V, and FLAG is low. If UVLO < VIN < OVLO and EN is low, the device enters startup after a 50ms internal delay. The internal charge pump is enabled, and GATE begins to be driven above VIN by the internal charge pump. FLAG is held low during startup until the FLAG blanking period expires, typically 50ms after the GATE starts going high. At this point the device is in its on state. At any time if VIN drops below UVLO, FLAG is driven low and GATE is driven to ground.
EN Enable Input
EN is an active-low enable input on the MAX4838 and MAX4840 only. Drive EN low or connect to ground to
6
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Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
STANDBY GATE = 0 FLAG = LOW VIN > UVLO VIN < UVLO TIMER STARTS COUNTING t = 50ms OVLO CHECK GATE = 0 FLAG = LOW VIN < OVLO STARTUP GATE DRIVEN HIGH FLAG = LOW t = 50ms ON GATE HIGH FLAG = HIGH VIN > OVLO 1F INPUT 0 TO 28V NMOS OUTPUT
1
IN
GATE
4 VIO
MAX4838- MAX4841
6 2 EN GND FLAG 3 NOTE: EN AND PULLUP RESISTOR ON MAX4838/ MAX4840 ONLY.
Figure 7. Back-to-Back External MOSFET Configuration
MOSFET Selection
The MAX4838-MAX4841 are designed for use with either a single N-channel MOSFET or dual back-toback N-channel MOSFETs. In most situations, MOSFETs with R DS(ON) specified for a V GS of 4.5V work well. If the input supply is near the UVLO maximum of 3.5V consider using a MOSFET specified for a lower VGS voltage. Also the VDS should be 30V for the MOSFET to withstand the full 28V IN range of the MAX4838-MAX4841. Table 1 shows a selection of MOSFETs appropriate for use with the MAX4838- MAX4841.
Figure 6. State Diagram
Applications Information
MOSFET Configuration
The MAX4838-MAX4841 can be used with either a single MOSFET configuration as shown in the Typical Operating Circuit, or can be configured with a back-toback MOSFET as shown in Figure 7. The MAX4838-MAX4841 can drive either a single MOSFET or back-to-back MOSFETs. The back-to-back configuration has almost zero reverse current when the input supply is below the output. If reverse current leakage is not a concern, a single MOSFET can be used. This approach has half the loss of the back-to-back configuration when used with similar MOSFET types, and is a lower cost solution. Note that if the input is actually pulled low, the output is pulled low as well due to the parasitic body diode in the MOSFET. If this is a concern, then the back-to-back configuration should be used.
IN Bypass Considerations
For most applications, bypass IN to GND with a 1F ceramic capacitor. If the power source has significant inductance due to long lead length, take care to prevent overshoots due to the LC tank circuit and provide protection if necessary to prevent exceeding the 30V absolute maximum rating on IN. The MAX4838-MAX4841 provide protection against voltage faults up to 28V, but this does not include negative voltages. If negative voltages are a concern, connect a Schottky diode from IN to GND to clamp negative input voltages.
ESD Test Conditions
ESD performance depends on a number of conditions. The MAX4838-MAX4841 are specified for 15kV typical ESD resistance on IN when IN is bypassed to ground with a 1F ceramic capacitor. Contact Maxim for a reliability report that documents test setup, methodology, and results.
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Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
Table 1. MOSFET Suggestions
PART Si9936DY Si5904DC Si1426DH FDC6305N FDS8926A FDG315N IRF7752 IRF7303 IRF7607 CONFIGURATION/ PACKAGE Dual/SO8 Dual/1206-8 Single/SC70-6 Dual/SSOT-6 Dual/SO8 Single/SC70-6 Dual/TSSOP-8 Dual/SO8 Single/Micro-8 VDS MAX (V) 30 30 30 20 30 30 30 30 20 RON AT 4.5V (m) 80 143 115 80 20 160 36 80 30 MANUFACTURER Vishay Siliconix www.vishay.com 402-563-6866 Fairchild Semiconductor www.fairchildsemi.com 207-775-8100 International Rectifier www.irf.com 310-322-3331
Human Body Model
Figure 8 shows the Human Body Model and Figure 9 shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5k resistor.
IEC 1000-4-2
Since January 1996, all equipment manufactured and/or sold in the European community has been required to meet the stringent IEC 1000-4-2 specification. The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX4838-MAX4841 help users
design equipment that meets Level 3 of IEC 1000-4-2, without additional ESD-protection components. The main difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2. Because series resistance is lower in the IEC 1000-4-2 ESD test model (Figure 10), the ESD-withstand voltage measured to this standard is generally lower than that measured using the Human Body Model. Figure 11 shows the current waveform for the 8kV IEC 1000-4-2 Level 4 ESD Contact Discharge test. The Air-Gap test involves approaching the device with a charger probe. The Contact Discharge method connects the probe to the device before the probe is energized.
RC 1M CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE
RD 1.5k DISCHARGE RESISTANCE DEVICE UNDER TEST
IP 100% 90% AMPERES 36.8% 10% 0 0 tRL TIME
Ir
PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Cs 100pF
STORAGE CAPACITOR
tDL CURRENT WAVEFORM
Figure 8. Human Body ESD Test Model
Figure 9. Human Body Model Current Waveform
8
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Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
I 100% RC 50 to 100 CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 330 DISCHARGE RESISTANCE DEVICE UNDER TEST 90%
Cs 150pF
STORAGE CAPACITOR
I PEAK
10% t r = 0.7ns to 1ns t 30ns 60ns
Figure 10. IEC 1000-4-2 ESD Test Model
Figure 11. IEC 1000-4-2 ESD Generator Current
Pin Configuration
TRANSISTOR COUNT: 737 PROCESS: BiCMOS
TOP VIEW
IN 1 6 EN (N.C.) N.C.
Chip Information
GND 2
MAX4838- MAX4841
5
FLAG 3
4
GATE
( ) FOR MAX4839 AND MAX4841 ONLY.
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9
Overvoltage Protection Controllers with Status FLAG MAX4838-MAX4841
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
SC70, 6L.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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