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Obsolete Device
27C64
64K (8K x 8) CMOS EPROM
FEATURES
* High speed performance - 120 ns access time available * CMOS Technology for low power consumption - 20 mA Active current - 100 A Standby current * Factory programming available * Auto-insertion-compatible plastic packages * Auto ID aids automated programming * Separate chip enable and output enable controls * High speed "express" programming algorithm * Organized 8K x 8: JEDEC standard pinouts - 28-pin Dual-in-line package - 32-pin PLCC Package - 28-pin SOIC package - Tape and reel * Available for the following temperature ranges - Commercial: 0C to +70C - Industrial: -40C to +85C
PACKAGE TYPES
DIP/SOIC
VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 VSS
*1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC PGM NC A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3
27C64
PLCC
A7 A12 VPP NU Vcc PGM NC
32 31
DESCRIPTION
The Microchip Technology Inc. 27C64 is a CMOS 64K bit (electrically) Programmable Read Only Memory. The device is organized as 8K words by 8 bits (8K bytes). Accessing individual bytes from an address transition or from power-up (chip enable pin going low) is accomplished in less than 120 ns. CMOS design and processing enables this part to be used in systems where reduced power consumption and high reliability are requirements. A complete family of packages is offered to provide the most flexibility in applications. For surface mount applications, PLCC or SOIC packaging is available. Tape and reel packaging is also available for PLCC or SOIC packages.
A6 A5 A4 A3 A2 A1 A0 NC O0
30
4
3
2
1
5 6
29 28
7 8 9 10 11 12 13 14 15 16
27 26 25 24 23 22 21
A8 A9 A11 NC OE A10 CE O7 O6
17
18
19
2004 Microchip Technology Inc.
O1 O2 VSS NU O3 O4 O5
20
27C64
DS11107M-page 1
27C64
1.0
1.1
ELECTRICAL CHARACTERISTICS
Maximum Ratings*
TABLE 1-1:
Name A0-A12 CE OE PGM VPP O0 - O7 VCC VSS NC NU
PIN FUNCTION TABLE
Function Address Inputs Chip Enable Output Enable Program Enable Programming Voltage Data Output +5V Power Supply Ground No Connection; No Internal Connections Not Used; No External Connection Is Allowed
VCC and input voltages w.r.t. VSS ....... -0.6V to + 7.25V VPP voltage w.r.t. VSS during programming .......................................... -0.6V to +14V Voltage on A9 w.r.t. VSS ...................... -0.6V to +13.5V Output voltage w.r.t. VSS ................-0.6V to VCC +1.0V Storage temperature ..........................-65C to +150C Ambient temp. with power applied .....-65C to +125C
*Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
VCC = +5V (10%) Commercial: Tamb = 0C to +70C Industrial: Tamb = -40C to +85C
Parameter Input Voltages Input Leakage Output Voltages Output Leakage Input Capacitance Output Capacitance Power Supply Current, Active
Part* all all all all all all C I
Status Logic "1" Logic "0" -- Logic "1" Logic "0" -- -- -- TTL input TTL input
Symbol VIH VIL ILI VOH VOL ILO CIN COUT ICC1 ICC2
Min 2.0 -0.5 -10 2.4
Max VCC+1 0.8 10 0.45
Units V V A V V A pF pF mA mA
Conditions
VIN = 0 to VCC IOH = -400 A IOL = 2.1 mA VOUT = 0V to VCC VIN = 0V; Tamb = 25C; f = 1 MHz VOUT = 0V; Tamb = 25C; f = 1 MHz VCC = 5.5V; VPP = VCC; f = 1 MHz; OE = CE = VIL; IOUT = 0 mA; VIL = -0.1 to 0.8V; VIH = 2.0 to VCC; Note 1
-10 -- -- -- --
10 6 12 20 25
Power Supply Current, Standby IPP Read Current VPP Read Voltage
C I all all all
TTL input TTL input CMOS input Read Mode Read Mode
ICC(S) -- -- IPP VPP
-- -- -- VCC-0.7
2 3 100 100 VCC
mA mA A A V
CE = VCC 0.2V VPP = 5.5V
* Parts: C=Commercial Temperature Range; I =Industrial Temperature Range.
Note 1: Typical active current increases .5 mA per MHz up to operating frequency for all temperature ranges.
DS11107M-page 2
2004 Microchip Technology Inc.
27C64
TABLE 1-3: READ OPERATION AC CHARACTERISTICS
AC Testing Waveform: Output Load: Input Rise and Fall Times: Ambient Temperature: 27C64-12 Parameter Address to Output Delay CE to Output Delay OE to Output Delay CE or OE to O/P High Impedance Output Hold from Address CE or OE, whichever occurs first Sym Min Max Min Max Min Max Min Max Min Max tACC tCE tOE tOFF tOH -- -- -- 0 0 120 120 65 50 -- -- -- -- 0 0 150 150 70 50 -- -- -- -- 0 0 170 170 70 50 -- -- -- -- 0 0 200 200 75 55 -- -- -- -- 0 0 250 250 100 60 -- ns ns ns ns ns CE = OE = VIL OE = VIL CE = VIL VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V 1 TTL Load + 100 pF 10 ns Commercial: Tamb = 0C to +70C Industrial: Tamb = -40C to +85C 27C64-17 27C64-20 27C64-25 Units Conditions
27C64-15
FIGURE 1-1:
READ WAVEFORMS
Note 1: tOFF is specified for OE or CE, whichever occurs first. 2: OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3: This parameter is sampled and is not 100% tested.
2004 Microchip Technology Inc.
DS11107M-page 3
27C64
TABLE 1-4: PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25C 5C VCC = 6.5V 0.25V, VPP = VH = 13.0V 0.25V Parameter Input Voltages Input Leakage Output Voltages VCC Current, program & verify VPP Current, program A9 Product Identification Status Logic"1" Logic"0" -- Logic"1" Logic"0" -- -- -- Symbol VIH VIL ILI VOH VOL ICC2 IPP2 VH Min 2.0 -0.1 -10 2.4 -- -- -- 11.5 Max. VCC+1 0.8 10 -- 0.45 20 25 12.5 Units V V A V V mA mA V VIN = 0V to VCC IOH = -400 A IOL = 2.1 mA Note 1 Note 1 Conditions
Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V Ambient Temperature: Tamb=25C 5C VCC= 6.5V 0.25V, VPP = VH = 13.0V 0.25V Symbol tAS tDS tDH tAH tDF tVCS tPW tCES tOES tVPS tOE Min 2 2 2 0 0 2 95 2 2 2 -- Max -- -- -- -- 130 -- 105 -- -- -- 100 Units s s s s ns s s s s s ns 100 s typical Remarks
for Program, Program Verify and Program Inhibit Modes Parameter Address Set-Up Time Data Set-Up Time Data Hold Time Address Hold Time Float Delay (2) VCC Set-Up Time Program Pulse Width (1) CE Set-Up Time OE Set-Up Time VPP Set-Up Time Data Valid from OE
Note 1: For express algorithm, initial programming width tolerance is 100 s 5%. 2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no longer driven (see timing diagram).
DS11107M-page 4
2004 Microchip Technology Inc.
27C64
FIGURE 1-2: PROGRAMMING WAVEFORMS (1)
TABLE 1-6:
Operation Mode Read Program Program Verify Program Inhibit Standby Output Disable Identity
X = Don't Care
MODES
CE VIL VIL VIL VIH VIH VIL VIL OE VIL VIH VIL X X VIH VIL PGM VIH VIL VIH X X VIH VIH VPP VCC VH VH VH VCC VCC VCC A9 X X X X X X VH O0 - O7 DOUT DIN DOUT High Z High Z High Z Identity Code
1.2
Read Mode
(See Timing Diagrams and AC Characteristics) Read Mode is accessed when a) b) the CE pin is low to power up (enable) the chip the OE pin is low to gate the data to the output pins
For Read operations, if the addresses are stable, the address access time (tACC) is equal to the delay from CE to output (tCE). Data is transferred to the output after a delay from the falling edge of OE (tOE).
2004 Microchip Technology Inc.
DS11107M-page 5
27C64
1.3 Standby Mode 1.7 Verify
The standby mode is defined when the CE pin is high (VIH) and a program mode is not defined. When these conditions are met, the supply current will drop from 20 mA to 100 A. After the array has been programmed it must be verified to ensure all the bits have been correctly programmed. This mode is entered when all the following conditions are met: a) b) c) d) e) VCC is at the proper level, VPP is at the proper VH level, the CE line is low, the PGM line is high, and the OE line is low.
1.4
Output Enable
This feature eliminates bus contention in microprocessor-based systems in which multiple devices may drive the bus. The outputs go into a high impedance state when the following condition is true: * The OE and PGM pins are both high.
1.8
Inhibit
1.5
Erase Mode (U.V. Windowed Versions)
Windowed products offer the capability to erase the memory array. The memory matrix is erased to the all 1's state when exposed to ultraviolet light. To ensure complete erasure, a dose of 15 watt-second/cm2 is required. This means that the device window must be placed within one inch and directly underneath an ultraviolet lamp with a wavelength of 2537 Angstroms, intensity of 12,000W/cm2 for approximately 20 minutes.
When programming multiple devices in parallel with different data, only CE or PGM need be under separate control to each device. By pulsing the CE or PGM line low on a particular device in conjunction with the PGM or CE line low, that device will be programmed; all other devices with CE or PGM held high will not be programmed with the data, although address and data will be available on their input pins (i.e., when a high level is present on CE or PGM); and the device is inhibited from programming.
1.9
Identity Mode
1.6
Programming Mode
The Express Algorithm has been developed to improve the programming throughput times in a production environment. Up to ten 100-microsecond pulses are applied until the byte is verified. No overprogramming is required. A flowchart of the express algorithm is shown in Figure 1-3. Programming takes place when: a) b) c) d) e) VCC is brought to the proper voltage, VPP is brought to the proper VH level, the CE pin is low, the OE pin is high, and the PGM pin is low.
In this mode, specific data is output which identifies the manufacturer as Microchip Technology Inc. and device type. This mode is entered when Pin A9 is taken to VH (11.5V to 12.5V). The CE and OE lines must be at VIL. A0 is used to access any of the two non-erasable bytes whose data appears on O0 through O7.
Pin Identity
Input A0 VIL VIH
Output 0OOOOOOO 76543210 H e x
Manufacturer Device Type*
0 0 1 0 1 0 0 1 29 0 0 0 0 0 0 1 0 02
Since the erased state is "1" in the array, programming of "0" is required. The address to be programmed is set via pins A0-A12 and the data to be programmed is presented to pins O0-O7. When data and address are stable, OE is high, CE is low and a low-going pulse on the PGM line programs that location.
* Code subject to change
DS11107M-page 6
2004 Microchip Technology Inc.
27C64
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM
2004 Microchip Technology Inc.
DS11107M-page 7
27C64
27C64 Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed sales offices.
27C64
-
25
I /P Package: Temperature Range: Access Time: Device: L = Plastic Leaded Chip Carrier P = Plastic DIP (600 Mil) SO = Plastic SOIC (300 Mil) Blank = 0C to +70C I = -40C to +85C 12 15 17 20 25 27C64 = = = = = 120 ns 150 ns 170 ns 200 ns 250 ns 64K (8K x 8) CMOS EPROM
DS11107M-page 8
2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
2004 Microchip Technology Inc.
DS11107M-page 9

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