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| P I f ec t t L iIs Mot aliminitasl asrpe subjec n R E h is c etri ce:T Noti e param m So A RifYtiono. change. ica N MITSUBISHI M62023L,P,FP PIN CONFIGURATION (TOP VIEW) SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP GENERAL DESCRIPTION The M62023L/P/FP is a system reset IC that controls the memory backup function of an SRAM and an embedded RAM of a microcontroller. The IC outputs reset signals (RES/RES) to a microcontroller at power-down and power failure. It also shifts the power supply to RAMs from main to backup, outputs a signal (CS) that invokes standby mode, and alters RAMs to backup circuit mode. 8 CS 7 RES 6 GND 5 RES 4 Ct 3 VIN 2 VBAT 1 VOUT Outline 8P5 (L) FEATURES * Built-in switch for selection between main power supply and backup power supply to RAMs * Small difference between input and output voltages (IOUT=80mA, VIN=3V) : 0.15V typ * Detection voltage (power supply monitor voltage) : 2.57V typ * Chip select signal output (CS) * Two channels of reset outputs (RES/RES) * Power on reset circuit APPLICATION Power supply control systems for memory of microcontroller systems in electronic equipment such as OA equipment, industrial equipment, and home-use electronic appliances and SRAM boards with built-in backup function that require switching between external power supply and battery. VOUT 1 VBAT 2 VIN 3 Ct 4 8 CS 7 RES 6 GND 5 RES Outline 8P4 (P) 8P2S-A (FP) BLOCK DIAGRAM VIN 3 R1 Com SW 1 VOUT D1 RESET CIRCUIT 2 VBAT R2 1.24V RES 7 RES 5 8 CS DELAY CIRCUIT 4 Ct 6 GND ( 1 / 4) 1997.5.30- rev P I f ec t t L iIs Mot aliminitasl asrpe subjec n R E h is c etri ce:T Noti e param m So A RifYtiono. change. ica N MITSUBISHI M62023L,P,FP SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP ABSOLUTE MAXIMUM RATINGS (Ta=25C, unless otherwise noted) Symbol VIN IOUT Pd K Topr Tstg Parameter Input voltage Output current Power dissipation Thermal derating Operating temperature Storage temperature Conditions Ratings 7 100 800(L)/625(P)/440(FP) 8(L)/6.25(P)/4.4(FP) -20 to +75 -40 to +125 Unit V mA mW mW/C C C Ta 25C ELECTRICAL CHARACTERISTICS (Ta=25C, unless otherwise noted) Symbol VS VS ICC VDROP VOH(Ct) VOL(Ct) Parameter Detection voltage Hysteresis voltage Circuit current Difference between input and output voltages Ct output voltage (high level) Ct output voltage (low level) Test Conditions VIN (At charge from H L) VS=VSH-VSL VIN=2V IOUT=0mA VIN=3V IOUT=50mA VIN=3V IOUT=80mA VIN=3V (Note 1) VIN=2V (Note 1) VIN=2V (Note 1) (Note 1) VIN=3V Isink=1mA VIN=3V (Note 1) (Note 1) VIN=2V Isink=1mA VIN=2V (Note 2) VIN=0V, VBAT=3V (Note 2) (Note 1) VIN=3V Isink=1mA VIN=3V VBAT=3V VIN=0V IF=10A VIN=0V 3V, Ct=4.7F VIN=3V 2V (Note 3) Limits Min Typ Max Unit V mV mA V V V V V V 2.44 50 2.0 1.5 VOH(RES) RES output voltage (high level) VOL(RES) RES output voltage (low level) VOH(RES) RES output voltage (high level) VOL(RES) RES output voltage (low level) 2.5 VOH(CS) VOL(CS) IR VF tpd td CS output voltage (high level) 1.3 2.40 CS output voltage (low level) 2.57 100 1.5 6.5 0.1 0.15 2.4 0.02 2.0 0.02 0.04 3.0 0.02 0.04 1.6 2.47 0.07 0.08 2.70 200 3.0 10 0.2 0.3 0.1 0.2 0.2 V V V A V ms s V Backup Di leak current Backup Di forward direction voltage Delay time Response time 10 VOPL(RES) RES limit voltage of operation 0.54 27 5.0 0.65 0.3 0.5 0.5 0.6 55 25.0 Note 1. Regarding conditions to measure VOH and VOL, voltage values are generated by internal resistance only and no external resistor is used. 2. These values are produced inserting an external resistor, RCS=1M, between the CS pin and GND. 3. With no external resistor (10K internal resistance only) ( 2 / 4) 1997.5.30- rev P I f ec t t L iIs Mot aliminitasl asrpe subjec n R E h is c etri ce:T Noti e param m So A RifYtiono. change. ica N MITSUBISHI M62023L,P,FP SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP EXPLANATION OF TERMINALS Pin No. Symbol Name Function VIN and VBAT are controlled by means of an internal switch and output through VOUT. Power supply output The pin is capable of outputting up to 100 mA. Use it as VDD of CMOS RAM and the like. Backup power supply Backup power supply is connected to this pin. input If a lithium battery is used, insert a resistor in series for safety purposes. Power supply input +3V input pin. Connect to a logic power supply. Delay capacitor A delay capacitor is connected to this pin. By connecting a capacitor, it is connection pin possible to delay each output. Connect to the positive reset input of a microcontroller. The pin is capable of Positive reset output flowing 1mA sink current. Ground Reference for all signals Connect to the negative reset input of a microcontroller. The pin is capable of Negative reset output flowing 1mA sink current. Connect to the chip select of RAM. The CS output is at low level in normal state thereby letting RAM be active. Under failure or backup condition, the CS Chip select output output is set to high level, then RAM enters standby state disabling read/write function. The pin is capable of flowing a 1mA sink current. 1 VOUT 2 3 4 5 6 7 VBAT VIN Ct RES GND RES 8 CS APPLICATION EXAMPLE M62023 +3V (MAIN POWER SUPPLY) VIN SW VOUT 3 CIN VDD R2 MCU or CPU 1.24V RES R1 D1 Com RESET CIRCUIT 1 VBAT BATTERY 2 CS 3V COUT VDD 8 DELAY CIRCUIT GND 7 5 RES 4 Ct Ct CMOS RAM 6 Capacitance to be connected: CIN: 10F; COUT: 4.7F; Ct: 4.7F ( 3 / 4) 1997.5.30- rev P I f ec t t L iIs Mot aliminitasl asrpe subjec n R E h is c etri ce:T Noti e param m So A RifYtiono. change. ica N MITSUBISHI M62023L,P,FP tpd VSH VSL SYSTEM RESET IC WITH SWITCH FOR MEMORY BACK-UP tpd 3V TIMING CHART VIN 0V VS VOUT V1 V2 V3 CS V2 V3 VOL(CS) 3V VIN(VSL) RES VOL(RES) VOH(RES) VIN(VSL) RES VOL(RES) V1=VIN-VDROP V2=VIN-VEB(SW Tr.) V3=VBAT-VF Input voltage In normal operation Input voltage : 3V In failure (instantaneous drop) Input voltage : 3V 2V Each output varies if the input voltage drops to VSL or under Restoration from failure (instantaneous drop) In backup state Output pin Input voltage : 2V 3V Input voltage : 0V If the input voltage goes higher Backup voltage : 3V than VSL by 100mV, each output varies after delay produced by the delay circuit SW Tr. is turned ON after delay VBAT-VF and a voltage (VIN-VDROP) is output VOUT With SW Tr. set to ON, a voltage (VIN-VDROP) is output SW Tr. is turned OFF. A voltage (VIN-VEB) is output by the diode between E and B of SW Tr. As the state shifts from a logic low to logic high, the output level becomes approximately equal to the input voltage As the state shifts from a logic high to logic low, the output level becomes VOL(RES) As the state shifts from a logic low to logic high, the output level becomes the voltage VIN-VEB RES The output level is VOL(RES) with a logic low A logic high is maintained, and then shifts to a logic low RES The output level is VOH(RES) with a logic high A logic low is maintained, and then shifts to a logic high CS The output level is VOL(CS) with a logic low A logic high is maintained, and then shifts to a logic low The output is a logic high and the output level is VBAT-VF ( 4 / 4) 1997.5.30- rev |
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