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 USAR SPICoderTM SA01 UR5HCSPI-SA01
Zero-Power Keyboard Encoder & Power Management IC for Intel StrongARMTM H/PCs
Description The USAR UR5HCSPI-SA01 SPICoderTM, a member of USAR's H/PC IC product family, is a keyboard encoder and power management IC designed specifically for Handheld PCs (H/PCs), Web Phones and other systems that run Microsoft(R) Windows CE(R) and utilize the Intel StrongARMTMprocessor. The UR5HCSPI-SA01 offers several features necessary to H/PCs, including low power consumption, real estate-saving size, and special keyboard modes. The IC operates at Zero-PowerTM (less than 2A @ 3V), providing the the host system both power management and I/O flexibility, with minimal battery drainage. Unlike the UR5HCSPI-SA, the SA01 does not offer Lid function. Special keyboard modes and builtin power management features allow the USAR SPICoderTM SA01 to operate in harmony with the power management modes of Windows CE(R), resulting in greater user flexibility, and longer battery life. The IC will scan, debounce and encode an 8 x 14 keyboard matrix. It communicates with the Host over the SPI channel, implementing a high-reliability two-way protocol. The UR5HCSPI-SA01 also offers programmable features for wakeup keys and general purpose I/O pins. Features
A Semtech Company USAR H/PC ICs family product specifications
* SPI-compatible keyboard encoder and power management IC; other interfaces available * Ideal for use with the Intel StrongARMTM processor * Operates at patented Zero-PowerTM -- typically consuming less than 2A, between 3-5V * Offers overall system power management capabilities * Available in 10mm by 10mm, 44pin low profile QFP package; other packaging available
* Implements high-reliability two-way protocol * Fully compatible to the WinCE(R) keyboard specification * Works in harmony with the power management modes of WinCE(R) * Provides special modes of operation for H/PCs, including programmable "wake-up" keys * Scans an 8 x 14 matrix; controls discrete switches and LED indicators * Compatible with "system-on silicon" CPUs for H/PCs
Applications * StrongARMTM Handheld PCs * Windows CE(R) Platforms * Web Phones Pin Assignments * Personal Digital Assistants (PDAs) * Wearable Computers * Internet Appliance
PWR_OK NC0 OSCO OSCI Vcc NC NC _RESET _WKU Vx C7
33 34
_ATN _SS SCK MOSI MISO XSW SW0 C8 C9 C10/WUKO C11
23 22
QFP
NC C12 C13 GIO0 _IOTEST Vss NC R7 R6 R5 R4
44
1
12 11
UR5HCSPI-SA01-FB 44-pin QFP (0.80 mm pitch (10x10 mm)
SPICoderTM is a trademark of USAR Systems, Inc. All other trademarks belong to their respective companies. USAR - A Semtech Company Datasheet DOC5-SPI-SA01-DS-103
C6 C5 C4 C3 C2 C1 C0 R0 R1 R2 R3
1
USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
USAR -- A Semtech Company
Descri
Ordering Code
Package options 44-pin, Plastic PLCC 44-pin, Plastic QFP Pitch In mm's 1.27 mm 0.8 mm TA = -40C to +85C UR5CSPI-SA-FN UR5CSPI-SA-FB
Block Diagram
MISO MOSI SCK SS ATN SPI Communication Channel Keyboard Scanner
&
R0-R8
Keyboard State Control Programmable I/O
Keyboard Matrix
GIO0
C0-C13
PWR_OK WKUP IOTEST WKU Power Management Unit System Monitor Input Signals WUKO XSW SWO
Wake-Up Keys Only Signal Switch External to Case Switch
UR5HCSPI-SA01
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Functional Description The UR5HCSPI-SA01 consists functionally of five major sections (see the Functional Diagram on page 2). These are the Keyboard Scanner and State control, the Programmable I/O, the SPI Communication Channel, the System Monitor and the Power Management unit. All sections communicate with each other and operate concurrently.
Pin Definitions
Mnemonic VCC VSS VX OSCI OSCO _RESET MISO MOSI SCK _SS _IOTEST _WKU R0-R4 R5-R7 C0-C5 C6-C7 C8-C9 C11 C12 C13 C10/WUKO GI00 XSW SWO _ATN _PWR_OK NC PLCC 44 22 4 43 42 1 34 35 36 37 24 2 13-17 19-21 12-7 6-5 31-30 28 27 26 29 25 33 32 QFP 38 17 43 37 36 41 29 30 31 32 18 42 8-12 13-15 7-2 1,44 26-25 23 21 20 24 19 28 27 Type I I I I O I O I I I O I I I O O O I/O O O Name and Function Power Supply: 3-5V Ground Tie to VCC Oscillator input Oscillator output Reset: apply 0V to provide orderly start-up SPI Interface Signals
Slave Select: If not used tie to VSS Wake-Up Control Signals Row Data Inputs Port provides internal pull-up resistors Column Select Outputs:
38 33 39 34 3,18 39-40 23,40 16,22 NC0 41 35 NC0 should be tied to VSS or GND Note: An underscore before a pin mnemonic denotes an active low signal.
Multi-function pins I/O C10 & "Wake-Up Keys Only" imput Miscellaneous functions I/O General programmable I/O I External discrete switch I Discrete switch Power Management Pins O CPU Attention Output I Power OK Input No Connects: these pns are unused
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Pin Descriptions VCC and VSS VCC and VSS are the power supply and ground pins. The UR5HCSPI-SA01 will operate from a 3-5 Volt power supply. To prevent noise problems, provide bypass capacitors placed as close as possible to the IC with the power supply. VX, where available, should be tied to Vcc. OSCI and OSCO OSCI and OSCO provide the input and output connections for the onchip oscillator. The oscillator can be driven by any of the following circuits: - Crystal - Ceramic Resonator - External Clock Signal The frequency of the on-chip oscillator is 2 MHz. _RESET A logic zero on the _RESET pin will force the UR5HCSPI-SA01 into a known start-up state. The reset signal can be supplied by any of the following circuits: - RC - Voltage monitor - Master system reset MOSI, MISO, SCK, _SS, _ATN These five signals implement the SPI interface. The device acts as a slave on the SPI bus. The _SS (Slave Select) pin must go high between successive characters in an SPI message or it will cause a write collision error. The _ATN pin is asserted low each time the UR5HCSPI-SA01 has a packet ready for delivery. For a more detailed description, refer to the SPI Communication Channel section on page 11 of this document. _IOTEST and _WKU The_IOTEST and _WKU pins ("Input Output Test" and "Wake Up") pins control the stop mode exit of the device. The designer can connect any number of active low signals to these two pins through a 15K resistor, in order to force the device to exit the stop mode. A sample circuit is shown on page 17 of this document. All the signals are "wire-anded." When any one of these signals is not active, it should be floating (i.e., these signals should be driven from "open-collector" or "opendrain" outputs). Other configurations are possible; contact the factory. R0-R7 The R0-R7 pins are connected to the rows of the scanned matrix. Each pin provides an internal pullup resistor, eliminating the need for external components. C0 to C9 and C11 Pins C0 to C9 are bi-directional pins and are connected to the columns of the scanned matrix. When a column is selected, the pin outputs an active low signal. When the column is de-selected, the pin turns into high-impedance. C10/WUKO The C10/WUKO pin acts alternatively as column scan output and as an input. As an input, the pin detects the "Wake-Up Keys Only" signal, typically provided by the host CPU to indicate that the user has turned the unit off. When the device detects an active high state on this pin, it feeds this information into the "Keyboard State Control" unit, in order to disable the keyboard and enable the programmed wake-up keys. To achieve maximum power savings, the resistor connected to WUKO can be as large as 1.5 MOhm.
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Pin Descriptions, Cont. C12 and C13 C12 and C13 are used as additional column pins in order to accommodate larger-size keyboards, such as the Fujitsu FKB1406 palmtop keyboard. GIO0 is a programmable input/output switch or LED pin; it can also be used as a wake-up signal. Its programming is explained on page 9 of this document. XSW
The Windows CE(R) Keyboard
The following illustration shows a typical implementation of a Windows CE(R) keyboard.
power
esc
~
1!
2@
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6^
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8*
9(
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E D X alt
R F C
T G V
Y H B
U J N
I K M
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tab shift ctrl
enter shift
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The XSW pin is dedicated to an external switch. This pin is handled differently than the rest of the switch matrix and is intended to be connected to a switch physically located on the outside of the unit. SW0 The SW0 pin is a dedicated input pin for a switch. PWR_OK The PWR_OK is an active low pin that monitors the battery status of the unit. When the UR5HCSPISA01 detects a transition from high to low on this pin, it will immediately enter the STOP mode, turn the LED off and remain in this state until the batteries of the unit are replaced and the signal is deasserted.
Windows CE(R) does not support the following keyboard keys typically found on desktop and laptop keyboards: INSERT SCROLL LOCK PAUSE NUM LOCK Function Keys (F1-F12) PRINT SCREEN If the keyboard implements the Windows key, the following key combinations are supported in the Windows CE(R) environment: Key Combination Windows Windows+K Windows+I Windows+C Windows+E Windows+R Windows+H Ctrl+Windows+A Result Open Start Menu Open Keyboard Tool Open Stylus Tool Open Control Panel Explore the H/PC Display the Run Dialog Box Open Windows CE(R) Help Select all on desktop
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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"Ghost" Keys In any scanned contact switch matrix, whenever three keys defining a rectangle on the switch matrix are pressed at the same time, a fourth key positioned on the fourth corner of the rectangle is sensed as being pressed. This is known as the "ghost" or "phantom" key problem.
Actual key presses
Keyboard Scanner The encoder scans a keyboard organized as an 8 row by 14 column matrix for a maximum of 112 keys. Smaller size matrixes can also be accommodated by simply leaving unused pins open. The UR5HCSPISA01 provides internal pull-ups for the Row input pins. When active, the encoder selects one of the column lines (C0-C13) every 512 S and then reads the row data lines (R0-R7). A key closure is detected as a zero in the corresponding position of the matrix. A complete scan cycle for the entire keyboard takes approximately 9.2 mS. Each key found pressed is debounced for a period of 20 mS. Once the key is verified, the corresponding key code(s) are loaded into the transmit buffer of the SPI communication channel. Keyboard Scanning
N-Key Rollover
"Ghost" Key
In this mode, the code(s) corresponding to each key press are transmitted to the host system as soon as that key is debounced, independent of the release of other keys. When a key is released, the corresponding break code is transmitted to the host system. There is no limitation to the number of keys that can be held pressed at the same time. However, two or more key closures, occurring within a time interval of less than 5mS, will set an error flag and will not be processed. This feature is to protect against the effects of accidental key presses.
Figure 1: "Ghost" or "Phantom" Key Problem
Although the problem cannot be totally eliminated without using external hardware, there are methods to neutralize its negative effects for most practical applications. Keys that are intended to be used in combinations should be placed in the same row or column of the matrix, whenever possible. Shift Keys (Shift, Alt, Ctrl, Window) should not reside in the same row (or column) as any other keys. The UR5HCSPI-SA01 has built-in mechanisms to detect the presence of "ghost" keys.
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Keyboard States
D ) AN O=1 ss) K (WU ey Pre (K et Res Soft
Send Wake-Up Keys Only
Send All Keys
(PW AND R_OK = AND (WUK0 1) =0 (Key Pres ) s) PWR _OK
Send No Keys
PWR_OK (PWR_OK = 1) AND (Key Press)
Figure 2: The UR5HCSPI-SA01 implements three modes of keyboard and switch operation.
These states of operation refer only to the keyboard functionality and, although they are related to power states, they are also independent of them. "Send All Keys" Entry Conditions: Power on reset, soft reset, PWR_OK =1, {(WUKO=0)} Exit Conditions: PWR_OK = 0 -> "Send No Keys"(WUKO=1) AND (Key Press) -> "Send Wake-Up Keys Only"(LID = 0) AND (WUKO=0) AND (Key Press) -> "Send XSW Key Only" Description: This is the UR5HCSPISA01's normal state of operation, accepting and transmitting every key press to the system. This state is entered after the user powers on the unit and it is sustained while the unit is being used.
"Send Wake-Up Keys Only" Entry Conditions:(WUKO=1) AND (Key or Switch press) Exit Conditions: Soft Reset -> "Send All Keys"PWR_OK = 0 -> "Send No Keys" Description:This state is entered when the user turns the unit off. A signal line driven by the host will notify the UR5HCSPI-SA01 about this state transition. While in this state, the UR5HCSPI-SA01 will transmit only keys programmed to be wake-up keys to the system. It is not necessary for the UR5HCSPI-SA01 to detect this transition in real time, since it does not affect any operation besides buffering keystrokes. "Send No Keys" Entry Conditions:PWR_OK transition from high to low Exit Conditions: (PWR_OK = 1) AND (Matrix key pressed OR Switch OR _WKUP)
Description: This state is entered when a PWR_OK signal is asserted (transition high to low), indicating a critically low level of battery voltage. The PWR_OK signal will cause an interrupt to the UR5HCSPI-SA01, which guarantees that the transition is performed in real time. While in this state, the UR5HCSPI-SA01 will perform as follows: 1. The LED will be turned off. Nevertheless, its state is saved and will be restored after exiting the disabled state (change of batteries). 2. The UR5HCSPI-SA01 will enter the STOP mode for maximum energy conservation. 3 Stop mode time-out entry will be shortened to further conserve energy. 4. While in this state all interrupts are disabled. The UR5HCSPISA01 will exit this state on the next interrupt event that detects the PWR_OK line has been deasserted.e
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Key Map for the Fujitsu FKB1406 (UR5HCSPI-SA01)
0 LAlt 1 \ LSft 2 3 LCtrl 4 FN 5 Esc Del Columns (C0-C13) 6 7 8 1 F1 2 F2 T 9 F9 Y 9 0 F10 U Pad 4 10 NmLk I Pad 5 11 + Bk Enter 12 13 BkSp RShift PgDn TAB Rows (R0-R6) Q W E R O Pad 6 L Pad 3 H P Ins ; PrtScr J Pad 1 , [ Pause ` SysReq / / . ] ScrLk
0 1 2
Z
CapLk
3
A S D F
K Pad 2 G
PgUp
4
X C V B Pad 0 5 F5 N M
Home Spc
5 6
3 F3 4 F4
6 F6
7 F7
8 F8
Prog End
Keyboard Layout for Fujitsu FKB1406
Esc
!
@
#
$
%
^
&
7
*
8
(
9
)
1 F2
2 F2
3 F3
4 F4
5 F5
6 F6
7 F7
8 F8
9 F9
0 F10
*
_ + - Num = Bk Lk
Q
Del Cap Lock Shift
W A Z
~
E D
R F V
T G
Y H
U
4
I
1
5
O
6
P
_
{ [ Pause
+
} ] Scr Lk "
Prog
Ins
S X
: ;
J
K2 L3
< ,
: ;
Prt Scr
Fn
C
B
N
M0
..
>
'
/
Sys Req
Enter
? /
Shift
Ctrl
Alt
Home PgUp PgDn
End
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Key Codes
GIO0 Pin
Key codes range from 01H to 73H and are arranged as follows: Make code = column_number * 8 + row_number + 1 Break code = Make code OR 80H
The UR5HCSPI-SA01 provides a general purpose pin, GIO0, that can be programmed as Input, Output, Debounced Switch Input or LED Output. The programmable I/O pin can be configured to the desired mode through a command from the system. After the I/O pin is configured, the host system can read or write data to it. If the pin is configured as a Debounced Switch, it will return scan codes. For Pin GIO0:
Discrete Switches transmit the following codes: XSW = 71H SW0 = 72H GIO0 = 73H
I/O Number = 0 LED Number = 0
Input Mode While in the Input Mode, the GIO0 pin will detect input signals and report the input status to system as required. Output Mode In the Output Mode, the UR5HCSPI-SA01 will control the output signal level according to the system command. When the pin is set at Output Mode, the default output is low. Switch Input Mode In Switch Input Mode, the UR5HCSPI-SA01 will generate an individual make key code when the switch closes (pin goes low), and a break key code when the switch returns to open (pin goes to high). The switches generate key codes outside of those generated by the key matrix, from 71H - 73H. When the switch closes, the USAR SPICoderTM will not fall asleep.
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Pin Configurations When prototyping, caution should be taken to ensure that programming of the GIO0 pin does not conflict with the circuit implemented. A series protection resistor is recommended for protection from improper programming of the pin. After a power-on or soft reset, GIO0 defaults to the Input state. The following drawing illustrates the suggested interface to the general purpose input/output pin.
LED Modes
1 on off off interval on interval
2 on off
3 on
meta blink count on off on
meta blink off 1 blinking cycle
Figure 4: Timing chart: the behavior of an LED using the settings,1: LED on; 0: LED off.
Input
Output
GIX Circuit determined by the specific application Series protection resistor LED
GIX Circuit determined by the specific application Switch
There are three LED modes: off, on, and blinking. The LED can be individually set to one of these modes. In the Blinking Mode, both the oninterval and the off-interval can be individually set. Additionally, a meta blink count and meta blink interval may be specified. This describes an interval of a different length which may be inserted after each specified number of blinks. All the intervals are based on a 1/16th of a second duration. When the LED is on or blinking, the USAR SPICoderTM will not enter the STOP Mode unless the PWR_OK signal is asserted low. In this case, the device will save the status of the LED and turn it off. The default LED mode is off. The above timing chart describes the behavior of an LED using these settings,1: LED on; 0: LED off.
150K
_WKU _IOTEST
15K
GIX
GIX Wake-up interrupt generating switch
Figure 3: Suggested interface of general purpose input/output pin
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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SPI Communication Channel SPI data transfers can be performed at a maximum clock rate of 500 KHz. When the UR5HCSPI-SA01 asserts the _ATN signal to the host Master, the data will have already been loaded into the data register waiting for the clocks from the master. One _ATN signal is used per each byte transfer. If the host fails to provide clock signals for successive bytes in the data packet within 120 mS, the transmission will be aborted and a new session will be initiated by asserting a new _ATN signal. In such a case, the whole packet will be re-transmitted. If the SPI transmission fails 20 times consecutively, the synchronization between the master and slave may be lost. In this case, the UR5HCSPI-SA01 will enter the reset state. When CPHA = 0, the shift clock is the OR of _SS with SCK; therefore, _SS must go high between successive characters in an SPI message. The master can assert _SS low only when it is getting ready to transmit or receive. After the last bit is shifted out, _SS must go high within 60 S. The UR5HCSPI-SA01 implements the SPI communication protocol according to the following diagram: CPOL = 0 ---------- SCK line idles in low state CPHA = 0 ---------- SS line is an output enable control
Figure 5: SPI Communication Protocol
When the host sends commands to the keyboard, the UR5HCSPI-SA01 requires that the minimum and maximum
Figure 6: Transmitting Data Waveforms:
Figure 7: Receiving Data Waveforms
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Data/Command Buffer The UR5HCSPI-SA01 implements a data buffer that contains the key code/command bytes waiting to be transmitted to the host. If the data buffer is full, the whole buffer will be cleared and an "Initialize" command will be sent to the host. At the same time, the keyboard will be disabled until the "Initialize" or "Initialize Complete" command from the host is received. Power Management Unit
SPI Communication Table The following table describes the specific timing referenced in diagrams on page 12.
Signal Name tATN:SA _ TSCK tSS:HD tWKUP tSCK:SA tIB Description ATN to first clock pulse Clock period Last clock pulse to _SS de-asertion _WKUP pulse width _WKUP to first clock pulse Inter-byte period Min 2 125 5 0.2 Max 120 60 150 5 Units mS S S nS mS mS
The UR5HCSPI-SA01 supports two modes of operation. The following table lists the typical and maximum supply current (no DC loads) for each mode at 3.3 Volts (+/- 10%).
Current RUN STOP Typical 1.5 1 2.0 Max 3.0 20 Unit mA A Description Entered only while data/commands are in process and if the LEDs are blinking Entered after 125 mS of inactivity if LEDs islow
Power consumption of the keyboard sub-system will be determined primarily by the use of the LEDs. While the UR5HCSPI-SA01 is in the STOP mode, an active low Wake-Up Output from the Master must be connected to the edge-sensitive _WKU pin of the UR5HCSPI-SA01. This signal will be used to wake up the UR5HCSPI-SA01 in order to receive data from the Master host. The Master host will have to wait a minimum of 5 mS prior to providing clocks to the UR5HCSPI-SA01. The UR5HCSPI-SA01 will enter the STOP mode after a 125 mS period of keypad and/or host communications inactivity, or anytime the PWR_OK line is asserted low by the host. Note that while one or more keys are held pressed, the UR5HCSPI-SA01 will not enter the STOP mode until every key is released.
-
Keyboard Switch Input transaction System wake-up
Stop
- After 125 mS of inactivity and LEDs are off
Run
While processing current task and/or LED(s) are active
After Reset or 125 mS of inactivity
Figure 8: The Power States of the UR5HCSPI-SA01.
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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Communication Protocol There are eight commands that may be sent from the UR5HCSPI-SA01 to the host, and ten commands that may be sent from the host to the UR5HCSPI-SA01. Each command from UR5HCSPI-SA01 to the host is composed of a sequence of codes. All commands start with code (80H) and end with LRC code (see the description of the LRC calculation on page 14). Command details are listed below.
Commands to the Host - Summary Command Name Code Initialize Request AOH Initialize Complete A1H Heartbeat Response A2H Identification Response F2H LED Status Report A3H Resend Request A5H Input/Output Mode Status Report A7H Input/Output Data Report A8H Description Sent to the host when the data buffer is full Issued upon completion of the "Initialize" command issued by the host Response to "Heartbeat Request" issued by the host Response to "Identification Request" issued by the host Response to "LED Status Request" Issued upon error during the reception of a packet Reports the status of GIO0 pin Response to "I/O Data Request" command from the host
LRC Calculation The LRC is calculated for the whole packet, including the Command Code and the Command Prefix. The LRC is calculated by first taking the bitwise exclusive OR of all bytes from the message. If the most significant bit (MSB) of the LRC is set, the LRC is modified by clearing the MSB and changing the state of the next most significant bit. Thus, the Packet Check Byte will never consist of a valid LRC with the most significant bit set.
Commands to the Host Analytically Initialize Request: The UR5HCSPI-SA01 will send when its data buffer is full.
80H A0H 20H the Initialize Request Command to the host
Initialization Complete 80H A1H 21H The UR5HCSPI-SA01 wil send the Initialize Complete Report to the host when it finishes the initialization caused by Initialize Command from the host. Heartbeat Response: 80H A2H 22H The UR5HCSPI-SA01 will send the Heartbeat Response to the host when it receives the Heartbeat Request Command from the host. Identification Response: 80H F2H 02H --- USAR 08H --- Rev 0.8A 00H . 7EH The UR5HCSPI-SA01 will send the Identification Response to the host when it receives the Identification Request Command from the host.
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USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
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LRC Calculation, Cont. The following C language function is an example of an LRC calculation program. It accepts two arguments: a pointer to a buffer and a buffer length. Its return value is the LRC value for the specified buffer. char Calculate LRC (char buffer, size buffer) { char LRC; size_t index; /* * Init the LRC using the first two message bytes. */ LRC = buffer [0] ^ buffer [1]; /* * Update the LRC using the remainder of the buffer. */ for (index = 2; index < buffer; index ++) LRC ^ = buffer[index]; /* * If the MSB is set then clear the MSB and change the next most significant bit */ if (LRC & 0x80) LRC ^ = 0xC0; /* * Return the LRC value for the buffer.*/}
Commands to the Host from the UR5HCSPI-SA01, Cont.
LED Status Report
80H A3H xxH xxH xxH
LED0 status:( 0=OFF; 1=ON; 2=BLINKING; 3=NO LED MODE ) LED1 status:( 0=OFF; 1=ON; 2=BLINKING; 3=NO LED MODE ) LED2 status:( 0=OFF; 1=ON; 2=BLINKING; 3=NO LED MODE)
xxH The UR5HCSPI-SA01 will send the LED Status Report to the host when it receives the LED Status Request Command from the host. Resend Request 80H A5H 25H The UR5HCSPI-SA01 will send this Resend Request Command to the host when its command buffer is full, or if it detects either a parity error or an unknown command during a system command transmission. Input/Output Mode Status Report 80H A7H xxH IO number, 0 xxH IO mode: (0=input; 1=output; 2=switch; 3=LED ) xxH The UR5HCSPI-SA01 will send the I/O Mode Status Report to the host when it receives the I/O Mode Status Request Command from the host, in order to report the status of the GIO0 pin. Input/Output Data Report 80H A8H xxH IO number, 0 xxH IO data: ( 0=low, 1=high ) xxH The UR5HCSPI-SA01 will send the I/O Data Report to the host when it receives the I/O Data Request Command from the host.
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Commands from the Host to the UR5HCSPI-SA01 Each command to UR5HCSPI-SA01 is composed of a sequence of codes. All commands start with code (1BH) and end with the LRC code (bitwise exclusive OR of all bytes).
Commands from the Host - Summary Command Name Code Initialize AOH Initialization Complete A1H Heartbeat Request A2H Identification Request F2H LED Status Request A3H LED Modify A6H Resend Request A5H Input/Output Mode Modify A7H Output Data to I/O pin A8H Set Wake-Up Keys A9H Description Causes the UR5HCSPI-SA01 to enter the power-on state Issued as a response to the "Initialize Request" The UR5HCSPI-SA01 will respond with "Heartbeat Response" The UR5HCSPI-SA01 will respond with "Identification Response" The UR5HCSPI-SA01 will respond with "LED Status Response" The UR5HCSPI-SA01 will change the LED accordingly Issued upon error during the reception of a packet The UR5HCSPI-SA01 will modify or report the status of the GIO0 pin The UR5HCSPI-SA01 will output a signal to the GIO0 pin Defines which keys are "wake-up" keys
Commands from the Host to the UR5HCSPI-SA01 Analytically Initialize: 1BH A0H 7BH When the UR5HCSPI-SA01 receives this command, it will clear all buffers and return to the power-on state. Initialization Complete 1BH A1H 7AH When the UR5HCSPI-SA01 receives this command, it will enable transmission of keyboard data. Keyboard data transmission is disabled if the TX output buffer is full (32 bytes). Note that if the transmit data buffer gets full the encoder will issue an "Initialize Request" to the host. Heartbeat Request 1BH A2H 79H When the UR5HCSPI-SA01 receives this command, it will reply with the Heartbeat Response Report. Identification Request the UR5HCSPI-SA01 will reply
1BH F2H 29H to this command with the Identification Response Report.
LED Status Request 1BH A3H 78H When UR5HCSPI-SA01 receives this command, it will reply with the LED Status Report.
USAR - A Semtech Company Datasheet
DOC5-SPI-SA01-DS-103
15
USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
USAR -- A Semtech Company
Commands from the Host to the UR5HCSPI-SA01, Cont. Set Wake-Up Keys: 1BH A9H xxH (R7 R6 R5 R4 R3 R2 R1 R0 Bitmap: 0-enabled 1-disabled) xxH xxH xxH xxH xxH xxH xxH xxH xxH xxH xxH * xxH * xxH xxH (where SWITCHES bit assignments are = x x x x GIO0 SW0 XSW) xxH The "Set Wake-Up Keys" command is used to disable specific keys from waking up the host. Using this command, the host can set only a group of keys to act as "power-on" switches. The host can change the keyboard behavior dynamically according to the system power management requirements. The default after power on is "All Keys Enabled." LED Modify
1BH A6H xxH xxH xxH xxH xxH xxH
LED number (0) (0=LED OFF; 1=LED ON; 2=LED BLINKING) Time in 1/16ths of a second for LED to be on Time in 1/16ths of a second for LED to be off Number of blinks after which to apply meta blink interval Time in 1/16ths of a second for LED to be off after blinks
xxH When the UR5HCSPI-SA01 receives this command, it will change the LED mode accordingly. I/O Mode Modify
1BH A7H xxH xxH
IO number: 0 IO mode: ( 0=input, 1=output, 2=switch, 3=LED, 4=current mode request)
xxH When UR5HCSPI-SA01 receives this command, it will change the I/O pin's mode accordingly. If the =4, the UR5HCSPI-SA01 will send the I/O Mode Status Report to the host. Output Data to I/O Pin
1BH A8H xxH xxH
IO number: 0 IO data: ( 0=low, 1=high, 2=current I/O data request)
xxH When UR5HCSPI-SA01 receives this command, it will change the value of the output pin accordingly. If the addressed pin is not configured as an output pin, the command will be ignored. If =2, the UR5HCSPI-SA01 will respond by issuing the I/O Data Status Report to the host.
USAR - A Semtech Company Datasheet
DOC5-SPI-SA01-DS-103
16
VCC
Vin
TC54C4302ECB GND Vout
USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
Wake Up Signal
Power OK Signal
USAR - A Semtech Company Datasheet
45 41 VDD RES ET 30 MISO MOSI SCK SS 33 34 35
Alternatively an RC circuit or Master Reset Signal can be used
MISO
MOSI
ROW INPUTS
SCK
R7 R6 R5 R4 R3 R2 R1 R0
17 16 15 14 13 12 11 10
_SS
TO SWITCH MATRIX
Sample Configuration-UR5HCSPI-SA01
UR5HCSPI-SA01-FA
36 ATN PWR_ OK Vss VSS NC0 XSW SW0 GIO0 29 28 21 WKU OSC2 OSC1 37 42 18 38 IOTEST
_AT N
Attention Signal
COLUMN OUTPUT S
PWR_ OK
Power OK Signal
DOC5-SPI-SA01-DS-103
C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10/WUKO C11 C12 C13 39 40 20 46
_W KUP
6 5 4 3 2 1 48 47 27 26 25 24 23 22
15K
150K
DISCRETE SWITCH ES
Ceramic resonator circuit with built in capacitors
1MOhm 2MHz
WUKO 1.5M 15K 15K
Alternatively a 2MHz CMOS signal can be tied directly to OSC1
17
(c)1998-1999, USAR Systems Inc.
USAR -- A Semtech Company
USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
USAR -- A Semtech Company
Electrical Specifications
Absolute Maximum Ratings Ratings Supply Voltage Input Voltage Current Drain per Pin (not including Vss or Vdd) Operating Temperature UR5HCSPI-SA01 Storage Temperature Range Thermal Characteristics Characteristic Thermal Resistance Plastic PLCC Symbol Vdd Vin I Ta Tstg Value -0.3 to +7.0 Vss -0.3 to Vdd +0.3 25 T low to T high -40 to +85 65 to +150 Unit V V mA C C
Symbol Tja
Value 60 70
Unit C per W
DC Electrical Characteristics (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted) Characteristic Symbol Min Typ Max Unit Output Voltage (I load<10A) Vol 0.1 V Voh Vdd-0.1 Output High Voltage (I load=0.8mA) Voh Vdd-0.8 V Output Low Voltage (I load=1.6mA) Vol: 0.4 V Input High Voltage Vih 0.7xVdd Vdd V Input Low Voltage Vil Vss 0.2xVdd V User Mode Current Ipp 5 10 mA Data Retention Mode (0 to 70C) Vrm 2.0 V Supply Current (Run) Idd 1.53 3.0 mA (Wait) 0.711 1.0 mA (Stop) 2.0 20 A I/O Ports Hi-Z Leakage Current Iil +/-10 A Input Current Iin +/- 1 A I/O Port Capacitance Cio 8 12 pF Control Timing (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted) Characteristic Symbol Min Max Unit Frequency of Operation fosc MHz Crystal Option 2.0 External Clock Option dc 2.0 Cycle Time tcyc 1000 ns Crystal Oscillator Startup Time toxov 100 ms Stop Recovery Startup Time tilch 100 ms RESET Pulse Width trl 8 tcyc Interrupt Pulse Width Low tlih 250 ns Interrupt Pulse Period tilil * tcyc OSC1 Pulse Width toh, tol 200 ns *The minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine plus 21 tcyc.
USAR - A Semtech Company Datasheet
DOC5-SPI-SA01-DS-103
18
USAR SPICoderTM SA01 UR5HCSPI-SA01 USAR H/PC ICs family product specifications
USAR -- A Semtech Company
Bill of Materials for UR5HCSPI-SA01-FA
Quantity 3 1 1 2 1 Manufacture Generic Generic Generic Generic TELCOM Part# 15K 150K 11M 1.5K TC54VC4302ECB713 TC54VC4302ECB713 PBRC-2.00BR Description 15K Resistor 150K Resistor 1M Resistor 1.5 Resistors IC Volt Detector CMOS 4.3V SOT23, for 5V Operation IC Volt Detector CMOS 2.7V SOT23, for 3.3V Operation 2.00MHZ Ceramic Resonator with Built in Capacitors, SMT
1 AVX Revised 7/14/99
USAR - A Semtech Company Datasheet
DOC5-SPI-SA01-DS-103
19
A Semtech Company
Description For sales information and product literature, contact: USAR - A Semtech Company 568 Broadway New York, NY 10012 info@usar.com http://www.usar.com 212 226 2042 Telephone 212 226 3215 Telefax
In Japan: Semtech Japan Tel: 81-45-948-5925 Fax: 81-45-948-5930 In Taiwan: Semtech Asia/Pacific Sales Tel: 011-886-2-2748-3380 Fax: 011-886-2-2748-3390 Koryo Electronics Co., Ltd. Telephone +886-2-2698-1143 E-mail alex.chen@koryo.com.tw In Korea: Semtech Korea Tel: 011-82-2-527-4377 Fax: 011-82-2-527-4376 In Europe Semtech Limited Tel: +44-1592-630350 Fax: +44-1592-774781
Copyright 1999-2000 USAR - A Semtech Company. All rights reserved. SPICoder and Zero-Power are trademarks of USAR Systems, Inc. USAR and the USAR logo are registered trademarks of USAR - A Semtech Company. All other trademarks belong to their respective companies. INTELLECTUAL PROPERTY DISCLAIMER This specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. A license is hereby granted to reproduce and distribute this specification for internal use only. No other license, expressed or implied to any other intellectual property rights is granted or intended hereby. Authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. Authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights.


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