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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
D D D D D D D D
Output Current . . . 100 mA Low Loss . . . 1.1 V at 100 mA Operating Range . . . 3.5 V to 15 V Reference and Error Amplifier for Regulation External Shutdown External Oscillator Synchronization Devices Can Be Paralleled Pin-to-Pin Compatible With the LTC1044/7660
P PACKAGE (TOP VIEW)
FB/SD CAP+ GND CAP-
1 2 3 4
8 7 6 5
VCC OSC VREF VOUT
DW PACKAGE (TOP VIEW)
description
The LT1054 is a bipolar, switched-capacitor voltage converter with regulator. It provides higher output current and significantly lower voltage losses than previously available converters. An adaptive-switch drive scheme optimizes efficiency over a wide range of output currents. Total voltage drop at 100-mA output current is typically 1.1 V. This holds true over the full supply-voltage range of 3.5 V to 15 V. Quiescent current is typically 2.5 mA.
NC NC FB/SD CAP+ GND CAP- NC NC
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
NC NC VCC OSC VREF VOUT NC NC
NC - No internal connection
The LT1054 also provides regulation, a feature not previously available in switched-capacitor voltage converters. By adding an external resistive divider, a regulated output can be obtained. This output is regulated against changes in both input voltage and output current. The LT1054 also can be shut down by grounding the feedback terminal. Supply current in shutdown is typically 100 A. The internal oscillator of the LT1054 runs at a nominal frequency of 25 kHz. The oscillator terminal can be used to adjust the switching frequency or to externally synchronize the LT1054. The LT1054C is characterized for operation over a free-air temperature range of 0C to 70C. The LT1054I is characterized for operation over a free-air temperature range of -40C to 85C.
AVAILABLE OPTIONS PACKAGED DEVICES TA SMALL OUTLINE (DW) LT1054CDW LT1054IDW PLASTIC DIP (P) LT1054CP LT1054IP CHIP FORM (Y) LT1054Y --
0C to 70C -40C to 85C
The DW package is available taped and reeled. Add the suffix R to the device type (i.e., LT1054CDWR). Chip forms are tested at 25C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1999, Texas Instruments Incorporated
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
functional block diagram
VREF 6 2.5 V Ref R + FB/SD OSC 1 7 - OSC Q R Drive CAP - Q 4 Drive 3 GND Drive CAP + 2 CIN VCC 8
COUT 5 VOUT Drive External capacitors Pin numbers shown are for the P package.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Input voltage range, VI: FB/SD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VCC OSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to Vref Junction temperature, TJ (see Note 2): LT1054C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125C LT1054I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135C Package thermal impedance, JA (see Notes 3 and 4): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 57C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to 150C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The absolute maximum supply voltage rating of 16 V is for unregulated circuits. For regulation-mode circuits with VOUT 15 V, this rating may be increased to 20 V. 2. The devices are functional up to the absolute maximum junction temperature. 3. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/JA. Operating at the absolute maximum TJ of 150C can impact reliability. 4. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
MIN Supply voltage, VCC Operating free-air temperature range, TA free air range LT1054C LT1054I 3.5 0 -40 MAX 15 70 85 UNIT V C
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER VO Regulated output voltage Input regulation Output regulation Voltage loss, g , VCC - |VO (see Note 6) Output resistance Oscillator frequency Vref f Reference voltage Maximum switch current ICC Supply current IO = 0 VCC = 3.5 V VCC = 15 V TEST CONDITIONS VCC = 7 V, TJ = 25C, RL = 500 , See Note 5 VCC = 7 V to 12 V, RL = 500 , See Note 5 VCC = 7 V, RL = 100 to 500 , See Note 5 IO = 10 mA CI = CO = 100 F tantalum 100-F IO = 100 mA IO = 10 mA to 100 mA, VCC = 3.5 V to 15 V I(REF) = 60 A See Note 7 TA MIN 25C Full range Full range Full range Full range Full range 25C Full range 25C Full range 15 2.35 2.25 300 2.5 3 4 5 -4.7 LT1054C LT1054I TYP -5 5 10 0.35 1.1 10 25 2.5 MAX -5.2 25 50 0.55 1.6 15 35 2.65 2.75 V mV mV V kHz V mA mA UNIT
Supply current in shutdown V(FB/SD) = 0 V Full range 100 200 A Full range is 0C to 70C for the LT1054C and -40C to 85C for the LT1054I. All typical values are at TA = 25C. NOTES: 5. All regulation specifications are for a device connected as a positive-to-negative converter/regulator with R1 = 20 k, R2 = 102.5 k, external capacitor CIN = 10 F (tantalum), external capacitor COUT = 100 F (tantalum) and C1 = 0.002 F (see Figure 15). 6. For voltage-loss tests, the device is connected as a voltage inverter, with terminals 1, 6, and 7 unconnected. The voltage losses may be higher in other configurations. CIN and COUT are external capacitors. 7. Output resistance is defined as the slope of the curve (VO versus IO) for output currents of 10 mA to 100 mA. This represents the linear portion of the curve. The incremental slope of the curve is higher at currents less than 10 mA due to the characteristics of the switch transistors.
electrical characteristics over recommended operating conditions, TA = 25C (unless otherwise noted)
PARAMETER VO Regulated output voltage Input regulation Output regulation Voltage loss, g , VCC - VO (see Note 6) Output resistance Oscillator frequency Vref Reference voltage Maximum switch current ICC Supply current Supply current in shutdown IO = 0 VCC = 3.5 V VCC = 15 V TEST CONDITIONS VCC = 7 V, TJ = 25C, RL = 500 , See Note 5 VCC = 7 V to 12 V,RL = 500 , See Note 5 VCC = 7 V, RL = 100 to 500 , See Note 5 CI = CO = 100 F tantalum 100-F IO = 10 mA to 100 mA, See Note 7 VCC = 3.5 V to 15 V I(REF) = 60 A IO = 10 mA IO = 100 mA LT1054Y MIN TYP -5 5 10 0.35 1.1 10 25 2.5 300 2.5 3 MAX UNIT V mV mV V kHz V mA mA
V(FB/SD) = 0 V 100 A NOTES: 5. All regulation specifications are for a device connected as a positive-to-negative converter/regulator with R1 = 20 k, R2 = 102.5 k, external capacitor CIN = 10 F (tantalum), external capacitor COUT = 100 F (tantalum) and C1 = 0.002 F (see Figure 15). 6. For voltage-loss tests, the device is connected as a voltage inverter, with terminals 1, 6, and 7 unconnected. The voltage losses may be higher in other configurations. CIN and COUT are external capacitors. 7. Output resistance is defined as the slope of the curve (VO versus IO) for output currents of 10 mA to 100 mA. This represents the linear portion of the curve. The incremental slope of the curve is higher at currents less than 10 mA due to the characteristics of the switch transistors.
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE Shutdown threshold voltage vs Free-air temperature Supply current vs Input voltage Oscillator frequency vs Free-air temperature Supply current in shutdown vs Input voltage Average supply current vs Output current Output voltage loss vs Input capacitance Output voltage loss vs Oscillator frequency (10 F) Output voltage loss vs Oscillator frequency (100 F) Regulated output voltage vs Free-air temperature Reference voltage change vs Free-air temperature Voltage loss vs Output current 1 2 3 4 5 6 7 8 9 10 11
Table of Figures
FIGURE Switched-Capacitor Building Block Switched-Capacitor Equivalent Circuit Circuit With Load Connected From VCC to VOUT External-Clock System Basic Regulation Configuration Power-Dissipation-Limiting Resistor in Series With CIN Motor-Speed Servo Basic Voltage Inverter Basic Voltage Inverter/Regulator Negative-Voltage Doubler Positive-Voltage Doubler 100-mA Regulating Negative Doubler Dual-Output Voltage Doubler 5-V to 12-V Converter Strain-Gage Bridge Signal Conditioner 3.5-V to 5-V Regulator Regulating 200-mA +12-V to -5-V Converter Digitally Programmable Negative Supply Positive Doubler With Regulation (5-V to 8-V Converter) Negative Doubler With Regulator 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
SHUTDOWN THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE
0.6 5 IO = 0 Shutdown Threshold Voltage - V 0.5 I CC - Supply Current - mA 4
SUPPLY CURRENT vs INPUT VOLTAGE
0.4
V(FB/SD)
3
0.3
2
0.2
0.1
1
0 -50
0 -25 0 25 50 75 100 0 TA - Free-Air Temperature - C 5 10 VCC - Input Voltage - V 15
Figure 1
Figure 2
OSCILLATOR FREQUENCY vs FREE-AIR TEMPERATURE
35 33 Oscillator Frequency - kHz 31 29 VCC = 15 V 27 25 VCC = 3.5 V 23 21 19 17 15 -50 0 -25 0 25 50 75 100 0 TA - Free-Air Temperature - C Supply Current in Shutdown - A 100 120
SUPPLY CURRENT IN SHUTDOWN vs INPUT VOLTAGE
V(FB/SD) = 0 80
60
40
20
10 5 VCC - Input Voltage - V
15
Figure 3
Figure 4
Data at high and low temperatures are applicable only within the recommended operating free-air temperature range.
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
AVERAGE SUPPLY CURRENT vs OUTPUT CURRENT
140 120 Average Supply Current - mA 100 1.4 1.2 IO = 100 mA Output Voltage Loss - V 1.0
OUTPUT VOLTAGE LOSS vs INPUT CAPACITANCE
80 60 40
0.8 0.6 0.4 Inverter Configuration COUT = 100-F Tantalum fOSC = 25 kHz 0 10 20 30 40 50
IO = 50 mA
IO = 10 mA
20 0 0 20 40 60 80 100 IO - Output Current - mA
0.2 0
60
70
80
90 100
Input Capacitance - F
Figure 5
Figure 6
OUTPUT VOLTAGE LOSS vs OSCILLATOR FREQUENCY
2.5 2.25 2 Output Voltage Loss - V 1.75 1.5 1.25 1 0.75 0.5 0.25 0 1 10 Oscillator Frequency - kHz 100 IO = 10 mA IO = 50 mA IO = 100 mA Output Voltage Loss - V Inverter Configuration CIN = 10-F Tantalum COUT = 100-F Tantalum 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 1
OUTPUT VOLTAGE LOSS vs OSCILLATOR FREQUENCY
Inverter Configuration CIN = 100-F Tantalum COUT = 100-F Tantalum
IO = 100 mA
IO = 50 mA
IO = 10 mA
10 Oscillator Frequency - kHz
100
Figure 7
Figure 8
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
REGULATED OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE
-4.7 V ref - Reference Voltage Change - mV VO - Regulated Output Voltage - V -4.8 -4.9 -5 -5.1 -11.6 -11.8 -12 -12.2 -12.4 -12.6 -50 -25 0 25 50 75 100 100 80 60 40 20 0 -20 -40 -60 -80 -100 -50 -25 0 25 50 75 100 125 VREF at 0 = 2.500 V
REFERENCE VOLTAGE CHANGE vs FREE-AIR TEMPERATURE
TA - Free-Air Temperature - C
TA - Free-Air Temperature - C
Figure 9
Figure 10
VOLTAGE LOSS vs OUTPUT CURRENT
2 1.8 1.6 Voltage Loss - V 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 10 20 30 40 50 TJ = -55C TJ = 25C TJ = 125C 3.5 V VCC 15 V Ci = Co = 100 F
60
70
80
90 100
Output Current - mA
Figure 11
Data at high and low temperatures are applicable only within the recommended operating free-air temperature range.
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
PRINCIPLES OF OPERATION
A review of a basic switched-capacitor building block is helpful in understanding the operation of the LT1054. When the switch shown in Figure 12 is in the left position, capacitor C1 charges to the voltage at V1. The total charge on C1 is q1 = C1V1. When the switch is moved to the right, C1 is discharged to the voltage at V2. After this discharge time, the charge on C1 is q2 = C1V2. The charge has been transferred from the source V1 to the output V2. The amount of charge transferred is shown in equation 1.
Dq + q1 * q2 + C1(V1 * V2)
I
(1)
If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is as shown in equation 2.
+f
Dq + f
C1(1
* V2)
(2)
To obtain an equivalent resistance for a switched-capacitor network, this equation can be rewritten in terms of voltage and impedance equivalence as shown in equation 3. I
+ V1 * V2 + V1 * V2 R 1 fC1
EQUIV
(3)
V1 f RL C1 C2 V2
Figure 12. Switched-Capacitor Building Block A new variable, REQUIV, is defined as REQUIV = 1 / fC1. The equivalent circuit for the switched-capacitor network is shown in Figure 13. The LT1054 has the same switching action as the basic switched-capacitor building block. Even though this simplification does not include finite switch-on resistance and output-voltage ripple, it provides an insight into how the device operates.
REQUIV V1 R EQUIV 1 + fC1 C2 RL V2
Figure 13. Switched-Capacitor Equivalent Circuit These simplified circuits explain voltage loss as a function of oscillator frequency (see Figure 7). As oscillator frequency is decreased, the output impedance is eventually dominated by the 1/fC1 term and voltage losses rise. Voltage losses also rise as oscillator frequency increases. This is caused by internal switching losses that occur due to some finite charge being lost on each switching cycle. This charge loss per-unit-cycle, when multiplied by the switching frequency, becomes a current loss. At high frequency, this loss becomes significant and voltage losses again rise. The oscillator of the LT1054 is designed to operate in the frequency band where voltage losses are at a minimum.
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
PRINCIPLES OF OPERATION
Supply voltage VCC alternately charges CIN to the input voltage when CIN is switched in parallel with the input supply and then transfers charge to COUT when CIN is switched in parallel with COUT. Switching occurs at the oscillator frequency. During the time that CIN is charging, the peak supply current is approximately 2.2 times the output current. During the time that CIN is delivering a charge to COUT, the supply current drops to approximately 0.2 times the output current. An input supply bypass capacitor supplies part of the peak input current drawn by the LT1054, and averages the current drawn from the supply. A minimum input supply bypass capacitor of 2 F, preferably tantalum or some other low equivalent-series-resistance (ESR) type, is recommended. A larger capacitor is desirable in some cases. An example of this would be when the actual input supply is connected to the LT1054 through long leads or when the pulse currents drawn by the LT1054 might affect other circuits through supply coupling. In addition to being the output terminal, VOUT is tied to the substrate of the device. Special care must be taken in LT1054 circuits to avoid making VOUT positive with respect to any of the other terminals. For circuits with the output load connected from VCC to VOUT or from some external positive supply voltage to VOUT, an external transistor must be added (see Figure 14). This transistor prevents VOUT from being pulled above GND during start up. Any small general-purpose transistor such as a 2N2222 or a 2N2219 device can be used. Resistor R1 should be chosen to provide enough base drive to the external transistor so that it is saturated under nominal output voltage and maximum output current conditions. R1
v
V OUT b I OUT
VIN 1 FB/SD VCC OSC LT1054 GND VREF VOUT 8 Load VOUT R1 6
(4)
2
CAP+
7
CIN
+
3
4
CAP-
5 COUT
+ Pin numbers shown are for the P package.
Figure 14. Circuit With Load Connected from VCC to VOUT
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
PRINCIPLES OF OPERATION
The voltage reference (Vref) output provides a 2.5-V reference point for use in LT1054-based regulator circuits. The temperature coefficient (TC) of the reference voltage has been adjusted so that the TC of the regulated output voltage is near zero. As seen in the typical performance curves, this requires the reference output to have a positive TC. This nonzero drift is necessary to offset a drift term inherent in the internal reference divider and comparator network tied to the feedback terminal. The overall result of these drift terms is a regulated output that has a slight positive TC at output voltages below 5 V and a slight negative TC at output voltages above 5 V. For regulator feedback networks, reference output current should be limited to approximately 60 A. Vref draws approximately 100 A when shorted to ground and does not affect the internal reference/regulator. This terminal also can be used as a pullup for LT1054 circuits that require synchronization. CAP+ is the positive side of input capacitor CIN and is driven alternately between VCC and ground. When driven to VCC, CAP+ sources current from VCC. When driven to ground, CAP+ sinks current to ground. CAP- is the negative side of the input capacitor and is driven alternately between ground and VOUT. When driven to ground, CAP- sinks current to ground. When driven to VOUT, CAP- sources current from COUT. In all cases, current flow in the switches is unidirectional, as should be expected when using bipolar switches. OSC can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock. Internally, OSC is connected to the oscillator timing capacitor (Ct 150 pF), which is charged and discharged alternately by current sources of 7 A, so that the duty cycle is approximately 50%. The LT1054 oscillator is designed to run in the frequency band where switching losses are minimized. However, the frequency can be raised, lowered, or synchronized to an external system clock if necessary. The frequency can be increased by adding an external capacitor (C2 in Figure 15) in the range of 5-20 pF from CAP+ to OSC. This capacitor couples a charge into Ct at the switch transitions. This shortens the charge and discharge times and raises the oscillator frequency. Synchronization can be accomplished by adding an external pullup resistor from OSC to Vref. A 20-k pullup resistor is recommended. An open-collector gate or an npn transistor then can be used to drive OSC at the external clock frequency as shown in Figure 15. The frequency can be lowered by adding an external capacitor (C1 in Figure 15) from OSC to ground. This increases the charge and discharge times, which lowers the oscillator frequency.
1
FB/SD
VCC OSC LT1054
8
C2 VIN
2
CAP+
7
+
3
GND
VREF VOUT
6 C1
4
CAP-
5
Pin numbers shown are for the P package.
Figure 15. External-Clock System
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
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APPLICATION INFORMATION regulation
The feedback/shutdown (FB/SD) terminal has two functions. Pulling FB/SD below the shutdown threshold ( 0.45 V) puts the device into shutdown. In shutdown, the reference/regulator is turned off and switching stops. The switches are set such that both CIN and COUT are discharged through the output load. Quiescent current in shutdown drops to approximately 100 A. Any open-collector gate can be used to put the LT1054 into shutdown. For normal (unregulated) operation, the device will restart when the external gate is shut off. In LT1054 circuits that use the regulation feature, the external resistor divider can provide enough pulldown to keep the device in shutdown until the output capacitor (COUT) has fully discharged. For most applications, where the LT1054 is run intermittently, this does not present a problem because the discharge time of the output capacitor is short compared to the off time of the device. In applications where the device has to start up before the output capacitor (COUT) has fully discharged, a restart pulse must be applied to FB/SD of the LT1054. Using the circuit shown in Figure 16, the restart signal can be either a pulse (tp > 100 s) or a logic high. Diode coupling the restart signal into FB/SD allows the output voltage to rise and regulate without overshoot. The resistor divider R3/R4 shown in Figure 16 should be chosen to provide a signal level at FB/SD of 0.7-1.1 V. FB/SD is also the inverting input of the LT1054 error amplifier and, as such, can be used to obtain a regulated output voltage.
R3 1 FB/SD VCC OSC LT1054 GND VREF VOUT 8
VIN 2.2 F +
2 R4 CIN 10-F Tantalum
CAP+
7 R1
+
3
6
4
CAP-
5
R2
Restart
Shutdown VOUT C1 COUT 100-F Tantalum
For example: To get VO = -5 V, referenced to the ground terminal of the LT1054 R2
+ R1
V REF 2
* 40 mV
V OUT
) 1 + 20 kW
|-5 V| 2.5 V 40 mV 2
*
) 1 + 102.6 kW
+
Where: R1 = 20 k VREF = 2.5 V Nominal Choose the closest 1% value. Pin numbers shown are for the P package.
Figure 16. Basic Regulation Configuration
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION regulation (continued)
The error amplifier of the LT1054 drives the pnp switch to control the voltage across the input capacitor (CIN), which determines the output voltage. When the reference and error amplifier of the LT1054 are used, an external resistive divider is all that is needed to set the regulated output voltage. Figure 16 shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R1 should be 20 k or greater because the reference current is limited to 100 A. R2 should be in the range of 100 k to 300 k. Frequency compensation is accomplished by adjusting the ratio of CIN to COUT. For best results, this ratio should be approximately 1:10. Capacitor C1, required for good load regulation, should be 0.002 F for all output voltages. The functional block diagram shows that the maximum regulated output voltage is limited by the supply voltage. For the basic configuration, VOUT referenced to the ground terminal of the LT1054 must be less than the total of the supply voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the switches can be found in the typical performance curves. Other configurations, such as the negative doubler, can provide higher voltages at reduced output currents.
capacitor selection
While the exact values of CIN and COUT are noncritical, good-quality low-ESR capacitors, such as solid tantalum, are necessary to minimize voltage losses at high currents. For CIN, the effect of the ESR of the capacitor is multiplied by four, because switch currents are approximately two times higher than output current. Losses occur on both the charge and discharge cycle, which means that a capacitor with 1 of ESR for CIN has the same effect as increasing the output impedance of the LT1054 by 4 . This represents a significant increase in the voltage losses. COUT is alternately charged and discharged at a current approximately equal to the output current. The ESR of the capacitor causes a step function to occur in the output ripple at the switch transitions. This step function degrades the output regulation for changes in output load current and should be avoided. A technique used to gain both low ESR and reasonable cost is to parallel a smaller tantalum capacitor with a large aluminum electrolytic capacitor.
output ripple
The peak-to-peak output ripple is determined by the output capacitor and the output current values. Peak-to-peak output ripple is approximated as: I OUT DV + 2fC
OUT
(5)
Where: V = peak-to-peak ripple fOSC = oscillator frequency For output capacitors with significant ESR, a second term must be added to account for the voltage step at the switch transitions. This step is approximately equal to: 2I OUT ESR of C OUT (6)
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION power dissipation
The power dissipation of any LT1054 circuit must be limited so that the junction temperature of the device does not exceed the maximum junction-temperature ratings. The total power dissipation is calculated from two components, the power loss due to voltage drops in the switches, and the power loss due to drive-current losses. The total power dissipated by the LT1054 is calculated as: P
[ V *V
CC
OUT
I OUT
)V
CC
I OUT (0.2)
(7)
where both VCC and VOUT are referenced to ground. The power dissipation is equivalent to that of a linear regulator. Limited power-handling capability of the LT1054 packages causes limited output-current requirements, or steps can be taken to dissipate power external to the LT1054 for large input or output differentials. This is accomplished by placing a resistor in series with CIN as shown in Figure 17. A portion of the input voltage is dropped across this resistor without affecting the output regulation. Since switch current is approximately 2.2 times the output current and the resistor causes a voltage drop when CIN is both charging and discharging, the resistor chosen is as shown: RX
+ 4.4VI
X OUT
(8)
Where: VX VCC - [(LT1054 voltage loss)(1.3) + |VOUT|] and IOUT = maximum required output current The factor of 1.3 allows some operating margin for the LT1054. When using a 12-V to -5-V converter at 100-mA output current, calculate the power dissipation without an external resistor. P P
+ (12 V * |*5 V|)(100 mA) ) (12 V)(100 mA)(0.2) + 700 mW ) 240 mW + 940 mW
1 Rx FB/SD VCC OSC LT1054 CIN + 3 GND VREF VOUT
(9)
VIN 8
2
CAP+
7 R1
6
4
CAP-
5
R2
VOUT
C1
+ Pin numbers shown are for the P package.
COUT
Figure 17. Power-Dissipation-Limiting Resistor in Series With CIN
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13
LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION power dissipation (continued)
At RJA of 130C/W for a commercial plastic device, a junction temperature rise of 122C occurs. The device exceeds the maximum junction temperature at an ambient temperature of 25C. To calculate the power dissipation with an external resistor (RX), determine how much voltage can be dropped across RX. The maximum voltage loss of the LT1054 in the standard regulator configuration at 100 mA output current is 1.6 V. VX
+ 12 V * [(1.6 V)(1.3) ) |*5 V|] + 4.9 V
4.9 + (4.4)(100V mA) + 11 W
(10)
and RX (11)
The resistor reduces the power dissipated by the LT1054 by (4.9 V)(100 mA) = 490 mW. The total power dissipated by the LT1054 is equal to (940 mW - 490 mW) = 450 mW. The junction-temperature rise is 58C. Although commercial devices are functional up to a junction temperature of 125C, the specifications are tested to a junction temperature of 100C. In this example, this means limiting the ambient temperature to 42C. To allow higher ambient temperatures, the thermal resistance numbers for the LT1054 packages represent worst-case numbers with no heat sinking and still air. Small clip-on heat sinks can be used to lower the thermal resistance of the LT1054 package. Airflow in some systems helps to lower the thermal resistance. Wide printed circuit board traces from the LT1054 leads help to remove heat from the device. This is especially true for plastic packages.
10 V 1N4002 100 k 1 FB/SD VCC OSC LT1054 3 1N5817 4 Tach Motor GND VREF VOUT 6 8 7 5 F + 100-k Speed Control
2 10 F - + + + -
CAP+
CAP-
5
NOTE: Motor-Tach is Canon CKT26-T5-3SAE. Pin numbers shown are for the P package.
Figure 18. Motor-Speed Servo
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
1 8 + 7
FB/SD
VCC OSC LT1054
VIN 2 F
2
CAP+
10 F
+
3
GND
VREF VOUT
6
4
CAP-
5 +
-VOUT 100 F
Pin numbers shown are for the P package.
Figure 19. Basic Voltage Inverter
1
FB/SD
VCC OSC LT1054
8 + 7 R1 20 k
VIN 2 F
2 CAP+ + 3
10 F
GND
VREF VOUT
6
4
CAP-
5
R2
VOUT + 100 F
0.002 F +
R2 Pin numbers shown are for the P package.
+ R1
V OUT
V REF 2
* 40 mV
) 1 + 20 kW
V OUT 1.21 V
)1
Figure 20. Basic Voltage Inverter/Regulator
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15
LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
1 8
FB/SD
VCC
+ VOUT -
2 10 F + VIN 2 F + 3
CAP+ LT1054 GND
OSC
7
VREF VOUT
6 QX 5 100 F + RX
4
CAP-
VIN = -3.5 V to -15 V VOUT = 2 VIN + (LT1054 Voltage Loss) + (QX Saturation Voltage) Pin numbers shown are for the P package.
VIN
Figure 21. Negative-Voltage Doubler
VIN 3.5 V to 15 V 1N4001 + + VOUT 1 FB/SD VCC OSC LT1054 3 GND VREF VOUT 6 8 + 100 F + 10 F 1N4001
-
2
CAP+
7
2 F
VIN = 3.5 V to 15 V VOUT 2 VIN - (VL + 2 V Diode) VL = LT1054 Voltage Loss Pin numbers shown are for the P package.
4
CAP-
5
Figure 22. Positive-Voltage Doubler
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
VIN 3.5 V to 15 V
2.2 F
+
1 2 + 10 F 10 F + 4 3
FB/SD CAP+
VCC OSC
8 7 VOUT SET
1 2 + 10 F 3 4 10 F 1N4002
FB/SD
VCC
8 HP5082-2810 CAP+ of LT1054 #1 20 k
LT1054 #1 6 GND VREF CAP- VOUT 10 F R2 500 k 100 F 5
7 CAP+ OSC LT1054 #2 6 GND VREF CAP- VOUT 5
R1 40 k +
+
1N4002 1N4002
+
0.002 F
+ 1N4002 VOUT IOUT 100 mA MAX
10 F
1N4002
+
VIN = 3.5 V to 15 V VOUT MAX -2 VIN + [LT1054 Voltage Loss +2 (VDiode)] R2
+ R1
V OUT
V REF 2
* 40 mV
) 1 + R1
V
OUT
1.21 V
)1
Pin numbers shown are for the P package.
Figure 23. 100-mA Regulating Negative Doubler
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17
LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
VI 3.5 V to 15 V 1N4001 + +VO - + 100 F 10 F + 1N4001
1 2 3
FB/SD CAP+ LT1054 GND
VCC OSC VREF VOUT
8 7 6 5 100 F + 1N4001 1N4001 -
10 F
+
4 10 F +
CAP-
VI = 3.5 V to 15 V +VO 2 VIN - (VL + 2 VDiode) -VO -2 VI + (VL + 2 VDiode) VL = LT1054 Voltage Loss Pin numbers shown are for the P package.
1N4001 +
100 F +
-VO
Figure 24. Dual-Output Voltage Doubler
VI = 5 V + 1 2 FB/SD CAP+ GND CAP- VCC OSC VREF VOUT 5 100 F 2N2219 10 F + 3 4 CAP- VOUT 10 F + 3 4 LT1054 #1
5 F VO +12 V IO = 25 mA 100 F 7 6 + 1N914 1N914
8
10 F
+ 1 2 CAP+ GND OSC VREF LT1054 #2 FB/SD VCC 8 CAP- of LT1054 #1
7 6 20 k 5
1 k
+
5 F
+ Pin numbers shown are for the P package.
VO -12 V IO = 25 mA 100 F
Figure 25. 5-V to 12-V Converter
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
5V 10 k + 10 k 2N2907 40 Zero Trim 10 k
Input TTL or CMOS Low for On
10 F
0.022 F 1
8 -
2
100 k
301 k
5 k
Gain Trim 5 k 6 - A2 7 1/2 LT1013 5 + 4
1 M VOUT
1/2 LT1013 3 + A1
100 k
350
10 k 1 F
200 k 1 FB/SD VCC OSC LT1054 #1 3 GND VREF VOUT 6 + 100-F Tantalum 8 5V
2 10 F +
CAP+
7 3 k 2N2222 Adjust Gain Trim For 3 V Out From Full-Scale Bridge Output of 24 mV
4
CAP-
5
Pin numbers shown are for the P package.
Figure 26. Strain-Gage Bridge Signal Conditioner
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19
LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
VI 3.5 V to 5.5 V
20 k
1
FB/SD
VCC OSC
8
2 1 F 1 8 5 F R1 20 k + R2 125 k + 3
CAP+ LTC1044 GND
7
1N914 (All) FB/SD VCC OSC
VREF VOUT
6
4
CAP-
5
2 +
CAP+ LT1054
7
10 F
3
GND
VREF VOUT
6
+ 0.002 F R2 125 k + 100 F 3 k - VO
1 F
+
4
CAP-
5
VI = 3.5 V to 5.5 V VO = 5 V IO MAX = 50 mA R2
2N2219
+ R1
V OUT
V REF 2
* 40 mV
) 1 + R1
)1 1.21 V
V
OUT
1N5817
1N914
Pin numbers shown are for the P package.
Figure 27. 3.5-V to 5-V Regulator
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LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
5 F + 12 V
1
FB/SD
VCC OSC
8 10 1/2 W + 0.002 F 5 R2 200 k + 10 F
1
FB/SD
VCC OSC
8 HP5082-2810 7
2 10 1/2 W
CAP+
7 R1 39.2 k 6
2
CAP+
3
LT1054 #1 GND VREF VOUT
3
LT1054 #2 GND VREF VOUT 6 20 k
4 + 10 F
CAP-
4
CAP-
5 VO = -5 V IO = 0-200 mA
+
200 F R2
+ R1
V
V REF 2
* 40 mV
OUT
) 1 + R1
V
OUT
1.21 V
)1
Pin numbers shown are for the P package.
Figure 28. Regulating 200-mA +12-V to -5-V Converter
5 F +
15 V
11
20 k
16
AD558
Digital Input
2.5 V 1 FB/SD VCC OSC LT1054 GND VREF VOUT 6 8
LT1004-2.5
15 14 13 12
2
CAP+
7
20 k
10 F
+
3
4
CAP-
5 100 F
VO = -VI (Programmed) +
Pin numbers shown are for the P package.
Figure 29. Digitally Programmable Negative Supply
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21
LT1054 SWITCHED-CAPACITOR VOLTAGE CONVERTERS WITH REGULATORS
SLVS033E - FEBRUARY 1990 - REVISED NOVEMBER 1999
APPLICATION INFORMATION
VI = 5 V 2 F +
50 k 1N5817 1N5817 + 5.5 k 5V 10 k - 1/2 LT1013 + 4 CAP- VOUT 10 F + 0.03 F 10 k 1 FB/SD 2 CAP+ 3 GND LT1054 6 VREF 5 OSC VCC 7 8
VO 8V 100 F
10 k
2.5 k
0.1 F
Pin numbers shown are for the P package.
Figure 30. Positive Doubler With Regulation (5-V to 8-V Converter)
VI 3.5 V to 15 V 1 FB/SD VCC OSC LT1054 10 F + 3 GND VREF VOUT 6 8
2 F +
2
CAP+
7 R1 60 k 100 F + R2 1 M 1N4001 1N4001 -VO + 0.002 F
4 +
CAP-
5
10 F
VI = 3.5 V to 15 V VO MAX 2 VIN + (VL + 2 VDiode) VL = LT1054 Voltage Loss R2
+ V
100 F
+ R1
V
V REF 2
* 40 mV
OUT
) 1 + R1
OUT
1.21 V
)1
Pin numbers shown are for the P package.
Figure 31. Negative Doubler With Regulator
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated
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