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Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
CY74FCT16373T CY74FCT162373T
SCCS054B - August 1994 - Revised September 2001
16-Bit Latches
Functional Description
CY74FCT16373T and CY74FCT162373T are 16-bit D-type latches designed for use in bus applications requiring high speed and low power. These devices can be used as two independent 8-bit latches or as a single 16-bit latch by connecting the Output Enable (OE) and Latch (LE) inputs. Flow-through pinout and small shrink packaging aid in simplifying board layout. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The CY74FCT16373T is ideally suited for driving high-capacitance loads and low-impedance backplanes. The CY74FCT162373T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162373T is ideal for driving transmission lines.
Features
* Ioff supports partial-power-down mode operation * Edge-rate control circuitry for significantly improved noise characteristics * Typical output skew < 250 ps * ESD > 2000V * TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages * Industrial temperature range of -40C to +85C * VCC = 5V 10% CY74FCT16373T Features: * 64 mA sink current, 32 mA source current * Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25C CY74FCT162373T Features: * Balanced 24 mA output drivers * Reduced system switching noise * Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA= 25C
Logic Block Diagrams
1OE
Pin Configuration
SSOP/TSSOP Top View
1OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
1LE 1D1 1D2
1LE 1D1
1O1
D
1O1
1O2
GND
1O3 1O4
GND
1D3 1D4
C
VCC 1O5
1O6
VCC 1D5
1D6
TO 7 OTHER CHANNELS
FCT162373-1
2OE
GND
1O7 1O8 2O1 2O2
GND
1D7 1D8 2D1 2D2
2LE 2D1
GND D
2O1 2O3 2O4
GND
2D3 2D4
C
VCC 2O5
2O6
VCC 2D5
2D6
GND
GND
2D7 2D8 2LE
TO 7 OTHER CHANNELS
FCT162373-2
2O7 2O8 2OE
FCT162373-3
Copyright
(c) 2001, Texas Instruments Incorporated
CY74FCT16373T CY74FCT162373T
Pin Description
Name D LE OE O Data Inputs Latch Enable Inputs (Active HIGH) Output Enable Inputs (Active LOW) Three-State Outputs Description
Maximum Ratings[2, 3]
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ...................... Com'l -55C to +125C Ambient Temperature with Power Applied................................. Com'l -55C to +125C DC Input Voltage .................................................-0.5V to +7.0V DC Output Voltage ..............................................-0.5V to +7.0V Outputs OE L L L H O H L Q0 Z Range Industrial DC Output Current (Maximum Sink Current/Pin) ...........................-60 to +120 mA Power Dissipation .......................................................... 1.0W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015)
Function Table[1]
Inputs D H L X X LE H H L X
Operating Range
Ambient Temperature -40C to +85C VCC 5V 10%
Electrical Characteristics Over the Operating Range
Parameter VIH VIL VH VIK IIH IIL IOZH IOZL IOS IO IOFF Description Input HIGH Voltage Input LOW Voltage Input Hysteresis[5] Input Clamp Diode Voltage Input HIGH Current Input LOW Current High Impedance Output Current (Three-State Output pins) High Impedance Output Current (Three-State Output pins) Short Circuit Current[6] Output Drive Current[6] Power-Off Disable VCC=Min., IIN=-18 mA VCC=Max., VI=VCC VCC=Max., VI=GND VCC=Max., VOUT=2.7V VCC=Max., VOUT=0.5V VCC=Max., VOUT=GND VCC=Max., VOUT=2.5V VCC=0V, VOUT4.5V[7] -80 -50 -140 100 -0.7 -1.2 1 1 1 1 -200 -180 1 Test Conditions Min. 2.0 0.8 Typ.[4] Max. Unit V V mV V A A A A mA mA A
Output Drive Characteristics for CY74FCT16373T
Parameter VOH Description Output HIGH Voltage Test Conditions VCC=Min., IOH=-3 mA VCC=Min., IOH=-15 mA VCC=Min., IOH=-32 mA VOL Output LOW Voltage VCC=Min., IOL=64 mA Min. 2.5 2.4 2.0 Typ.[4] 3.5 3.5 3.0 0.2 0.55 Max. Unit V V V V
Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don't Care. Z = High Impedance. Q0=Previous state of flip-flop. 2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. Typical values are at VCC=5.0V, TA= +25C ambient. 5. This parameter is specified but not tested. 6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 7. Tested at +25C.
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CY74FCT16373T CY74FCT162373T
Output Drive Characteristics for CY74FCT162373T
Parameter IODL IODH VOH VOL Description Output LOW Current
[6]
Test Conditions VCC=5V, VIN=VIH or VIL, VOUT=1.5V VCC=5V, VIN=VIH or VIL, VOUT=1.5V VCC=Min., IOH=-24 mA VCC=Min., IOL=24 mA
Min. 60 -60 2.4
Typ.[4] 115 -115 3.3 0.3
Max. 150 -150 0.55
Unit mA mA V V
Output HIGH Current[6] Output HIGH Voltage Output LOW Voltage
Capacitance[5] (TA = +25C, f = 1.0 MHz)
Parameter CIN COUT Description Input Capacitance Output Capacitance VIN = 0V VOUT = 0V Test Conditions Typ.[4] 4.5 5.5 Max. 6.0 8.0 Unit pF pF
Power Supply Characteristics
Parameter ICC ICC ICCD Description Quiescent Power Supply Current VCC=Max. Quiescent Power Supply Current (TTL inputs HIGH) Dynamic Power Supply Current[9] Total Power Supply Current[10] VCC=Max. VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, OE=GND VCC=Max., f1=10 MHz, 50% Duty Cycle, Outputs Open, One Bit Toggling, OE=GND, LE=VCC Test Conditions VIN0.2V, VINVCC-0.2V VIN=3.4V[8] VIN=VCC or VIN=GND VIN=VCC or VIN=GND VIN=3.4V or VIN=GND Typ.[4] 5 0.5 60 Max. 500 1.5 100 Unit A mA A/MHz
IC
0.6 0.9 2.4 6.4
1.5 2.3 4.5[11] 16.5[11]
mA mA mA mA
VCC=Max., f1=2.5 MHz, VIN=VCC or 50% Duty Cycle, Outputs VIN=GND Open, Sixteen Bits Toggling, VIN=3.4V or OE=GND, LE=VCC VIN=GND
Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 10. IC= IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC+ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ICC = Power Supply Current for a TTL HIGH input(VIN=3.4V) = Duty Cycle for TTL inputs HIGH DH = Number of TTL inputs at DH NT ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT16373T CY74FCT162373T
Switching Characteristics Over the Operating Range[12]
CY74FCT16373AT CY74FCT162373AT Parameter tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(O) Description Propagation Delay D to O Propagation Delay LE to O Output Enable Time Output Disable Time Set-Up Time HIGH or LOW, D to LE Hold Time HIGH or LOW, D to LE LE Pulse Width HIGH Output Skew[14] Min. 1.5 2.0 1.5 1.5 2.0 1.5 3.3 0.5 CY74FCT16373CT CY74FCT162373CT Parameter tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW tSK(O) Propagation Delay D to O Propagation Delay LE to O Output Enable Time Output Disable Time Set-Up Time HIGH or LOW, D to LE Hold Time HIGH or LOW, D to LE LE Pulse Width HIGH Output Skew[14] Description Min. 1.5 2.0 1.5 1.5 2.0 1.5 3.3 0.5 Max. 4.2 5.5 5.5 5.0 Unit ns ns ns ns ns ns ns ns Fig. No.[13] 1, 3 1, 5 1, 7, 8 1, 7, 8 9 9 5 -- Max. 5.2 6.7 6.1 5.5 Unit ns ns ns ns ns ns ns ns Fig. No.[13] 1, 3 1, 5 1, 7, 8 1, 7, 8 9 9 5 --
Notes: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See "Parameter Measurement Information" in the General Information section. 14. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
4
CY74FCT16373T CY74FCT162373T
Ordering Information CY74FCT16373
Speed (ns) 4.2 5.2 Ordering Code CY74FCT16373CTPACT CY74FCT16373CTPVC/PVCT CY74FCT16373ATPACT CY74FCT16373ATPVC/PVCT Package Name Z48 O48 Z48 O48 Package Type 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP Industrial Operating Range Industrial
Ordering Information CY74FCT162373
Speed (ns) 4.2 Ordering Code 74FCT162373CTPACT CY74FCT162373CTPVC 74FCT162373CTPVCT 5.2 74FCT162373ATPACT CY74FCT162373ATPVC 74FCT162373ATPVCT Package Name Z48 O48 O48 Z48 O48 O48 Package Type 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP 48-Lead (300-Mil) SSOP 48-Lead (240-Mil) TSSOP 48-Lead (300-Mil) SSOP 48-Lead (300-Mil) SSOP Industrial Operating Range Industrial
5
CY74FCT16373T CY74FCT162373T
Package Diagrams
48-Lead Shrunk Small Outline Package O48
48-Lead Thin Shrunk Small Outline Package Z48
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Copyright 2001, Texas Instruments Incorporated

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