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 FDC645N
July 2000 PRELIMINARY
FDC645N
N-Channel PowerTrench MOSFET
General Description
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.
Features
* 5.5 A, 30 V. RDS(ON) = 30 m @ VGS = 4.5 V RDS(ON) = 26 m @ VGS = 10 V
Applications
* DC/DC converter
* High performance trench technology for extremely low RDS(ON) * Low gate charge (13 nC typical) * High power and current handling capability
D
D
S
1 2
G
6 5 4
SuperSOT TM -6
D
D
3
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Maximum Power Dissipation
TA=25oC unless otherwise noted
Parameter
Ratings
30 12
(Note 1a)
Units
V V A W C
5.5 20 1.6 0.8 -55 to +150
(Note 1a) (Note 1b)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 30
C/W C/W
Package Marking and Ordering Information
Device Marking .645 Device FDC645N Reel Size 7'' Tape width 8mm Quantity 3000 units
2000 Fairchild Semiconductor Corporation
FDC645N Rev B(W)
FDC645N
Electrical Characteristics
Symbol
BVDSS BVDSS ===TJ IDSS IGSSF IGSSR VGS(th) VGS(th) ===TJ RDS(on) ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse
(Note 2)
Test Conditions
VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 0 V VGS = 12 V, VDS = 0 V VGS = -12 V, VDS = 0 V VDS = VGS, ID = 250 A ID = 250 A, Referenced to 25C VGS = 4.5 V, VGS = 10 V, VGS = 4.5 V, VGS = 4.5 V, VDS = 10 V, ID = 5.5 A ID = 6.2 A ID = 5.5 A, TJ =125C VDS = 5 V ID = 5.5 A
Min
30
Typ
Max Units
V
Off Characteristics
22 1 100 -100 0.8 1.4 -4 25 23 34 20 33 1460 227 96 VDS = 15 V, ID = 1 A, VGS = 4.5 V, RGEN = 6 8 9 35 7 VDS = 15 V, ID = 6.2 A, VGS = 4.5 V 13 3.6 3.6 1.3
(Note 2)
mV/C A nA nA V mV/C 30 26 48 m A S pF pF pF 16 18 56 14 21 ns ns ns ns nC nC nC A V
On Characteristics
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
2
Dynamic Characteristics
VDS = 15 V, V GS = 0 V, f = 1.0 MHz
Switching Characteristics
Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Drain-Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 1.3 A Voltage 0.7 1.2
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. 78C/W when mounted on a 1in2 pad of 2oz copper on FR-4 board. 156C/W when mounted on a minimum pad. a. b.
2. Pulse Test: Pulse Width =300 s, Duty Cycle =2.0%
FDC645N Rev B(W)
FDC645N
Typical Characteristics
20 4.5V ID, DRAIN CURRENT (A) 15 3.0V 2.5V 10 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 1.4 VGS = 3.0V 1.2 3.5V 4.0V 1 4.5V
5.0V
5 2.0V 0 0 0.5 1 1.5 2 VDS, DRAIN-SOURCE VOLTAGE (V)
6.0V 10V
0.8 0 5 10 15 20 25 ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.07 RDS(ON), ON-RESISTANCE (OHM)
1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 5.5A VGS = 4.5V 1.4
ID = 3.75 A 0.06 0.05 TA = 125oC 0.04 0.03 TA = 25oC 0.02 0.01 2 2.5 3 3.5 4 4.5 5 VGS, GATE TO SOURCE VOLTAGE (V)
1.2
1
0.8
0.6 -50 -25 0 25 50 75 100
o
125
150
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation withTemperature.
30 VDS = 5V 25 ID, DRAIN CURRENT (A) 125oC 20 15 10 5 0 1 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 VGS = 0V 10 1 0.1 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD, BODY DIODE FORWARD VOLTAGE (V) TA = 125oC 25oC -55oC
25 C
o
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
IS, REVERSE DRAIN CURRENT (A)
TA = -55oC
FDC645N Rev B(W)
FDC645N
Typical Characteristics
10 VGS, GATE-SOURCE VOLTAGE (V) ID = 5.5A 8 VDS = 5V 15 V 10V
2400 2000 CAPACITANCE (pF) 1600 1200 800 400 0 0 5 10 15 20 25 30 0 5 10 15
f = 1MHz VGS = 0 V
6
CISS
4
2
COSS
CRSS 20
0 Qg, GATE CHARGE (nC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 1ms 10ms 100ms 1s 10s VGS = 4.5V SINGLE PULSE RJA = 156oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) DC P(pk), PEAK TRANSIENT POWER (W) 100s 5
Figure 8. Capacitance Characteristics.
4
SINGLE PULSE RJA = 156C/W TA = 25C
3
1
2
0.1
1
0 0.1 1 10 t1, TIME (sec) 100 1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02 0.01
RJA(t) = r(t) + RJA RJA = 156C/W P(pk) t1 t2
SINGLE PULSE
0.01
TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.001 0.0001
0.001
0.01
0.1 t1, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
FDC645N Rev B(W)
SuperSOTTM-6 Tape and Reel Data and Package Dimensions
SSOT-6 Packaging Configuration: Figur e 1.0
Packaging Description:
Customize Label
Anti static Cover Tape
SSOT-6 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 3,000 units per 7" or 177cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 10,000 units per 13" or 330cm diameter reel. This and some other options are described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a pizza box (illustrated in figure 1.0) made of recyclable corrugated brown paper with a Fairchild logo printing. One pizza box contains three reels maximum. And these pizza boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
F63TNR Label
Embossed Carrier Tape
631 631
SSOT-6 Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard
(no f l ow c ode )
631
631
631
Pin 1
D87Z TNR 10,000 13" 343x343x64 30,000 0.0158 0.4700
TNR 3,000 7" Dia 184x187x47 9,000 0.0158 0.1440
SSOT-6 Unit Orientation
343mm x 342mm x 64mm Intermediate box fo r D87Z Option
F63TNR Label
F63TNR Label
F63TNR Label sa mpl e 184mm x 187mm x 47mm Pizza Box fo r Standar d Opti on F63TNR Label
LOT: CBVK741B019 FSID: FDC633N QTY: 3000 SPEC:
SSOT-6 Tape Leader and Trailer Configuration: Figur e 2.0
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
(F63TNR)3
Carrier Tape Cover Tape
Comp onent s Traile r Tape 300mm mi nimum or 75 empty poc kets Lead er Tape 500mm mi nimum or 125 emp ty poc kets
1998 Fairchild Semiconductor Corporation
August 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SSOT-6 Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SSOT-6 (8mm)
A0
3.23 +/-0.10
B0
3.18 +/-0.10
W
8.0 +/-0.3
D0
1.55 +/-0.05
D1
1.125 +/-0.125
E1
1.75 +/-0.10
E2
6.25 min
F
3.50 +/-0.05
P1
4.0 +/-0.1
P0
4.0 +/-0.1
K0
1.37 +/-0.10
T
0.255 +/-0.150
Wc
5.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SSOT-6 Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
8mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 4.00 100
Dim W1
0.331 +0.059/-0.000 8.4 +1.5/0 0.331 +0.059/-0.000 8.4 +1.5/0
Dim W2
0.567 14.4 0.567 14.4
Dim W3 (LSL-USL)
0.311 - 0.429 7.9 - 10.9 0.311 - 0.429 7.9 - 10.9
8mm
13" Dia
July 1999, Rev. C
SuperSOTTM-6 Tape and Reel Data and Package Dimensions, continued
SuperSOT -6 (FS PKG Code 31, 33)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0158
1998 Fairchild Semiconductor Corporation
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST FASTrTM GTOTM
DISCLAIMER
HiSeCTM ISOPLANARTM MICROWIRETM POPTM PowerTrench QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6
SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. E


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