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 INTEGRATED CIRCUITS
DATA SHEET
TDA8787 10-bit, 3.0 V analog-to-digital interface for CCD cameras
Preliminary specification Supersedes data of 1998 Mar 27 File under Integrated Circuits, IC02 1998 Oct 15
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
FEATURES * Correlated Double Sampling (CDS), Automatic Gain Control (AGC), 10-bit Analog-to-Digital Converter (ADC) and reference regulator included * Fully programmable via a 3-wire serial interface * Sampling frequency up to 18 MHz * AGC gain range of 36 dB (in steps of 0.1 dB) * Low power consumption of only 190 mW (typ.) * Power consumption in standby mode of 4.5 mW (typ.) * 3.0 V operation and 2.5 to 3.6 V operation for the digital outputs * Active control pulses polarity selectable via serial interface * 8-bit DAC included for analog settings * TTL compatible inputs, CMOS compatible outputs. QUICK REFERENCE DATA SYMBOL VCCA VCCD VCCO ICCA ICCD ICCO ADCres Vi(CDS)(p-p) fpix(max) fpix(min) DRAGC Ntot(rms) Ptot PARAMETER analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current ADC resolution maximum CDS input voltage (peak-to-peak value) maximum pixel rate minimum pixel rate AGC dynamic range total noise from CDS input to ADC output total power consumption AGC gain = 0 dB; see Fig.8 VCCA = VCCD = VCCO = 3 V VCC = 2.85 V VCC 3.0 V all clamps active CONDITIONS MIN. 2.7 2.7 2.5 - - fpix = 18 MHz; CL = 20 pF; - input ramp response time is 800 s - 650 800 18 5 - - - TYP. 3.0 3.0 2.6 55 8 1 10 - - - - 36 0.25 190 APPLICATIONS
TDA8787
* Low-power, low-voltage CCD camera systems. GENERAL DESCRIPTION The TDA8787 is a 10-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, AGC and a low-power 10-bit ADC together with its reference voltage regulator. AGC gain is controlled via the serial interface. The ADC input clamp level is controlled via the serial interface. An additional DAC is provided for additional system controls; its output voltage range is 1.0 V (p-p) which is available at pin OFDOUT.
MAX. 3.6 3.6 3.6 70 11 2 - - - - - - - -
UNIT V V V mA mA mA bits mV mV MHz MHz dB LSB mW
ORDERING INFORMATION TYPE NUMBER TDA8787HL PACKAGE NAME LQFP48 DESCRIPTION plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm VERSION SOT313-2
1998 Oct 15
2
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ook, full pagewidth
1998 Oct 15
SHP 47 SHD 48 VCCD3 1 DGND3 2 VCCA2 18 AGND2 CLPOB CLPDM 17 13 12 CDS CLOCK GENERATOR CPCDS1 CPCDS2 VCCA3 AGND3 IN 7 CLAMP 8 42 41 4 CORRELATED DOUBLE SAMPLING AGC SHIFT
BLOCK DIAGRAM
Philips Semiconductors
10-bit, 3.0 V analog-to-digital interface for CCD cameras
AGND5 43
PBK
CLK
OE
11
40
37 20 19 39 38 26 DGND1 VCCD1 DGND2 VCCD2 OGND
36 COMPARATOR 35 34 33 SHIFTER PREBLANKING 10-bit ADC DATA FLIPFLOP 32 OUTPUT BUFFER 31 30 29 28 27 DAC 9-BIT REGISTER
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
3
VCCA1 AGND1 6 5 OFDOUT 9 14 15 TEST1 TEST2
CLAMP
Vref
TDA8787
7-BIT REGISTER
25
VCCO
OFD DAC
8-BIT REGISTER
SERIAL INTERFACE
REGULATOR
44
DCLPC
16
3
45
46
23
22
21
24
10
MGM541
TEST3
AGND4
OAGC
OAGCC
SEN
SCLK SDATA VSYNC
STDBY
Preliminary specification
TDA8787
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
PINNING SYMBOL VCCD3 DGND3 AGND4 IN AGND1 VCCA1 CPCDS1 CPCDS2 OFDOUT STDBY PBK CLPDM CLPOB TEST1 TEST2 TEST3 AGND2 VCCA2 VCCD1 DGND1 SDATA SCLK SEN VSYNC VCCO OGND D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 OE VCCD2 DGND2 CLK 1998 Oct 15 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 digital supply voltage 3 digital ground 3 analog ground 4 input signal from CCD analog ground 1 analog supply voltage 1 clamp storage capacitor pin 1 clamp storage capacitor pin 2 analog output of the additional 8-bit control DAC DESCRIPTION
TDA8787
standby mode control input (LOW: TDA8787 active; HIGH: TDA8787 standby) pre-blanking control input clamp pulse input at dummy pixel clamp pulse input at optical black test pin input 1 (should be connected to AGND2) test pin input 2 (should be connected to AGND1) test pin input 3 (should be connected to AGND2) analog ground 2 analog supply voltage 2 digital supply voltage 1 digital ground 1 serial data input for serial interface control serial clock input for serial interface strobe pin for serial interface vertical sync pulse input output supply voltage digital output ground ADC digital output 0 (LSB) ADC digital output 1 ADC digital output 2 ADC digital output 3 ADC digital output 4 ADC digital output 5 ADC digital output 6 ADC digital output 7 ADC digital output 8 ADC digital output 9 (MSB) output enable control input (LOW: outputs active; HIGH: outputs in high impedance) digital supply 2 digital ground 2 data clock input 4
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
SYMBOL AGND3 VCCA3 AGND5 DCLPC OAGC OAGCC SHP SHD PIN 41 42 43 44 45 46 47 48 analog ground 3 analog supply 3 analog ground 5 regulator decoupling pin AGC output (test pin) AGC complementary output (test pin) preset sample-and-hold pulse input data sample-and-hold pulse input DESCRIPTION
TDA8787
46 OAGCC
39 DGND2
41 AGND3
43 AGND5
38 VCCD2
44 DCLPC
42 VCCA3
45 OAGC
48 SHD
47 SHP
40 CLK
VCCD3 DGND3 AGND4 IN AGND1 VCCA1 CPCDS1 CPCDS2 OFDOUT
37 OE
1 2 3 4 5 6
36 D9 35 D8 34 D7 33 D6 32 D5 31 D4
TDA8787
7 8 9
30 D3 29 D2 28 D1 27 D0 26 OGND 25 VCCO
STDBY 10 PBK 11 CLPDM 12
CLPOB 13
TEST1 14
TEST2 15
TEST3 16
AGND2 17
VCCA2 18
VCCD1 19
DGND1 20
SDATA 21
SCLK 22
SEN 23
VSYNC 24
MGM542
Fig.2 Pin configuration.
1998 Oct 15
5
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VCCA VCCD VCCO VCC PARAMETER analog supply voltage digital supply voltage output stages supply voltage supply voltage difference between VCCA and VCCD between VCCA and VCCO between VCCD and VCCO Vi Io Tstg Tamb Tj Note input voltage data output current storage temperature operating ambient temperature junction temperature referenced to AGND -1.0 -1.0 -1.0 -0.3 - -55 -20 - +1.0 +1.0 +1.0 +7.0 10 note 1 note 1 note 1 CONDITIONS MIN. -0.3 -0.3 -0.3
TDA8787
MAX. +7.0 +7.0 +7.0 V V V V V V V
UNIT
mA C C C
+150 +75 150
1. The supply voltages VCCA, VCCD and VCCO may have any value between -0.3 and +7.0 V provided that the supply voltage difference VCC remains as indicated. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 76 UNIT K/W
1998 Oct 15
6
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
CHARACTERISTICS VCCA = VCCD = 3.0 V; VCCO = 2.6 V; fpix = 18 MHz; Tamb = 25 C; unless otherwise specified. SYMBOL Supplies VCCA VCCD VCCO ICCA ICCD ICCO analog supply voltage digital supply voltage digital outputs supply voltage analog supply current digital supply current digital outputs supply current CL = 20 pF on all data outputs; input ramp frequency all clamps active 2.7 2.7 2.5 - - - 3.0 3.0 2.6 55 8 1 PARAMETER CONDITIONS MIN. TYP.
TDA8787
MAX.
UNIT
3.6 3.6 3.6 70 11 2
V V V mA mA mA
Digital inputs INPUTS: SHP, SHD, STDBY, CLPDM, CLPOB, SCLK, SDATA, SEN, VSYNC, OE AND PBK VIL VIH Ii Clamps GLOBAL CHARACTERISTICS OF THE CLAMP LOOPS tW(clamp) clamp active pulse width in number of pixels AGC code = 383 for maximum 4 LSB error 18 - - pixels LOW-level input voltage HIGH-level input voltage input current 0 Vi VCCD 0 2.2 -2 - - - 0.6 VCCD +2 V V A
INPUT CLAMP (DRIVEN BY CLPDM) gm(CDS) CDS input clamp transconductance 1.5 2.7 3.5 mS
OPTICAL BLACK CLAMP (DRIVEN BY CLPOB) Gshift ILSB(cp) gain from CPCDS1 and 2 to AGC inputs charge pump current for 1 LSB error at ADC output available push current of the charge pump available pull current of the charge pump AGC code = 0 AGC code = 383 - - - - - 0.27 350 10 650 -650 - - - - - - A A A A
Ipush(cp) Ipull(cp)
1998 Oct 15
7
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
SYMBOL PARAMETER CONDITIONS MIN. - - - - 15 5 TYP.
TDA8787
MAX. - - - +1 - 7
UNIT
Correlated Double Sampling (CDS) Vi(CDS)(p-p) maximum peak-to-peak CDS input amplitude (video signal) maximum CDS input reset pulse amplitude input current into pin IN (pin 4) CDS control pulses minimum active time CDS input hold time (pin IN) compared to control pulse SHP CDS input hold time (pin IN) compared to control pulse SHD at floating gate level video input = Vi(CDS)(p-p); 2 LSB error at ADC output VCCA = VCCD = 30 V; Tamb = 25 C; see Fig.9 VCCA = VCCD = 30 V; Tamb = 25 C; see Fig.9 VCC = 2.85 V VCC 3.0 V 650 800 500 -1 11 3 mV mV mV A ns ns
Vreset(max) Ii(IN) tCDS(min) th(IN-SHP)
th(IN-SHD)
3
5
7
ns
Amplifier DRAGC GAGC LEi LEd fpix(max) tCLKH tCLKL td(SHD-CLK) tsu(PBK-CLK) Vi(IN) Ntot(rms) AGC dynamic range maximum AGC gain step - -0.3 - - 36 - 1.3 0.5 - - - - - - - 0.25 0.8 - - +0.3 2.5 0.9 - - - - - - - - - +70 dB dB
Analog-to-Digital Converter (ADC) integral linearity error differential linearity error fpix = 18 MHz; ramp input fpix = 18 MHz; ramp input LSB LSB
Total chain characteristics (CDS + AGC + ADC) maximum pixel frequency CLK pulse width HIGH CLK pulse width LOW time delay between SHD and CLK set-up time of PBK compared to CLK video input dynamic signal AGC code = 00 for ADC full-scale output AGC code = 383 total output noise (RMS value) see Fig.8 AGC gain = 0 dB AGC gain = 9 dB OCCD(max) maximum offset between CCD floating level and CCD dark pixel level equivalent input noise voltage (RMS value) - - -70 LSB LSB mV see Fig.9 18 15 15 10 10 800 12.7 MHz ns ns ns ns mV mV
Vn(i)(eq)(rms)
-
110
-
V
1998 Oct 15
8
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
SYMBOL PARAMETER CONDITIONS - MIN. TYP.
TDA8787
MAX. -
UNIT
Digital-to-analog converter (OFDOUT DAC) VOFDOUT(p-p) additional 8-bit control Ri = 1 M DAC (OFD) output voltage (peak-to-peak value) DC output voltage for code 0 1.0 V
VOFDOUT(0)
- - - - static IOH = -1 mA IOL = 1 mA 0.5 V < Vo < VCCO see Fig.9 CL = 22 pF; VCCO = 3.0 V CL = 22 pF; VCCO = 2.7 V -
AGND
-
V V ppm/C A
VOFDOUT(255) DC output voltage for code 255 TCDAC ZOFDOUT IOFDOUT DAC output range temperature coefficient DAC output impedance OFD output current drive
AGND + 1.0 - 250 2000 - - - 100
Digital outputs (fpix = 18 MHz; CL = 22 pF) VOH VOL IOZ th(o) td(o) CL fSCLK(max) HIGH-level output voltage LOW-level output voltage output current in 3-state mode output hold time output delay time output load capacitance VCCO - 0.5 - 0 -20 11 - - - - - - 28 27 - - VCCO 0.5 +20 - tbf tbf 22 - V V A ns ns ns pF
Serial interface maximum frequency of serial interface 5 MHz
1998 Oct 15
9
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
TDA8787
handbook, full pagewidth
IN N N+1 t CDS(min) 2.2 V SHP 0.6 V t h(IN-SHP) t CDS(min) 2.2 V SHD 0.6 V t h(IN-SHD) tCLKH 2.2 V CLK 0.6 V t d(SHD-CLK) 0.6 V 0.6 V N+2 N+3
SDATA
50%
N-1
N
th(o) 2.2 V PBK 0.6 V
MGM764
td(o)
t su(PBK-CLK)
Fig.3 Pixel frequency timing diagram; all polarities active HIGH.
1998 Oct 15
10
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
TDA8787
handbook, full pagewidth
IN N N+1 N+2 N+3
2.2 V SHP 0.6 V t h(IN-SHP) 2.2 V SHD 0.6 V t h(IN-SHD) t CDS(min) t CDS(min) 2.2 V
2.2 V CLK 0.6 V tCLKL t d(SHD-CLK)
2.2 V
SDATA
50%
N-1
N
th(o) 2.2 V PBK 0.6 V
FCE088
td(o)
t su(PBK-CLK)
Fig.4 Pixel frequency timing diagram; all polarities active LOW.
handbook, full pagewidth
MGM543
1.0 OFDOUT DAC voltage output (V)
0 0 OFDOUT control DAC input code 255
Fig.5 DAC voltage output as a function of DAC input code.
1998 Oct 15
11
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
TDA8787
handbook, full pagewidth
4 pixels(1) CLPOB WINDOW AGCOUT VIDEO OPTICAL BLACK HORIZONTAL FLYBACK
4 pixels(1) CLPDM WINDOW DUMMY VIDEO
CLPOB (active HIGH)
(2)
CLPDM (active HIGH)
PBK (active HIGH) PBK window
MGM544
(1) In case the number of clamp pixels is limited to 18tW(clamp); otherwise this timing interval can be smaller. (2) When dummy pixels are not available.
Fig.6 Line frequency timing diagram.
handbook, halfpage
42
FCE057
AGC gain 36 (dB) 30 24 18 12 6 0 -6
0
64
128
192
256
320
384
AGC input code
Fig.7 AGC gain as a function of AGC input code.
1998 Oct 15
12
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
TDA8787
handbook, halfpage
10
FCE098
Ntot(rms) (LSB) 8
6
4
2
0 0 64 128 192 256 320 383 AGC code
Noise measurement at ADC outputs: Coupling capacitor at input is grounded, so only noise contribution of the front-end is evaluated. Front-end works at 18 Mpixels with line of 1024 pixels whose first 40 are used to run CLPOB and the last 40 for CLPDM. Data at the ADC outputs are measured during the other pixels. As a result of this, the standard deviation of the codes statistic is computed, resulting in the noise. No quantization noise is taken into account as no signal is inputted.
Fig.8 Total noise performance as a function of AGC gain.
1998 Oct 15
13
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
TDA8787
handbook, full pagewidth
SDATA D0 SCLK LSB D1 D2 D3
SHIFT REGISTER D4 D5 D6 D7 D8 D9 MSB 10 LATCH SELECTION A0 A1
SEN
8 OFDOUT DAC LATCHES
9 AGC GAIN LATCHES
7 ADC CLAMP LATCHES
6 CONTROL PULSE POLARITY LATCHES
8-bit DAC
AGC control
ADC clamp control
control pulses polarity settings
MGM546
Fig.9 Serial interface block diagram.
handbook, full pagewidth
tsu2 MSB thd4 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0
SDATA
A1
A0
D9
SCLK
SEN tsu1 tsu3 thd3
MGM547
tsu1 = tsu2 = tsu3 = 10 ns (min.); thd3 = thd4 = 10 ns (min.).
Fig.10 Loading sequence of control input data via the serial interface.
1998 Oct 15
14
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
Table 1 Serial interface programming DATA BITS D9 TO D0 A1 0 0 1 1 Table 2 A0 0 1 0 1 Polarity settings SYMBOL SHP and SHD CLK CLPDM CLPOB PBK VSYNC Note 1. Bit D4 is not used. Table 3 Standby selection STDBY 1 0 ADC DIGITAL OUTPUTS D9 TO D0 logic state LOW active 1 mA 64 mA PIN 47 and 48 40 12 13 11 24 SERIAL CONTROL BIT(1) D0 D1 D2 D3 D5 D6 AGC gain control (D8 to D0); bit D9 should be set to logic 0
TDA8787
ADDRESS BITS
DAC OFDOUT output control (D7 to D0); bits D8 and D9 should be set to logic 0 ADC clamp reference control (D6 to D0); bits D7, D8 and D9 should be set to logic 0 control pulses (pins SHP, SHD, CLPDM, CLPOB, PBK and CLK) polarity settings
ACTIVE EDGE OR LEVEL 1 = HIGH; 0 = LOW 1 = rising; 0 = falling 1 = HIGH; 0 = LOW 1 = HIGH; 0 = LOW 1 = HIGH; 0 = LOW 0 = rising; 1 = falling
ICCA + ICCO + ICCD (TYP.)
1998 Oct 15
15
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
APPLICATION DIAGRAM
TDA8787
handbook, full pagewidth
VCCA
VCCD
1 F
(2) (2)
100 nF
100 nF
VCCD
OAGCC
AGND5
DGND2
AGND3
DCLPC
SHP
VCCD2
SHD
VCCA3
CCD(2) 1 F VCCD3 1 F DGND3 AGND4 IN 100 nF AGND1 VCCA1 CPCDS1 1 F CPCDS2 OFDOUT STDBY 1 F PBK CLPDM
OAGC
CLK
48 47 46 45 44 43 42 41 40 39 38 37 VCCD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 CLPOB AGND2 VCCA2 VCCD1 DGND1 SDATA SCLK SEN VSYNC TEST1 TEST2 TEST3 36 35 34 33 32 31 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 OGND VCCO 100 nF VCCD
VCCA
TDA8787HL
30 29 28 27 26 25
VCCD
OE
(1)
serial interface 100 nF VCCA 100 nF VCCD
MGM548
(1) Pins SEN and VSYNC should be interconnected when vertical sync signal is not available. (2) Input signals IN, SHD and SHP must be adjusted to comply with timing signals th(IN-SHP) and th(IN-SHD) (see Chapter "Characteristics").
Fig.11 Application diagram.
1998 Oct 15
16
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
PACKAGE OUTLINE LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm
TDA8787
SOT313-2
c
y X
36 37
25 24 ZE
A
e
E HE
A A2
A1
(A 3) Lp L detail X
wM pin 1 index 48 1 12 ZD bp D HD wM B vM B vM A 13 bp
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT313-2 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION A max. 1.60 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 7.1 6.9 E (1) 7.1 6.9 e 0.5 HD 9.15 8.85 HE 9.15 8.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.12 y 0.1 Z D (1) Z E (1) 0.95 0.55 0.95 0.55 7 0o
o
ISSUE DATE 94-12-19 97-08-01
1998 Oct 15
17
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all LQFP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 50 and 300 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. Wave soldering Wave soldering is not recommended for LQFP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. CAUTION Wave soldering is NOT applicable for all LQFP packages with a pitch (e) equal or less than 0.5 mm.
TDA8787
If wave soldering cannot be avoided, for LQFP packages with a pitch (e) larger than 0.5 mm, the following conditions must be observed: *A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. *The footprint must be at an angle of 45 to the board direction and must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1998 Oct 15
18
Philips Semiconductors
Preliminary specification
10-bit, 3.0 V analog-to-digital interface for CCD cameras
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA8787
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Oct 15
19
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 Internet: http://www.semiconductors.philips.com
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
SCA60
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545104/750/02/pp20
Date of release: 1998 Oct 15
Document order number:
9397 750 04259


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