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INTEGRATED CIRCUITS 74ALVT16374 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) Product specification Supersedes data of 1998 Feb 13 IC23 Data Handbook 1999 Oct 18 Philips Semiconductors Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 FEATURES * 16-bit edge-triggered flip-flop * 5V I/O compatibile * 3-State buffers * Output capability: +64mA/-32mA * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs DESCRIPTION The 74ALVT16374 is a high-performance BiCMOS product designed for VCC operation at 2.5V or 3.3V with I/O compatibility up to 5V. This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-State outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels set up at the D inputs. * Live insertion/extraction permitted * Power-up reset * Power-up 3-State * No bus current loading when output is tied to 5V bus * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model QUICK REFERENCE DATA SYMBOL tPLH tPHL CIN COut ICCZ PARAMETER Propagation delay nCP to nQx Input capacitance DIR, OE Output capacitance Total supply current CL = 50pF VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled CONDITIONS Tamb = 25C TYPICAL UNIT 2.5V 2.6 2.8 3 9 40 3.3V 2.1 2.3 3 9 40 ns pF pF A ORDERING INFORMATION PACKAGES 48-Pin Plastic SSOP Type III 48-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ALVT16374 DL 74ALVT16374 DGG NORTH AMERICA AV16374 DL AV16374 DGG DWG NUMBER SOT370-1 SOT362-1 1999 Oct 18 2 853-1844 22537 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 LOGIC SYMBOL 47 46 44 43 41 40 38 37 PIN CONFIGURATION 1OE 1Q0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1CP 1D0 1D1 GND 1D2 1D3 VCC 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D2 2D3 VCC 2D4 2D5 GND 2D6 2D7 2CP 1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 48 1 1CP 1OE 1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 !Q1 GND 1Q2 1Q3 VCC 2 36 3 35 5 33 6 32 8 30 9 29 11 27 12 26 1Q4 1Q5 GND 1Q6 2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7 25 24 2CP 2OE 2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 1Q7 2Q0 2Q1 GND 2Q2 13 14 16 17 19 20 22 23 2Q3 VCC SW00018 2Q4 2Q5 GND 2Q6 LOGIC SYMBOL (IEEE/IEC) 1OE 1CP 2OE 2CP 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 1 48 24 25 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 2D 2 1EN C1 2EN C2 1D 1 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 2Q7 2OE SW00017 PIN DESCRIPTION PIN NUMBER 47, 46, 44, 43, 41, 40, 38, 37 36, 35, 33, 32, 30, 29, 27, 26 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 1, 24 48, 25 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 SYMBOL 1D0 - 1D7 2D0 - 2D7 1Q0 - 1Q7 2Q0 - 2Q7 1OE, 2OE 1CP, 2CP GND VCC FUNCTION Data inputs Data outputs Output enable inputs (active-Low) Clock pulse inputs (active rising edge) Ground (0V) Positive supply voltage SW00016 1999 Oct 18 3 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 FUNCTION TABLE INPUTS nOE L L L H H H= h= L= l= NC= X= Z= = = nCP nDx l h X X nDx INTERNAL REGISTER L H NC NC nDx OUTPUTS OPERATING MODE nQ0 - nQ7 L H NC Z Z Load and read register Hold Disable outputs High voltage level High voltage level one set-up time prior to the High-to-Low E transition Low voltage level Low voltage level one set-up time prior to the High-to-Low E transition No change Don't care High impedance "off" state Low-to-High clock transition Not a Low-to-High clock transition LOGIC DIAGRAM nD0 nD1 nD2 nD3 nD4 nD5 nD6 nD7 D D D D D D D D CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q nCP nOE nQ0 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7 SW00019 1999 Oct 18 4 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 ABSOLUTE MAXIMUM RATINGS1,2 SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 DC output diode current DC output voltage3 DC output current out ut Storage temperature range VO < 0 Output in Off or High state Output in Low state Output in High state VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 -64 -65 to +150 UNIT V mA V mA V mA C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%; f 1kHz Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER 2.5V RANGE LIMITS MIN 2.3 0 1.7 0.7 -8 8 24 10 +85 -40 MAX 2.7 5.5 3.3V RANGE LIMITS MIN 3.0 0 2.0 0.8 -32 32 64 10 +85 MAX 3.6 5.5 UNIT V V V V mA mA ns/V C 1999 Oct 18 5 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 DC ELECTRICAL CHARACTERISTICS (3.3V "0.3V RANGE) LIMITS SYMBOL VIK VOH PARAMETER Input clamp voltage High-level out ut voltage output TEST CONDITIONS VCC = 3.0V; IIK = -18mA VCC = 3.0 to 3.6V; IOH = -100A VCC = 3.0V; IOH = -32mA VCC = 3.0V; IOL = 100A VOL Low-level out ut voltage output VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VRST Power-up output low voltage6 VCC = 3.6V; IO = 1mA; VI = VCC or GND VCC = 3.6V; VI = VCC or GND II Input leakage current In ut VCC = 0 or 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0V IOFF IHOLD Off current Bus Hold current Data inputs7 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current Quiescent supply current Additional supply current per input pin2 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC OE/OE = Don't care VCC = 3.6V; VO = 3.0V; VI = VIL or VIH VCC = 3.6V; VO = 0.5V; VI = VIL or VIH VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 05 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 75 -75 500 10 1 0.5 0.5 0.04 3.7 0.04 0.04 125 100 5 *5 0.1 6 0.1 0.4 mA mA A A A A Data pins4 ins Control pins 0.1 0.1 0.1 0.1 0.1 130 -140 A VCC-0.2 2.0 Temp = -40C to +85C MIN TYP1 -0.85 VCC 2.3 0.07 0.25 0.3 0.4 0.2 0.4 0.5 0.55 0.55 1 10 1 -5 100 A A V V MAX *1.2 V V UNIT IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS (3.3V "0.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL fmax tPLH tPHL tPZH tPZL tPHZ tPLZ PARAMETER Maximum clock frequency Propagation delay nCp to nQx Output enable time to High and Low level Output disable time from High and Low Level WAVEFORM MIN 1 1 3 4 3 4 250 1.0 1.0 1.0 1.0 1.0 1.0 2.1 2.3 2.3 2.0 2.7 2.3 3.2 3.2 3.8 3.2 4.2 3.4 VCC = 3.3V "0.3V TYP1 MAX MHz ns ns ns UNIT NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 1999 Oct 18 6 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 DC ELECTRICAL CHARACTERISTICS (2.5V "0.2V RANGE) LIMITS SYMBOL VIK VOH VOL VRST PARAMETER Input clamp voltage High-level out ut voltage output Low-level out ut voltage output Power-up output low voltage7 TEST CONDITIONS VCC = 2.3V; IIK = -18mA VCC = 2.3 to 3.6V; IOH = -100A VCC = 2.3V; IOH = -8mA VCC = 2.3V; IOL = 100A VCC = 2.3V; IOL = 24mA VCC = 2.7V; IO = 1mA; VI = VCC or GND VCC = 2.7V; VI = VCC or GND II In ut Input leakage current VCC = 0 or 2.7V; VI = 5.5V VCC = 2.7V; VI = VCC VCC = 2.7V; VI = 0 IOFF IHOLD IEX IPU/PD IOZH IOZL ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current Off current Bus Hold current Data inputs6 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 3-State output High current 3-State output Low current VCC = 0V; VI or VO = 0 to 4.5V VCC = 2.3V; VI = 0.7V VCC = 2.3V; VI = 1.7V VO = 5.5V; VCC = 2.3V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 2.7V; VO = 2.3V; VI = VIL or VIH VCC = 2.7V; VO = 0.5V; VI = VIL or VIH VCC = 2.7V; Outputs High, VI = GND or VCC, IO = 0 VCC = 2.7V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 2.7V; Outputs Disabled; VI = GND or VCC, IO = 05 VCC = 2.3V to 2.7V; One input at VCC-0.6V, Other inputs at VCC or GND Data pins4 ins Control pins 0.1 0.1 0.1 0.1 0.1 90 -10 10 1 0.5 0.5 0.04 2.7 0.04 0.04 125 100 5 -5 0.1 4.5 0.1 0.4 mA mA VCC-0.2 1.8 Temp = -40C to +85C MIN TYP1 -0.85 VCC 2.1 0.07 0.3 0.2 0.5 0.55 1 10 1 -5 "100 A A A A A A A V MAX -1.2 V V UNIT NOTES: 1. All typical values are at VCC = 2.5V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 2.5V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. Not guaranteed. 7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. AC CHARACTERISTICS (2.5V "0.2V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL fmax tPLH tPHL tPZH tPZL tPHZ tPLZ PARAMETER Maximum clock frequency Propagation delay nCp to nQx Output enable time to High and Low level Output disable time from High and Low Level WAVEFORM MIN 1 1 3 4 3 4 150 1.5 1.5 1.0 1.0 2.0 1.0 2.6 2.8 3.4 2.6 2.7 2.0 4.2 4.5 5.6 4.7 4.4 3.3 VCC = 2.5V "0.2V TYP1 MAX MHz ns ns ns UNIT NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25C. 1999 Oct 18 7 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V 0.2V MIN tS(H) tS(L) th(H) th(L) tW(H) tw(L) Setup time nDx to nCP Hold time nDx to nCP nCP pulse width High or Low 2 2 1 1.0 1.5 0.5 0.5 1.5 1.5 TYP 0 0.4 0 0 LIMITS VCC = 3.3V 0.3V MIN 1.0 1.5 0.5 0.5 1.5 1.5 TYP 0 0 0 0 ns ns ns UNIT AC WAVEFORMS VM = 1.5V for VCC w 3.0V; VM = VCC/2 for VCC v 2.7V VX = VOL + 0.3V for VCC w 3.0V; VX = VOL + 0.15V for VCC v 2.7V VY = VOH - 0.3V for VCC w 3.0V; VY = VOH - 0.15V for VCC v 2.7V 1/fMAX nCP VM tw(H) tPHL VM tW(L) VM 3.0V or VCC whichever is less 0V nOE VM tPZH VM tPHZ 3.0V or VCC whichever is less 0V tPLH VOH VOH nQx VM VY 0V nQx VM VM VOL SW00168 SW00170 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level EEEEEEEEEE EEE E EEEEEEEEEE EEE E EEEEEEEEEE EEE E nDx VM VM VM VM ts(H) th(H) ts(L) th(L) 3.0V or VCC whichever is less 0V nOE VM tPZL VM tPLZ 3.0V or VCC whichever is less 0V 3.0V or VCC nCP VM VM 3.0V or VCC whichever is less 0V nQx VM VX VOL NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. SW00169 SW00171 Waveform 2. Data Setup and Hold Times Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level 1999 Oct 18 8 Philips Semiconductors Product specification 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 TEST CIRCUIT AND WAVEFORMS VCC 6V or VCC x 2 OPEN VIN PULSE GENERATOR RT D.U.T. CL RL POSITIVE PULSE 10% tW VOUT RL GND 90% NEGATIVE PULSE VM 10% tTHL (tF) tTLH (tR) 90% 90% VM 10% 0V 10% 0V tTLH (tR) tTHL (tF) AMP (V) tW VM 90% AMP (V) Test Circuit for 3-State Outputs VM SWITCH POSITION TEST tPHZ/tPZH tPLZ/tPZL tPLH/tPHL SWITCH GND 6V or VCC x 2 open VM = 1.5V or VCC / 2, whichever is less Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY Amplitude 74ALVT16 3.0V or VCC whichever is less Rep. Rate 10MHz tW 500ns tR 2.5ns tF 2.5ns SW00162 1999 Oct 18 9 Philips Semiconductors Product specification 2.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 1999 Oct 18 10 Philips Semiconductors Product specification 2.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1 1999 Oct 18 11 Philips Semiconductors Product specification 2.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State) 74ALVT16374 Data sheet status Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Production [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-99 9397-750-06513 Philips Semiconductors 1999 Oct 18 12 |
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